Showing papers on "Bit error rate published in 1972"

Phase ambiguity resolution system using convolutional coding-threshold decoding

Abstract: A synchronizer in the receive side of a digital communication system is inserted between the output of a PSK demodulator and the input of a threshold decoder of the type which can correct a predetermined number of bit errors in a convolutionally encoded bit stream. The synchronizer responds to error indicating pulses from the threshold decoder to alter the demodulated data by making the necessary corrections to resolve phase ambiguity and to achieve node synchronization. There are only a finite number of types of errors caused by phase ambiguity and improper node synchronization. The synchronizer includes a memory counter which has at least as many states as the number of all possible combinations of said types of errors. Each state of the memory counter controls correction of a different combination of said types of errors, so that there always exists one state of the memory counter which will make all the corrections needed to resolve phase ambiguity and achieve node synchronization. The memory counter is advanced by search pulses which are generated in the synchronizer by an error rate detector whenever the error indicating pulses from the threshold decoder are sufficiently numerous to indicate a gross error in the bit stream applied to the threshold decoder. As the search pulses continue to advance the memory counter through its states, it will eventually reach the state which makes all needed corrections. At that time there will no longer be a gross error in the bit stream applied to the threshold decoder, the search pulses will no longer be generated, and the memory counter will remain in the state which provides all needed corrections.

Forward-error correction with decision feedback*

Abstract: A new coding scheme is presented. In this scheme a given t-error-detectin g code is used for transmission over a noisy channel. When t or less errors are detected, a single request is made via a feedback channel for transmission of additional redundancy to enable the decoder to correct t or less errors. It is shown to be superior to forward error correction in rate and probability of error. For low channel errors the resulting rate is higher than that of retransmission with no significant difference in the probability of error.

The Effect of Timing Errors in Optical Digital Systems

Abstract: The use of digital transmission with narrow light pulses appears attractive for data communications, but carries with it a stringent requirement on system bit timing. The effects of imperfect timing in direct-detection (noncoherent) optical binary systems are investigated using both pulse-position modulation (PPM) and on-off keying for bit transmission. Particular emphasis is placed on specification of timing accuracy and an examination of system degradation when this accuracy is not attained. Bit error probabilities are shown as a function of timing errors from which average error probabilities can be computed for specific synchronization methods. Of significance is the presence of a residual or irreducible error probability in both systems, due entirely to the timing system, which cannot be overcome by the data channel.

Multiple b-adjacent group error correction and detection codes and self-checking translators therefor

Abstract: Novel error correction and detection codes and self-checking translators therefor are disclosed. A first of these codes is a t b-adjacent bit group error correcting and t+d b-adjacent d-adjacent bit group error detecting code using a quantity of 2t+d groups of b check bits. This code with a b-bit BSM (basic storage module) memory organization is capable of correcting b-adjacent errors due to failures in any t basic storage modules, detecting b-adjacent errors due to failures in any t+d basic storage modules, and, because of the translator design, detecting with high probability b-adjacent errors in 2t+2d-1 storage modules where 1

Digital linearity and bias error compensating by adding an extra bit

Abstract: Bias error is reduced in binary number signals by representing a binary signal having N bits as having N+1 bits with the least significant bit always being ONE, whereby this representation offsets to reduce error.

Bit regeneration for time division multiplexers

Abstract: The disclosed multiplexer responds to data appearing on separate channels at different signalling speeds or bit rates. At least two sampling rates are selected. One of the sampling rates is a base rate equal to or higher than the lowest signalling speed and the other sampling rate is a multiple of the base rate equal to or higher than the fastest signalling speed. The lowest speed signals are sampled at the base rate and the higher speed signals with the higher rate. The resulting sampled data is then interleaved. The lowest bit rate occupies the normal number of slots and the higher bit rate occupies a multiple number of the low rate slots. The interleaved signals are then transmitted. To accommodate telex call-establishing signals, which may occur in the same channel at rates different from the data rate, the existence of such call-establishing signals is determined and the sampling times are adjusted. The sampled signals are regenerated into bits which are multiples of the data rate. These bits are interleaved as data. Within the multiplexer distortion is removed by regenerating the signals in each channel on the bais of the condition of the center of each bit. This is comparable to a repeater. The bit center is located by high speed sampling techniques which count to the center of each bit on the basis of predetermined programs which are preset in accordance with the expected bit rate in each channel.

Method and apparatus for a single channel digital communications system

Abstract: A method and apparatus is disclosed for synchronization of a received PCM communications signal, without requiring a separate synchronization channel, by digital correlation of the received signal with a reference signal, first with its unmodulated subcarrier and then with a ''''bit sync'''' code modulated subcarrier, where the code sequence length is equal in duration to each data bit. The received signal includes a prefix consisting of a period of unmodulated subcarrier followed by a period of ''''bit sync'''' code modulated subcarrier. The phase of the reference signal is adjusted in accordance with the subcarrier correlation peak, and then in accordance with the bit correlation peak. The correlator comprises a shift register and an adder-subtractor the function of which is controlled by first the unmodulated reference signal, and then the ''''bit sync'''' code modulated reference signal. Once subcarrier and bit synchronization are achieved, data detection is initiated. To increase the center of the passband of the subcarrier, two ''''bit sync'''' code modulations may be provided, the first with a high frequency ''''bit sync'''' code which repeats a fixed number of times per data bit cycle for preliminary synchronizat1on. Following that, the period of regular ''''bit sync'''' code modulation is employed for bit synchronization.

Simulation results for the Viterbi decoding algorithm

Abstract: Concepts involved in determining the performance of coded digital communications systems are introduced. The basic concepts of convolutional encoding and decoding are summarized, and hardware implementations of sequential and maximum likelihood decoders are described briefly. Results of parametric studies of the Viterbi decoding algorithm are summarized. Bit error probability is chosen as the measure of performance and is calculated, by using digital computer simulations, for various encoder and decoder parameters. Results are presented for code rates of one-half and one-third, for constraint lengths of 4 to 8, for both hard-decision and soft-decision bit detectors, and for several important systematic and nonsystematic codes. The effect of decoder block length on bit error rate also is considered, so that a more complete estimate of the relationship between performance and decoder complexity can be made.

A study of FM threshold extension techniques

Abstract: The characteristics of three postdetection threshold extension techniques are evaluated with respect to the ability of such techniques to improve the performance of a phase lock loop demodulator. These techniques include impulse-noise elimination, signal correlation for the detection of impulse noise, and delta modulation signal processing. Experimental results from signal to noise ratio data and bit error rate data indicate that a 2- to 3-decibel threshold extension is readily achievable by using the various techniques. This threshold improvement is in addition to the threshold extension that is usually achieved through the use of a phase lock loop demodulator.

Experiment in frequency-shift-keying adjacent-channel interference

Abstract: The error performance of a frequency-shift-keying system is investigated experimentally in the presence of Gaussian noise and adjacent-channel interference. It has been found that, for a peak-to-peak frequency deviation of 0.7 times the bit rate and a receiver bandwidth of 1.0 times the bit rate, the frequency spacing between channels can be set to about 1.6 times the bit rate without causing an undue amount of performance degradation.

An Investigation of the Effects of the Error Rate of Multiple Phase-Shift-Keyed Signals Through a Hard Limiter

Abstract: This paper describes an investigation of channel spacing for multiple biphase-shift-keyed (BPSK) signals accessing a hard-limiter satellite. The effects of intermodulation and modulation spectrum interference on the bit error rate of the active channels were considered. Results and conclusions of experimental errorrate data are presented for various channel spacing arrangements. Of major significance is the formation of rules for the spacing of active channels when six or more BPSK signals are accessing the hard limiter.

Wideband Electronics for High Speed Digital Laser Communications.

Abstract: : This report describes the design and development of the high speed data handling electronics for a mode locked laser communications system. The electronics consist of a transmitter electronics and a receiver electronics package. The transmitter electronics accepts up to four channels of video, analog multiplexes the video onto a single line, interfaces with a 6-bit 50 Ms/s A/D converter, adds digital sync information, multiplexes the digital data into a serial stream, and interfaces the data to a mode locked laser modulator at 200 or 300 Mb/s. The receiver electronics accepts the detected 1 mV, 0.5 nsec triangular pulse output of the laser receiver, performs bit synchronization, digital demultiplexing, automatic sync acquisition, and D/A conversion, thereby reproducing the four video streams. A bit error checker and counter are incorporated into the receiver electronics to allow bit error rate tests to be run on the link. Tests were run on a simulated laser link. A reliability study was performed to assess the potential reliability of this type of equipment when designed for space or controlled environment ground use. (Author)

Imperfect Differential Detection of a Biphase Modulated Signal - An Experimental Analytical Study

Abstract: : The results of an experimental investigation of the effects of bit synchronization error and carrier frequency uncertainty on the performance of receivers used to demodulate differential phase shift keyed (DPSK) signals are presented. Also, previous analytical results relating to the differential detector (DD) are summarized and an expression for the performance of the perfectly timed DD with frequency uncertainty is derived. The bit error probability and the probability of two consecutive errors are used as performance measures. The experimental and analytical results obtained apply to cases in which the carrier is biphase modulated with the differentially encoded bit stream, the (equivalent) noise at the receiver input is white and Gaussian distributed, the bit synchronization error is Gaussian distributed, and the error in the carrier frequency estimate is constant as a function of time.

A study of fm threshold extension techniques

Abstract: Investigations into the FM threshold phenomenon have resulted in the development of several signal processing techniques that can be implemented at the output of any FM demodulator, in- cluding phase lock loop and FM feedback demodulators, to provide improved system perform- ance. These techniques are based on the distinguishing characteristics of the demodulator output noise below threshold. Performance improvement and threshold extension are achieved by operating on the demodulator output signal and noise such that the threshold noise impulses are eliminated. The characteristics of three postdetection threshold extension techniques are evaluated with respect to the ability of such techniques to improve the performance of a phase lock loop de- modulator. These techniques include impulse-noise elimination, signal correlation for the detection of impulse noise, and delta modulation signal processing. Experimental results from signal-to-noise ratio data and bit error rate data indicate that a 2- to 3-decibel threshold extension