Showing papers on "Bit error rate published in 1979"

Digital Radio outage due to selective fading — observation vs prediction from laboratory simulation

Abstract: A statistical model (introduced in a companion paper) of fading on a radio path is used with laboratory measurements on a digital radio system to estimate the outage due to multipath fading, where outage is the time that the bit error rate (ber) exceeds a threshold. Over the range of ber of interest (10−6 to 10−3), the calculated outage agrees favorably with the outage observed during the period for which the fading model was developed. It is further shown that the calculated outage, when scaled to a heavy fading month on the basis of single-frequency, time-faded statistics, agrees equally well with the outage observed on the same path during a heavy fading month The agreement between measured and predicted outage substantiates the selective fading model. The prescribed laboratory measurements characterize the sensitivity of the radio system to selective fading. Thus, the methodology provides a useful basis for comparing the outage of alternative realizations of digital radio systems.

Apparatus and method for receiving digital data at a first rate and outputting the data at a different rate

Abstract: A system is disclosed wherein a series bit stream of digital data, at a relatively high bit rate, is received and the data is recorded on a multiple channel recording medium. During the recording of the data, the data is divided into frames of words each having N bits. Each word has a parity bit added so that each word has N+1 bits. In addition, the data for each channel is recorded in frames where each frame includes a synchronization word followed by fixed plurality of data words. Since each recorded frame includes more bits than the originally received data bits per frame, the recording bit rate for each channel is substantially higher than the incoming data bit rate per channel. All frames from the various channels are recorded simultaneously so that the synchronization words from channel to channel are in alignment. During the read-out process, all of the channels are simultaneously read so as to provide a plurality of reconstructed data channels, each including a serial stream of data bits. A decoder is provided for each channel and the various decoders are controlled by a common decoder control circuit. For each channel, the decoder circuit detects the synchronization word and then sequentially stores the data words in designated locations of a read/write memory. After all of the synchronization words in the various channels have been detected, an offset delay takes place before the reading operation commences. This offset delay is sufficient to permit the writing into memory operation to continue within the decoders until one of the decoders has written a specified number of data words into its memory. This is done to compensate for tape skew. Thereafter, all of the memories are simultaneously read in sequence from a given memory location to form reconstructed data frames for each channel. These data frames include only the original data words and no parity or synchronization bits. These frames are then combined into a single output data stream at a bit rate substantially less than that of the original incoming data stream. In addition, the read-out operation provides circuitry for determining whether the data signals obtained from one of the channels recorded on the recording medium has exhibited a signal loss, as from a tape defect. In such case, a change-over circuit will look to a different channel to provide a clock signal for operating the decoder for that channel.

Error correction and detection systems

Abstract: In a system which employs SEC-DED codes constituted by data bits added to redundant bits and is capable of detecting and correcting a single bit error while detecting a double or more bit error, detection is made on miscorrection ascribable to a triple bit error. When a single bit error is detected by an error detecting and correcting circuit in the SEC-DED code read out from a memory, all the corrected data bits are inverted in state and rewritten in the memory after having been added to new redundant bits. Subsequently, the data bits together with the redundant bits are read out from the memory and supplied to the error detecting and correcting circuit. The data bits obtained from the error detecting and correcting circuit are compared with the corrected and inverted data bits available before being written in the memory, to thereby determine the presence of an error encompassing more than (m+1) bits on the basis of the result of comparison.

Digital radio transmission system

Abstract: A digital radio transmission system for compensating for co-channel or adjacent channel interference or signal level variations and distortions is provided. The system includes apparatus for transmitting a digital signal having a first signal level from a first location to a second remote location, apparatus for monitoring at the second remote location the bit error rate of the received digital signal and apparatus for changing the level of the transmitted digital signal when the received bit error rate is different from a predetermined value.

Spectrum efficiency of a frequency-hopped-DPSK spread-spectrum mobile radio system

Abstract: The spectrum efficiency (bits/s per unit bandwidth) of a frequency-hopped-DPSK spread-spectrum modulation technique proposed for use in urban mobile radio systems is estimated. The analysis is based on simple models for the factors influencing system performance, and requires no computer simulation. It permits straightforward evaluation of spectrum efficiency over a broad range of system parameters. For an isolated service area (cell) with no propagation impairments, the efficiency is 0.12 at a bit error rate of 10-3. When interference from nearby cells is considered (assuming centrally located base stations with omni-directional antennas), the efficiency falls to 0.03 - 0.06, depending on how much performance degradation can be tolerated near the cell boundaries. Finally, the effects of multipath (Rayleigh) fading reduce system efficiency to 0.02 - 0.05.

Digital implementation of parity monitor and alarm

Abstract: A digital bit error violation rate circuit monitors the bit error integrity of a data stream and generates an alarm if the bit error rate exceeds an established bit error integrity threshold.

Error correction on burst channels by sequential decoding

Abstract: A sequential decoder for error correction on burst and random noise channels using convolutionally encoded data. The decoder interacts with a deinterleaver which time demultiplexes data from a data channel from its time multiplexed form into a predetermined transformed order. The decoder includes a memory for storing a table of likelihood values which are derived from known error statistics about the data channel such as the probabilities of random errors and burst errors, burst error severity and burst duration. The decoder removes an encoded subblock of data from the deinterleaver and enters it into a replica of the convolutional encoder which calculates a syndrome bit from a combination of the presently received subblock together with a given number of previous subblocks. The syndrome bit indicates if the current assumption of the path through the convolutional tree is correct. Where there is no error in the channel, then the received sequence is a code word and the syndrome bit indicates that the correct path in the convolution tree is taken. For each received bit, and indicator bit is calculated which is a function of the difference between the current path and the received sequence. The sequential decoder employs the syndrome bit together with burst indicator bits to calculate a table address in a table of likelihood values and error pattern values. The likelihood value is used to update a total likelihood of error value and the error pattern value is used to change the received subblock of data.

Automatic synchronizing system for digital asynchronous communications

Abstract: An asynchronous system for transmitting digital data from a data origination station to a data utilization station over a communications path such as an ordinary long-distance telephone network is disclosed. The system includes circuitry for synchronizing and maintaining synchronization between the receiving circuits and the transmitting circuits and for correcting errors introduced by the communications path. Each data word transmitted has associated therewith a synchronization code comprising a stop bit and a start bit. During normal operation, the system is synchronized by detecting the start bit which precedes the information portion of each data word. Synchronization is maintained for several data words even though the start bit is not detected due to interference, for example, by an auto-synchronization signal which includes a pulse positioned within the time period during which the start bit would normally be detected. Additionally, should a predetermined number of successive data words arrive at the receiver with errors, the auto-synchronization signal is disabled based on the assumption that the errors are due to a loss of synchronization. The transmitter circuits then transmits two synchronizing words, each containing the synchronization code with all other bits having a logic "zero" level. The synchronization code of the two synchronizing words resynchronizes the system thereby restoring normal operation. That is, the system maintains normal synchronization even though interference destroys the start and/or stop bits of a number of successive words. Should this interference continue such that the automatic synchronization circuits can no longer maintain synchronization, the auto synchronization circuit is disabled and normal synchronization is restored by transmitting two special synchronization words, all without any loss of data.

Multipath Fading Effects on Digital Radio

Abstract: An experimental study of multipath fading effects on an 8-PSK 6 GHz digital radio system was conducted on a 26.4 mi test link near Atlanta, Georgia. Results were obtained for a non-diversity arrangement and a space-diversity arrangement employing a cophasing combiner operating at 70 MHz and fed by two antennas separated by 30 ft. Multipath fading was found to have a significant impact on bit error rate performance, i.e., the digital radio system was fragile by comparison to conventional analog FM radio. Modest in-band linear amplitude dispersion, 0.2 dB/MHz for example, was sufficient to cause a BER\geq10^{-3} . Such dispersion occurred at (average power) fade depths as shallow as 20 dB. However, average fade depth was a poor indicator of BER performance. The measured hop missed short haul outage objectives by an order of magnitude without space-diversity, and was close to acceptable when diversity was activated.

Analysis of Multipath Outage with Applications to 90-Mbit/s PSK Systems at 6 and 11 GHz

Abstract: An analytical study to predict multipath fading outages in terrestrial digital radio systems is described. The method, which is quite general, makes specific use of previously reported statistics on multipath fading. It is applied, in this study, to 6- and 11-GHz systems carrying 90 Mbits/s per RF channel. For purposes of comparing alternate approaches, three different modulations are considered, namely, (i) conventional QPSK at 45 Mbits/s, using two polarizations per channel; (ii) Offset-QPSK at 45 Mbits/s using two polarizations per channel; and (iii) 8-level PSK at 90 Mbits/s, using one polarization per channel. In all cases, a fourthorder Butterworth transmit filter is assumed which enforces FCC spectral emission requirements. The channel is treated as a two-path propagation medium, the receiver is assumed to be coherent, and various practical assumptions are invoked regarding the recovered carrier phase, timing phase, receive filter response, bit error rate objectives and fade margin. Results are given in terms of expected yearly fraction of multipath outage per repeater hop vs. hop length. We find that the choice of operating band has only a minor effect on the results; that OffsetQPSK systems suffer somewhat more multipath outage than conventional QPSK systems; that 8-level systems suffer more multipath outage than 4-level systems (although this difference may be offset by cross-polarization effects in the latter); and that all the approaches considered require repeater spacings of 15 mi or less in order to meet short-haul outage objectives over average terrain.

Synchronizing technique for an error correcting digital transmission system

Abstract: The instant invention resides in a system, including an encoder and a decoder, for the transmission and retrieval of digital data over a transmission medium. The encoder includes an error correction encoding scheme which processes the data and produces an encoded bit stream including data and parity bits in either an interspersed or blocked relationship. A transmission bit stream is generated by modulo-2 adding the encoded bit stream with a predetermined sync sequence, which sync sequence is selected to provide optimum sync detection at the decoder site. The encoder modulo-2 subtracts said sync sequence from the received transmission stream, thereby producing a resultant which is monitored by an error correction detector. The detector produces an in- or out-of-synchronization indication as determined by the number of resultant bit stream detected errors.

Digital phase lock loop for flexible disk data recovery system

Abstract: A digital phase lock loop system used in conjunction with a flexible disk drive controller for recovering data information from either single density or double density serially encoded data. More specifically, a phase lock system is disclosed in which data bit windows and clock bit windows are defined by a plurality of phase clock cycles. A circuit is provided for determining during which phase clock cycle a bit occurs, an adjustment being made to the duration of its corresponding bit window and thus to the initiation time of a subsequent bit window which will tend to position the window so that it will be centered about its corresponding bit. In a specific embodiment for double density encoded data, a circuit is provided whereby the subsequent bit window is positioned in accordance with the position of the current bit within its corresponding window and the position of a preceding bit within its corresponding bit window. In addition, the invention provides a circuit whereby a position of each bit within its corresponding window is counted, the net count being indicative of the number of bits appearing in the second half of their corresponding bit windows less the number of bits appearing in the first half of their corresponding bit windows. A bias phase adjustment signal is generated for altering the duration of a bit window until the net count approaches zero. This altering provides for automatic compensation of variations in disk rotation speed and/or recording speed variations.

On-line bit error rate estimator

Abstract: This on-line circuit estimates the bit error rate (BER) of a binary data signal stream in the presence of noise uncorrelated with the signal. For a binary data signal having two states, e.g., plus V and minus V biased around a specified reference level (REF), the circuit counts the number of instances in which the received signal deviates more than 2V from the reference level. This accumulated count gives an accurate estimate of the BER over several orders of magnitude variation of the BER. One embodiment counts just the deviations in a positive direction. This circuit functions independently of any bit pattern and can be used for on-line monitoring without decreasing the information carrying capability of the link. The time required to accumulate a statistically significant sample is the same as for a direct comparison between sent and received bits.

16 QAM Modulation for High Capacity Digital Radio System

Abstract: A computational method allowing the calculation of bit error rate in the presence of filtering and some other impairments is described for 16 QAM modulation; a breadboard working at a bit rate of 140 Mbits/s has been implemented and experimental results are compared with calculated values. The possible use of this modulation type for a high capacity digital radio-relay system is considered. Some parameters are introduced for this purpose, especially the net fade margin parameter. In the case of the 140 Mbit/s system in the 10.7-11.7 GHz frequency band, 4 PSK and 8 PSK modulation types are compared with 16 QAM. System gain, frequency arrangement, nodal capacity and outage performances are evaluated.

Simulation and Measured Performance of a Space Diversity Combiner for 6 GHz Digital Radio

Abstract: This paper presents a model which describes the operation and performance of the cophasing space diversity combiner used in radio propagation experiments on a Bell System one-hop line-of-sight path utilizing a 6 GHz, 8 PSK digital radio system. This model was confirmed by comparing the model predictions with the recorded spectrum observed in the 1977 field tests. Analysis of the model has demonstrated that a cophasing combiner maximizes power but does not minimize in-band amplitude variation with frequency which is the prime impairment for 8 PSK systems. This is the main reason that, at a bit error rate of 1 \times 10^{-3} appropriate to voice circuit application, the diversity improvement observed was a factor of six relative to the expected nondiversity performance. A simulation showed an additional factor of two improvements for an ideal maximum power combiner. An ideal linear adaptive equalizer was also simulated for each antenna. The improvment relative to nondiversity performance without an equalizer was estimated to be in the range of 3 to 6. The combination of combiner and ideal equalizer would have reduced outage to a negligible amount.

System for monitoring bit errors

Abstract: A system for monitoring bit errors in digital differential phase modulation communications, comprising a parity counter for counting "1" pulses among n succesive bits at intervals of n bits (n is a positive integer) in a pulse train and for producing a parity bit. The parity bit is located in each side of a transmitter and a receiver, whereby, the parity bit counted in the receiver and the parity bit transmitted from the transmitter to the receiver are compared with each other.

Spectrum efficiency of a frequency-hopped-DPSK mobile radio system

Abstract: We estimate the spectrum efficiency (bits/sec. per unit bandwidth) of a Frequency-Hopped-DPSK modulation technique proposed for use in urban mobile radio systems. The analysis is based on simple models for the factors influencing system performance, and requires no computer simulations. It permits straightforward evaluation of spectrum efficiency over a broad range of system parameters. For an isolated service area (cell) with no propagation impairments, the efficiency is 0.12 at a bit error rate of 10-3. When interference from nearby cells is considered (assuming centrally located base stations with omnidirectional antennas), the efficiency falls to 0.03 - 0.05, depending on how much performance degradation can be tolerated near the cell boundaries. Finally, the effects of multipath (Rayleigh) fading reduce system efficiency to 0.02 - 0.04.

Transmitter diversity for a digital FM paging system

Abstract: Multipath fading is one of the most serious problems for the signal transmission in mobile radio. To combat this problem, the application of transmitter diversity to a digital FM paging system is described. The method is to transmit two digital FM paging signals with different modulation indices, each of which is modulated by an identical binary signal, from separate antennas. It is shown that the same action obtained with the well-known selection diversity can be achieved when the difference between the modulation indices is equal to two. The diversity effect on the bit-error-rate (BER) performance is theoretically analyzed. The diversity effect on the BER performance in a 600-bit/s Manchester-coded digital FM system is verified by the laboratory simulation tests using a Rayleigh fading simulator.

Method of synchronizing a quadphase receiver and a clock synchronization device for carrying out the method

Abstract: 15.5.79 1 PHN.9387 ABSTRACT "Method of synchronizing a quadphase receiver and clock synchronization device for carrying out the method" The invention relates to a method for the clock synchronization of a receiver for demodulating a quadphase coded data signal and to a clock synchroniza-tion device for carrying out the method. Four elementary signal forms can be distinguished in a quadphase coded data signal. Each ele-mentary signal form represents two-bit information, these two bits being transmitted in a first and a second half bit interval and these two bits being transmitted in the inverted form in a third and a fourth half bit interval. The information in the second interval is consequently highly correlated with the information in the first bit interval. The four quadphase code words have been chosen from the sixteen code words which can be formed with four bits and that in such a manner that only two-bit information is transmitted with these four bits. This is achieved by making the first and the second bit of the quadphase code word equal to the two-bit information of the signal to be coded and by making the third and the fourth bit equal to the inverse value of the two-bit information. In the method according to the invention the first bit is compared (correlated) with the third bit and the second bit with the fourth bit: a high degree of correlation indicates 15.5.79 2 PHN.9387 that synchronization has been obtained and a low degree indicates absence of synchronization. The invention is used in the field of optical and magnetic recording and in the field of data transmission over physical pairs of wires.

Performance of a two-branch radiotelephone selection diversity receiver

Abstract: This paper describes an 800 MHz two-branch selection diversity receiver designed for use at the base site of a cellular mobile telephone system. Audio S/N and bit error rates measured with a simulated Rayleighfaded carrier signal are compared with computer predicted results generated from audio signal and noise measurements and bit error rate data taken with a nonfaded carrier signal. The receiver audio S/N performance with unequal branch gains is investigated. Results are compared with those obtained for a maximal ratio diversity receiver.

Optimum Modulation and Channel Filters for Nonlinear Satellite Channels

Abstract: This is a comparative study of three modulation schemes: QPSK, Offset QPSK(OQPSK), and MSK, in nonlinear satellite channels with adjacent channel interference. Two kinds of typical satellite channel models are used for performance evaluation: one is an INTELSAT type narrow band model and the other is a domestic type wide band model. The transmitter filter and receiver filter are optimized for each combination of modulation scheme, channel model, and an input back-off condition for nonlinear amplifiers. All the combinations considered here have the optimum division of the Nyquist shaping between transmitter filter and receiver filter in common. The filters are a wide band sharp cut-off transmitter filter with flat inband response and a gently rolled-off Nyquist receiver filter with an aperture equalizer ( x/\sin x or 1-(2x)^{2}/\cos x equalizer). With these optimized filters, comparisons are made with respect to the bit error rate (BER) performance and phase jitter of the recovered carrier. OQPSK and MSK show superior BER performance to QPSK in the wide band model. However, in the narrow band model, QPSK shows the best BER performance among the three modulation schemes. The phase jitter in the recovered carrier is small for all modulation schemes in the wide band model. But, in the narrow band model, the phase jitter in OQPSK and MSK is four times larger than in QPSK. Generally QPSK is the most preferable modulation scheme in the narrow band model: OQPSK and MSK are most preferable for the wide band model.

Hardware for Detection and Partial Correction of PCM Transmission Errors

Abstract: In pulse code modulation of speech, transmission errors cause changes in the statistical properties of the received samples. Recently published work describes computer simulations of a difference detection and correction (DDC) system which detect errors on the basis of these changes. The system examines the differences between adjacent received samples. If a particular difference exceeds a threshold, which is dependent on the rms value of a block of 64 differences, the quantized sample responsible for this large difference is deemed to be erroneous. A nonlinear filter of the median type is then introduced as a corrector. We now present a comprehensive description of the hardware realization of this system, and present measured results of signal-to-noise ratio (snr) as a function of bit error rate, input power and the error criterion for narrow-band white noise input signals. An improvement of 6 dB in snr is achieved for error rates between 0.2 and 2.0%. The snr results are consistent with subjective impressions of the quality of speech processed by the DDC system.

Characteristics of Manchester-Coded FSK

Abstract: In this paper, the Manchester-coded frequency-shift-keyed (MCFSK) signal is shown to be representable in terms of an in-phase (I) and a quadrature (Q) carrier term. The I -term carries the bit timing and the Q -term carries the message information. Based on this representation, a simple derivation of the power spectral density for MCFSK is presented. The effect of premodulation pulse shaping on the spectral occupancy of MCFSK is then investigated using trapezoidal, triangular and cosine-squared pulses. Formulas for the power spectral density are derived and curves of fractional in-band power are obtained which will be useful for band occupancy determination. Finally, the bit error rate (BER) performance for MCFSK in an ideal channel is derived and shown to be the same as that for coherent FSK.

Low-noise optical detection of a 1.1 Gb/s optical data stream

Abstract: A low-noise, 1.1 Gb/s optical receiver has been built using a silicon a.p.d. and a GaAs f.e.t. The receiver sensitivity was evaluated using error-rate measurements, and for a bit error rate of 10−9, with no fibre, the measured optical sensitivity was −37.0 dBm. These results are used as a basis for the calculation of maximum repeater spacings for 1.1 Gb/s systems operating at 0.85 μm and 1.25 μm wavelengths.

Theoretical analysis of bit error rate considering intertrack crosstalk in digital magnetic recording equipment

Abstract: Intertrack crosstalk evaluation is a very significant problem in high-track-density digital magnetic recording. This report is intended to introduce theoretical analyses of bit error rate with the existence of such crosstalk and Gaussian noise. Analytical expressions for the cross-talk are obtained considering the arctangent magnetization and only the longitudinal component of the magnetization vector, they are found to be practically useful. Then, taking the MFM {110} pattern as an example, the bit error rate is analyzed and simple approximated expressions are derived. In the process of these analyses, the pattern peak shift and reproduced waveform for MFM {110} are clarified analytically, and a comparison between crosstalk and Gaussian noise jitter is made.

Implications of a selective acknowledgment scheme on satellite performance

Abstract: Data link response time is becoming more of a concern today with the onset of satellite transmissions of computer data. The long propagation delay inherent to satellite communications may lead to a degradation in data link response time as compared to the same transmission over purely terrestrial links. Furthermore, data link errors need be considered in any such study of response time of satellite data links. A model has been developed to study data link response time under a selective acknowledgment retransmission protocol. The model not only calculates mean link response time, but also the second moment of the response time. This model is then applied to various interactive data transmission schemes over a half-duplex (HDX) satellite link with terrestrial tails, although modifications can easily be made to analyze pure terrestrial or satellite links. The model parameters include bit error rate (BER), terrestrial as well as satellite propagation delay, modem transit delay, MAXOUT (maximum number of unacknowledged data frames), frame size (bits), and message size (bits).

Evaluation of a Method for Interference Control in Analog FM Systems

Abstract: We discuss a possible method for interference control in radio systems whose desired signal is analog FM. The method utilizes the fact that the desired signal has a nearly constant envelope; with interference present, the composite envelope becomes noisy. A controlling processor measures this additional envelope noise, and iteratively adjusts the complex combining gain of an auxiliary signal to minimize the interference. The expected residual interference remaining after minimization is proportional to the reciprocal of the square of the rms envelope fluctuation of the desired signal. This result was confirmed in a laboratory simulation of an intersecting radio route case using both large and small index FM. Beginning with signal-to-interference ratios of 30 to 40 dB, the controller increased these numbers to about 60 dB, the expected theoretical limit for a signal with 0.1 percent rms envelope fluctuation.

Processing apparatus for data rate reduction

Abstract: A digital channel bank (11) has a plurality of channel units (17) interconnected to a digroup controller (10) over a shared data bus (30). A data processing circuit (FIG. 2) is included in each channel unit for the purpose of reducing the received signaling status information transmitted from each channel unit to the controller. The circuit (e.g., gates 24-27) serves to prevent single bit errors from being recognized as changes in the received signaling state. The circuit (gate 28) also insures that only changes in the signaling status, rather than current status, are reported to the controller. The circuit also incorporates a predetermined amount of delay for the purpose of eliminating multiple messages to the controller when the A and B path signaling bits change in adjacent signaling frames.

Memory error detection and error correction

Abstract: A memory in which each word location for a user word not only contains the bit locations for the actual data but also one parity bit for the parity over the entire word location and one correction bit. A fixed number of word locations are grouped to form a memory location for the storage of a memory word. When a word location is read by a data user, the parity bit indicates whether the word location contains none or one bit error. If the user word contains an error, the other word locations of the same memory location and also the associated correction bits are read to correct one arbitrary bit error in the memory word. In given cases, a plurality of bit errors can be corrected if they are situated in bit positions of the same rank within the word locations for the user words. The chance that a multiple error has exactly this configuration can be enhanced by a suitable arrangement of the bit locations in a memory. Thus, a limited amount of redundancy suffices in many cases. Memory words in different memory banks may have correction bits in common.

Data transmission system as well as method and circuit arrangement for running such a data transmission system

Abstract: 1. Data transmission system comprising data-emitting and data-receiving data channels, wherein the data bits together with control bits are synchronously transmitted in envelopes, characterized in that each envelope posseses data bits of at least two data-emitting data channels, and that the control bits are utilized as sole synchronizing information for a bit synchronization and bit group synchronization.