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Showing papers on "Buck–boost converter published in 2003"


Journal ArticleDOI
TL;DR: In this paper, an optimized method of harvesting vibrational energy with a piezoelectric element using a step-down DC-DC converter is presented, in which the converter regulates the power flow from the PPE element to the desired electronic load.
Abstract: An optimized method of harvesting vibrational energy with a piezoelectric element using a step-down DC-DC converter is presented. In this configuration, the converter regulates the power flow from the piezoelectric element to the desired electronic load. Analysis of the converter in discontinuous current conduction mode results in an expression for the duty cycle-power relationship. Using parameters of the mechanical system, the piezoelectric element, and the converter; the "optimal" duty cycle can be determined where the harvested power is maximized for the level of mechanical excitation. It is shown that, as the magnitude of the mechanical excitation increases, the optimal duty cycle becomes essentially constant, greatly simplifying the control of the step-down converter. The expression is validated with experimental data showing that the optimal duty cycle can be accurately determined and maximum energy harvesting attained. A circuit is proposed which implements this relationship, and experimental results show that the converter increases the harvested power by approximately 325%.

635 citations


Journal ArticleDOI
TL;DR: In this article, an integrated single-inductor dual-output boost converter is presented, which adopts time-multiplexing control in providing two independent supply voltages (3.0 and 3.6 V) using only one 1/spl mu/H off-chip inductor and a single control loop.
Abstract: An integrated single-inductor dual-output boost converter is presented. This converter adopts time-multiplexing control in providing two independent supply voltages (3.0 and 3.6 V) using only one 1-/spl mu/H off-chip inductor and a single control loop. This converter is analyzed and compared with existing counterparts in the aspects of integration, architecture, control scheme, and system stability. Implementation of the power stage, the controller, and the peripheral functional blocks is discussed. The design was fabricated with a standard 0.5-/spl mu/m CMOS n-well process. At an oscillator frequency of 1 MHz, the power conversion efficiency reaches 88.4% at a total output power of 350 mW. This topology can be extended to have multiple outputs and can be applied to buck, flyback, and other kinds of converters.

345 citations


Patent
21 Apr 2003
TL;DR: In this article, a multi-mode renewable power converter system is presented, which includes a control unit, a boost converter, an inverter, and an optional bi-directional charger, where the boost converter converts DC output of a solar cell or a renewable source to high DC bus voltage, and the inverter converts this voltage to an AC output.
Abstract: A multi-mode renewable power converter system is disclosed. The system includes a control unit, a boost converter, an inverter and optional bi-directional charger, wherein the boost converter converts DC output of a solar cell or a renewable source to high DC bus voltage, and the inverter converts this DC bus voltage to an AC output. This power converter can be used to support standalone load or grid-connected system with a dynamic maximum power point tracking (MPPT) circuit. The MPPT circuit detects the current and voltage from the solar cell and indicates to the inverter to provide power to the load connected. When the optional bi-directional charger is installed, the MPPT signal is also fed to this charger to make the power efficiency maximized for the system.

237 citations


Patent
28 Jul 2003
TL;DR: In this paper, a PWM controller is included in the power converter in order to generate a signal controlling a switching transistor in response to a flyback voltage sampled from a first primary winding of the power supply transformer.
Abstract: The present invention provides a primary-side flyback power converter that supplies a constant voltage output and a constant current output. To generate a well-regulated output voltage under varying load conditions, a PWM controller is included in the power converter in order to generate a PWM signal controlling a switching transistor in response to a flyback voltage sampled from a first primary winding of the power supply transformer. Several improvements are included in this present invention to overcome the disadvantages of prior-art flyback power converters. Firstly, the flyback energy of the first primary winding is used as a DC power source for the PWM controller in order to reduce power consumption. A double sample amplifier samples the flyback voltage just before the transformer current drops to zero. Moreover, an offset current is pulled from a detection input of the double sample amplifier in order to generate a more accurate DC output voltage. The offset current is generated in response to the temperature in order to compensate for temperature-induced voltage fluctuations across the output rectifier. Ultimately, in order to maintain a constant output current, the PWM controller modulates the switching frequency in response to the output voltage.

154 citations


Journal ArticleDOI
12 Oct 2003
TL;DR: In this article, the reverse blocking insulated gate bipolar transistor (RB-IGBT) was used in three power converter topologies, namely, the matrix converter, the two-stage direct power converter, and the three-level voltage source rectifier.
Abstract: A new semiconductor power device that is urgently needed particularly in power converter topologies, the reverse blocking insulated gate bipolar transistor (RB-IGBT), has been realized by adding minor changes to the structure of a standard IGBT to make it capable of withstanding reverse voltage. However, the switching behavior of the device's intrinsic diode during reverse recovery is not as good as a discrete IGBT and series diode implementation. This paper analyzes the use of this device in three power converter topologies that may benefit from it, namely: 1) the matrix converter, 2) the two-stage direct power converter (DPC), and 3) the three-level voltage source rectifier. A commutation method to override the poor reverse-recovery characteristic of the RB-IGBT intrinsic diode in a two-stage DPC is proposed. A loss analysis shows that by using RB-IGBTs the efficiency of the two-stage DPC becomes similar to a two-level voltage source converter.

138 citations


Patent
03 Dec 2003
TL;DR: In this article, a user-programmable control circuit for a power converter to automatically switch the converter into BURST mode when load current demand is low is presented. But it is not shown how the converter can be switched to BURST when the signal indicative of the average monitored output current decreases below a userprogrammable threshold.
Abstract: The present invention comprises a user-programmable control circuit for use in a power converter to automatically transition the converter into BURST mode when load current demand is low. The control circuit senses load current demand by monitoring the output current of the converter, and generating a signal representative of the monitored output current. The control circuit may automatically transition the converter into BURST mode when the signal indicative of the average monitored output current decreases below a user-programmable threshold. BURST mode may increase overall converter efficiency by turning OFF a plurality of electronic components, and maintaining the converter's output voltage at a regulated level by energy stored in an output capacitor.

132 citations


Journal ArticleDOI
Peng Xu1, Jia Wei2, Fred C. Lee2
TL;DR: In this article, a novel topology named multiphase coupled-buck converter is proposed, which enables the use of a large duty cycle with recovered leakage energy and clamped MOSFET voltage.
Abstract: The most popular VRM topology-multiphase buck converter operates at a very small duty cycle due to a high input voltage and a low output voltage. The performance of the multiphase buck converter suffers from the very small duty cycle. Alternative topologies with an extended duty cycle are explored in order to improve the efficiency without compromising the transient response. A novel topology named multiphase coupled-buck converter is proposed, which enables the use of a large duty cycle with recovered leakage energy and clamped MOSFET voltage. The input filter is further integrated in the proposed circuit to reduce the number of components. A 12 V-to-1.5 V/50 A VRM prototype demonstrates that the multiphase coupled buck converter can have a much better efficiency than the multiphase buck converter with the same transient response.

131 citations


Proceedings ArticleDOI
25 May 2003
TL;DR: Versatility, high voltage gain and a good transient response are the features of the proposed converter, which compares favorably with a quadratic boost converter as regarding the count of devices and efficiency.
Abstract: By splitting the output capacitor of a basic boost converter, and combining the resulting capacitors with the main switch in the form of a switched-capacitor circuit, a new step-up structure is realized. Without using a transformer, a high line-to-load DC voltage ratio is obtained. An output filter is added as usual in boost converters for getting a free-ripple output. The circuit compares favorably with a quadratic boost converter as regarding the count of devices and efficiency, even if it presents a lower DC gain. A DC analysis of the novel converter is presented. Experimental and simulation results confirm the theoretical expectations. By increasing the number of capacitors in the switched-capacitor circuit, higher gains are obtained. Versatility, high voltage gain and a good transient response are the features of the proposed converter.

128 citations


Journal ArticleDOI
TL;DR: In this paper, a generalized circuit structure of bi-directional switched-capacitor dc/dc converters that feature voltage stepdown, voltage step-up, and power flow was presented.
Abstract: This paper presents a generalized circuit structure of bi-directional switched-capacitor dc/dc converters that feature voltage step-down, voltage step-up, and bi-directional power flow. The starting point is the derivation of two structures of single-capacitor bi-directional converter cells. Current control scheme is applied in the capacitor-charging phase, resulting in a near-constant capacitor charging current and low electromagnetic interference. A converter string is then formulated by cascading a number of converter cells, in order to meet the input and output voltage requirements and conversion efficiency. By paralleling two similar strings and operating them in the anti phase, the overall converter input current becomes continuous. A reduced-order modeling and state-space averaging technique are used to study the static and dynamic behavior of the converter. The theoretical conversion efficiency in the step-down and step-up mode, respectively, is investigated for different voltage-conversion ratios and numbers of stages. The performance of the proposed structure is experimentally verified on a 5-V/12-V prototype.

118 citations


Journal ArticleDOI
01 Jun 2003
TL;DR: An analysis of an on-chip buck converter and a model of the parasitic impedances of a buck converter are developed and full integration of a high-efficiency buck converter on the same die with a dual-V/sub DD/ microprocessor is demonstrated to be feasible.
Abstract: An analysis of an on-chip buck converter is presented in this paper. A high switching frequency is the key design parameter that simultaneously permits monolithic integration and high efficiency. A model of the parasitic impedances of a buck converter is developed. With this model, a design space is determined that allows integration of active and passive devices on the same die for a target technology. An efficiency of 88.4% at a switching frequency of 477 MHz is demonstrated for a voltage conversion from 1.2-0.9 volts while supplying 9.5 A average current. The area occupied by the buck converter is 12.6 mm/sup 2/ assuming an 80-nm CMOS technology. An estimate of the efficiency is shown to be within 2.4% of simulation at the target design point. Full integration of a high-efficiency buck converter on the same die with a dual-V/sub DD/ microprocessor is demonstrated to be feasible.

109 citations


Patent
05 Sep 2003
TL;DR: In this article, an arrangement for supplying electrical energy to a load from a direct electrical energy converter that optimizes converter power generation efficiency is provided for the purpose of providing power to the load.
Abstract: An arrangement is provided for supplying electrical energy to a load from a direct electrical energy converter that optimizes converter power generation efficiency. The arrangement for optimizing converter power generation efficiency includes an impedance transformation circuit coupled between the energy converter and load for regulating current delivered by the energy converter so as to maximize power delivered to the load.

Patent
13 May 2003
TL;DR: In this paper, a single-stage input-current-shaping (S2ICS) flyback converter achieves substantially reduced conduction losses in the primary side by connecting a bypass diode between the positive terminal of a full-bridge rectifier and the positive terminals of an energy-storage capacitor.
Abstract: A single-stage input-current-shaping (S2ICS) flyback converter achieves substantially reduced conduction losses in the primary side of the S2ICS flyback converter by connecting a bypass diode between the positive terminal of a full-bridge rectifier and the positive terminal of an energy-storage capacitor. An effective current interleaving between an energy-storage inductor and the bypass diode is thus obtained in the S2ICS flyback converter around the peak of the rectified line voltage, resulting in a significantly reduced input-current ripple and reduced current stress on the switch. Further, by rearranging the rectifiers in the ICS part of the S2ICS flyback converter in such a way that the energy-storage capacitor and the ICS inductor are connected to the ac line voltage through only two rectifiers, one diode forward-voltage drop is eliminated, which results in a substantially reduced conduction loss in the primary-side rectifiers.

Patent
18 Jun 2003
TL;DR: In this paper, the flyback voltage is sampled following a delay time to reduce interference from the inductance leakage of the transformer, and a bias current is pulled from the detection input to form a voltage drop across a detection resistor for compensating for the voltage drop of the output rectifying diode.
Abstract: A primary-side flyback power converter supplies a constant voltage and a constant current output. To generate a well-regulated output voltage under varying load conditions, the power converter includes a PWM controller. The PWM controller generates a PWM signal to control a switching transistor in response to a flyback voltage detected from the first primary winding of the power supply transformer. To reduce power consumption, the flyback energy of the first primary winding is used as a DC power source for the PWM controller. The flyback voltage is sampled following a delay time to reduce interference from the inductance leakage of the transformer. To generate a more accurate DC output voltage, a bias current is pulled from the detection input to form a voltage drop across a detection resistor for compensating for the voltage drop of the output rectifying diode.

Journal ArticleDOI
15 Jun 2003
TL;DR: The operational principles, design details and performances of the converter are discussed along with soft-switching characteristics through experimental results, and design criteria on the dc-dc converter are focused on the minimization of the circulation current between main switches and a transformer under soft switching.
Abstract: This paper describes a newly developed three-level dc-dc converter with wide-input voltage operations for ship-electric-power-distribution systems. The proposed converter is designed with zero-voltage-switching (ZVS) techniques. The operational principles, design details and performances of the converter are discussed along with soft-switching characteristics through experimental results. Furthermore, design criteria on the dc-dc converter are focused on the minimization of the circulation current between main switches and a transformer under soft switching. The converter has achieved about 95% efficiency over wide 7-kW load conditions.

Journal ArticleDOI
TL;DR: Nonminimum phase tracking control is studied for boost and buck-boost power converters and the sliding mode controller is designed to track directly a causal voltage tracking profile given by an exogenous system.

Proceedings ArticleDOI
12 Oct 2003
TL;DR: The design of the power semiconductors, the installed switch power, converter losses, the semiconductor loss distribution, modulation strategies and the harmonic spectra are compared in detail.
Abstract: This paper compares a two level voltage source converter (2L-VSC), a three-level neutral point clamped voltage source converter (3L-NPC VSC), a three-level flying capacitor voltage source converter (3L-FLC VSC) and a four-level flying capacitor voltage source converter (4L-FLC VSC) on the basis of state-of-the-art 65 kV, 33 kV and 25 kV IGBTs for a 23 kV medium voltage converter The design of the power semiconductors, the installed switch power, converter losses, the semiconductor loss distribution, modulation strategies and the harmonic spectra are compared in detail


Patent
21 Nov 2003
TL;DR: In this article, an analog comparator is used to compare a signal representative of the current flowing in the power converter against a voltage reference, which can be programmable and can send signals for the status of various conditions (e.g., output voltage, current protection levels, standby-mode, normal mode, and power ON or OFF commands).
Abstract: A power converter using a microcontroller is disclosed herein. In one embodiment, the power converter can be a digital flyback or forward converter. The microcontroller may have a digital pulse-width-modulation (PWM) controller, arithmetic logic unit (ALU) core, internal random access memory (RAM), read-only memory (ROM), and one or more analog-to-digital (A/D) and digital-to-analog (D/A) converters. For a fast dynamic response in an inner current control loop, an analog comparator is used to provide analog-based current control. The analog comparator may compare a signal representative of the current flowing in the power converter against a voltage reference, which can be programmable. The analog comparator may be integrated with the digital microcontroller into single integrated circuit (IC) chip. Furthermore, the power converter can send signals for the status of various conditions (e.g., output voltage levels, current levels, errors, etc.) or can receive signals for system control commands (e.g., output voltage, current protection levels, standby-mode for a lowest power consumption, normal mode, and power ON or OFF commands) via a serial communication port.

Patent
15 Jul 2003
TL;DR: In this paper, an increasing input power reference is applied to the converter, such that the derivative of the converter input voltage with respect to time is greater than a first negative threshold value, and a decreasing input power value is less than a second positive threshold value.
Abstract: The solar generator (10) is connected to a DC- DC converter (14). A control acts on the DC-DC converter in order to manage the output voltage provided, thus enabling maximum power to be drawn from the solar generator. The power source (10), such as a solar generator, offers a power graph which is a function of the voltage on its terminals, with a maximum value. The source is connected to provide power to a DC- DC converter (14). In order to manage the source, an input power reference is applied to the converter. An increasing input power reference is applied to the converter, such that the derivative of the converter input voltage with respect to time is greater that a first negative threshold value, and a decreasing input power reference is applied such that the derivative of the converter input voltage with respect to time is less than a second positive threshold value. The rate of variation of the average power when the reference in increasing is chosen to be less than the opposite of the rate of variation of the average power when the reference is decreasing.

Proceedings ArticleDOI
19 Feb 2003
TL;DR: A novel single-stage full-bridge series-resonant buck-boost inverter (FB-SRBBI) is proposed in this paper and it provides high power efficiency above 90% under the rated power.
Abstract: A novel single-stage full-bridge series-resonant buck-boost inverter (FB-SRBBI) is proposed in this paper. The proposed inverter only includes a full-bridge topology and a LC resonant tank without auxiliary switches. The output voltage of the proposed inverter can larger or lower than the DC input one, depending on the instantaneous duty-cycle. This property is not found in the classical voltage source inverter, which produces an AC output instantaneous voltage always lower than the DC input voltage. The proposed inverter circuit topology provides the main switch for turn-on at ZCS by a resonant tank built before the output choke. The nonlinear control strategy is designed against the input DC perturbation and achieves good dynamic regulation. An average approach is employed to analyze the system. A design example of 500 W DC/AC inverter is examined to assess the inverter performance and it provides high power efficiency above 90% under the rated power.

Proceedings ArticleDOI
19 Feb 2003
TL;DR: In this paper, a scalable multiphase synchronous buck converter is presented, which meets the tight requirements of the next generation microprocessors and can be easily expanded or paralleled with other voltage regulator modules through an average current share bus.
Abstract: The paper presents a scalable multiphase synchronous buck converter which meets the tight requirements of the next generation microprocessors. Flexibility in the number of phases (1-16 phases) accommodates requirements of various applications. The converter can be easily expanded or paralleled with other voltage regulator modules (VRM) through an average current share bus. The distributed control IC architecture allows for local phase current signal processing, which minimizes induced noise and facilitates layout while reducing the gate driver to power stage impedance. The experimental results are given to show the advantages of the converter.

Patent
24 Jul 2003
TL;DR: In this paper, a power factor correcting power supply includes an input stage power converter and an output stage power converter, and an opposed current converter is used to perform power factor correction and voltage regulation.
Abstract: A power factor correcting power supply includes an input stage power converter and an output stage power converter. The input stage power converter includes an opposed current converter and a power factor correction controller. The power factor correction controller may direct the operation of the opposed current converter to perform power factor correction and voltage regulation. The opposed current converter is supplied AC input voltage and AC input current from a power source. The AC input voltage is converted to a DC boost voltage by the opposed current converter. The DC boost voltage may be converted to a desired DC output voltage by the output stage power converter. The desired DC output voltage may be provided on a DC rail for a load of the power factor correcting power supply.

Journal ArticleDOI
TL;DR: In this article, a closed form cycle by cycle analysis of a phase-shifted PWM (PSPWM) full bridge power converter small-signal model is presented.
Abstract: A closed form cycle by cycle analysis forms the basis for a new zero-voltage switching (ZVS) phase-shifted PWM (PSPWM) full bridge power converter small-signal model. The paper derives the small-signal response equations. The PSPWM converter has an implicit "slew interval," making the converter dynamics difficult to analyze using traditional averaging techniques. The converter control to output transfer function under continuous conduction mode operation and using voltage-mode control does not exhibit a second order pole associated with the output L-C filter, making it different from a conventional PWM converter. This new PSPWM converter model shows that the output L-C filter is separated into two real poles, with one pole held at constant frequency independent of operating conditions. A characteristic pole depends only upon the converter switching frequency and inductor values. This characteristic pole is fundamental to understanding the PSPWM converter natural and forced responses. The new small-signal model is shown to be in excellent agreement with experimental results.

Journal ArticleDOI
08 Apr 2003
TL;DR: The analysis, design, and implementation of an active clamped ZVS forward converter equipped with a soft-switched synchronous rectifier (ACFC-SR), proposed for high-efficiency low output voltage DC-DC converter applications, is presented.
Abstract: The analysis, design, and implementation of an active clamped ZVS forward converter equipped with a soft-switched synchronous rectifier (ACFC-SR), proposed for high-efficiency low output voltage DC-DC converter applications, is presented The converter efficiency is maximised due to soft switching of the main, active clamp, synchronous rectifier, and freewheeling MOSFET switches The operating principles of the ACFC-SR are analysed in detail, and the converter performance is compared with that of alternative forward converter schemes employed in low output voltage DC-DC converters, in view of their power conversion efficiency Experimental results are presented for a 50 W ACFC-SR converter with a DC input voltage of 48 V, an output voltage of 5 V, and operating at a switching frequency of 120 kHz In general, good agreement is observed between the theoretical and experimental results

Journal ArticleDOI
TL;DR: Investigation of the bifurcation behavior of the power-factor-correction boost converter under a conventional peak current-mode control reveals interesting effects of variation of some chosen parameters on the stability of the converter.
Abstract: The aim of the paper is to investigate the bifurcation behavior of the power-factor-correction (PFC) boost converter under a conventional peak current-mode control. The converter is operated in continuous-conduction mode. The bifurcation analysis performed by computer simulations reveals interesting effects of variation of some chosen parameters on the stability of the converter. The results are illustrated by time-domain waveforms, discrete-time maps and parameter plots. An analytical investigation confirms the results obtained by computer simulations. Such an analysis allows convenient prediction of stability boundaries and facilitates the selection of parameter values to guarantee stable operation.

Proceedings ArticleDOI
15 Jun 2003
TL;DR: In both operating modes, the converter can achieve ZVS operation in the entire load range by using the magnetizing inductance of the transformer, and can operate with wide input voltage variations without penalizing the efficiency.
Abstract: This paper presents a zero-voltage-switching (ZVS) three-level DC/DC resonant converter for high-power distributed power systems. The paper first addresses the operation of the converter at a fixed frequency, which is achieved by applying phase-shift control between the primary and the secondary sides of the transformer. Next, the operation of the converter at variable frequency is presented. In both operating modes, the converter can achieve ZVS operation in the entire load range by using the magnetizing inductance of the transformer. In addition, the converter can operate with wide input voltage variations without penalizing the efficiency. As a result, the converter is suitable for applications in which high efficiency and high power density are required. The principle of operation for the converter is analyzed and verified on a 2.75 kW, 745 kHz experimental prototype.

Patent
10 Jun 2003
TL;DR: An impedance source power converter includes a power source, a main converter circuit and an impedance network as mentioned in this paper, where the main converter is coupled to a load and the impedance network couples the power source to the main converters.
Abstract: An impedance source power converter includes a power source, a main converter circuit and an impedance network. The main converter circuit is coupled to a load and the impedance network couples the power source to the main converter circuit. The impedance network is configured such that the main converter circuit is adapted to perform both buck conversion and boost conversion.

Proceedings ArticleDOI
02 Nov 2003
TL;DR: In this article, the authors describe step by step the process of designing, constructing and testing a bidirectional buck-boost converter, which is capable of transferring 200 A for several minutes with low loses and no core saturation (air core was used).
Abstract: This paper describes step by step the process of designing, constructing and testing a bidirectional buck-boost converter. This converter is conceiving to be used as a controlled energy-transfer-equipment between the main energy source of an electric vehicle (a battery pack in this case) and an auxiliary energy system based on ultracapacitors. The converter is able to transfer energy in both directions, at rates of more than 40 kW. The battery pack's nominal voltage is 330 V, while the ultracapacitor's voltage depends on their state of charge (SOC), ranging from 100 V to 300 V. Equations governing current transfer and current ripple are analyzed. These equations will be used as guidelines for the control system design and smoothing inductor size requirement. The topology used is a buck-boost configuration. Special care had to be taken in designing the smoothing inductor and managing thermal loses, for these are critical to the overall performance. The inductor constructed, rating l.5 mH, is capable of transferring 200 A for several minutes with low loses and no core saturation (air core was used). A special water-cooled heatsink was designed and constructed, with a very low volume of less than 900 cc and a thermal resistance of less than 0.011/spl deg/C/W. The control system was implemented on a TMS320F241 DSP from Texas Instruments, which consists in two control loops. The first one controls the converter's current, using as a reference the value obtained from the second loop, which controls the ultracapacitors state of charge (SOC). Criteria ruling this second loop are not discussed in this paper. Finally, some experimental results of the overall system are displayed.

Patent
29 Oct 2003
TL;DR: A multiphase DC-DC converter architecture, in which different channels have different operational performance parameters, has been proposed in this article to enable the converter to achieve an extended range of high efficiency.
Abstract: A multiphase DC-DC converter architecture, in which respectively different channels have different operational performance parameters. These different parameters are selected so as to enable the converter to achieve an extended range of high efficiency. The converter contains a combination of one or more fast response time-based converter channels, and one or more highly efficient converter channels in respectively different phases thereof and combines the outputs of all the channels. The efficiency of the asymmetric multiphase converter is higher at light loads (up to approximately 12 amps), enabling it to offer longer battery life in applications that spend most of their operating time in the leakage mode, as noted above.

Patent
04 Feb 2003
TL;DR: In this article, a multi-phase DC-DC converter architecture is defined, in which parameters including error signal gains and modulator gains are defined so as to balance multiple converter channel currents, irrespective of whether the converter channels are supplied with the same or different input voltages.
Abstract: A multi-phase DC—DC converter architecture in which parameters including error signal gains and modulator gains are defined so as to balance multiple converter channel currents, irrespective of whether the converter channels are supplied with the same or different input voltages.