Showing papers on "Buck converter published in 2019"
TL;DR: A novel distributed control algorithm for current sharing and voltage regulation in DC microgrids is proposed, proving the achievement of proportional current sharing, while guaranteeing that the weighted average voltage of the microgrid is identical to the weights of the voltage references.
Abstract: In this paper, a novel distributed control algorithm for current sharing and voltage regulation in DC microgrids is proposed. The DC microgrid is composed of several distributed generation units, including buck converters and current loads. The considered model permits an arbitrary network topology and is affected by an unknown load demand and modeling uncertainties. The proposed control strategy exploits a communication network to achieve proportional current sharing using a consensus-like algorithm. Voltage regulation is achieved by constraining the system to a suitable manifold. Two robust control strategies of sliding mode type are developed to reach the desired manifold in a finite time. The proposed control scheme is formally analyzed, proving the achievement of proportional current sharing, while guaranteeing that the weighted average voltage of the microgrid is identical to the weighted average of the voltage references.
148 citations
01 Jan 2019
TL;DR: The proposed distributed control scheme achieves current sharing and average voltage regulation in direct current (dc) microgrids independently of the initial condition of the controlled microgrid, facilitating plug-and-play capabilities.
Abstract: In this letter we propose a new distributed control scheme, achieving current sharing and average voltage regulation in direct current (dc) microgrids. The considered dc microgrid is composed of several distributed generation units (DGUs) interconnected through resistive-inductive power lines. Each DGU includes a generic energy source that supplies a local current load through a dc-dc buck converter. The proposed distributed control scheme achieves current sharing and average voltage regulation, independently of the initial condition of the controlled microgrid. Moreover, the proposed solution requires only measurements of the generated currents, and is independent of the microgrid parameters and the topology of the used communication network, facilitating plug-and-play capabilities. Global convergence to a desired steady state is proven and simulations indicate a good performance.
85 citations
TL;DR: The design of a battery charging circuit through an intelligent fuzzy logic based discrete proportional-integral-derivative (FL-DPID) maximum power point tracking (MPPT) algorithm is put forward to achieve higher efficacy, minimize overall system cost and obtain apropos voltage and current for effective charging of battery thereby reducing battery losses and enhancing life cycle.
82 citations
TL;DR: The model comparison points out that the describing-function-based models do improve the modeling accuracy beyond the half-switching frequency of the converter, yet they fail to predict the frequency-coupling interactions among multiple converters, and instead, harmonic state-space models in the multiple-input multiple-output form are required.
Abstract: Over the past years, the linearized modeling techniques for power converters have been continuously developed to capture the small-signal dynamics beyond half the switching frequency. This paper reviews and compares the small-signal modeling approaches based on a buck converter with voltage-mode control. The study includes the small-signal averaged modeling approach, the describing function method, and the harmonic state-space modeling approach, in order to be able to better select the correct method when modeling and analyzing a power electronic circuit as well as a power-electronic-based power system. The model comparison points out that the describing-function-based models do improve the modeling accuracy beyond the half-switching frequency of the converter, yet they fail to predict the frequency-coupling interactions (e.g., beat frequency oscillations) among multiple converters, and instead, harmonic state-space models in the multiple-input multiple-output form are required.
75 citations
TL;DR: In this paper, a two-stage dc-dc converter based on gallium nitride (GNT) was proposed, where the first regulated stage is a 2-phase interleaved buck converter and the second unregulated stage is an LLC (2-MHz) dc transformer.
Abstract: This paper develops a 200-W wide-input-range (64–160-to-24-V) rail grade dc–dc converter based on gallium nitride devices. A two-stage configuration is proposed. The first regulated stage is a two-phase interleaved buck converter ( $>$ 400 kHz), and the second unregulated stage is an LLC (2-MHz) dc transformer. In order to achieve high frequency and high efficiency, the critical-mode operation is applied for the buck converter, and the negative coupled inductors are used to reduce the frequency and the conduction losses. Then, a systematical methodology is proposed to optimize the planar-coupled inductors. For the unregulated LLC converter, it can always work at its most efficient point, and an analytical model is used to optimize the planar transformer. Finally, the proposed dc–dc converter, built in a quarter brick form factor, is demonstrated with a peak efficiency of 95.8% and a power density of 195 W/in $^3$ .
69 citations
TL;DR: The light load conditions that lead to poor balancing are investigated and a new method, constant effective duty cycle (CEDC) compensation, is proposed, which provides active balancing for the full load range of the converter.
Abstract: One of the challenges of utilizing flying capacitor multi-level (FCML) converters is the flying capacitor balancing. Poorly balanced flying capacitors increase the switch voltage stress, which is detrimental to performance and device rating requirements. Previously, valley current detection was shown as a potential method to balance flying capacitors, but the method suffers from poor flying capacitor balancing performance at light load. Here, we investigate the light load conditions that lead to poor balancing and propose a new method, constant effective duty cycle (CEDC) compensation, which provides active balancing for the full load range of the converter. The proposed method is validated with a 4-level FCML experimental prototype, demonstrating excellent flying capacitor balancing over all load ranges, across the full duty cycles range and with multiple induced flying capacitor imbalances.
65 citations
TL;DR: An adaptive interconnection matrix is developed to establish the internal links in port-controlled Hamiltonian models and to generate the unique control law in both boost converter and buck converter cases.
Abstract: In the more electric aircraft context, dc distribution systems have a time-varying structure due to the flexible distributed loads and complex operation conditions. This feature poses challenges for system stability and increases the difficulty of the stability analysis. Besides, the risk of instability may be increased under constant power load condition due to the negative incremental impedance characteristic. To this end, this article proposes an improved interconnection and damping assignment passivity-based control scheme. Particularly, an adaptive interconnection matrix is developed to establish the internal links in port-controlled Hamiltonian models and to generate the unique control law. The damping assignment technique is addressed to tune the dynamic characteristic. In order to meet the load requirements of different voltage levels, the design procedures were given for determining the control law in both boost converter and buck converter cases. The simulation and experimental results are performed to demonstrate the validity of the proposed control approach.
64 citations
TL;DR: It is shown that a faster convergence rate and a better load disturbance rejection performance can be yielded by the present algorithm, and the main results can be extended to the case of parallel dc–dc buck converters.
Abstract: The problem of current sharing controller for parallel dc–dc buck converter system is investigated in this paper. Specifically, to achieve the goal of sharing control and improve the systems dynamic performance, a new finite-time current sharing control algorithm is designed and employed. Under the proposed control algorithm, rigorous proofs show that not only the output voltage of the converter system can reach the desired reference voltage in a finite time, but also the objective of current sharing can be achieved within almost the same time. In addition, when the external load is time-varying and unknown, a finite-time load estimator is given to handle the load variation, and an adaptive finite-time current sharing control algorithm is subsequently developed. Experimental results are presented to verify the effectiveness of the proposed method, and to show its advantages over some traditional control algorithms. It is shown that a faster convergence rate and a better load disturbance rejection performance can be yielded by the present algorithm. Finally, it is shown that the main results can be extended to the case of $n$ parallel dc–dc buck converters.
62 citations
TL;DR: A second version of the LPPT method is suggested, called unit-minimum power-distributing LPPTs, which improves the first version of LPPt, called total-minimum centralized power- DistributingLPPT, which minimizes the power of the DPP converter unit, which is the largest among them.
Abstract: Recently, the module integrated converter and differential power processing (DPP) architecture were introduced to enable the photovoltaic (PV) power conditioning system to maintain the optimal operating condition of PV cells, such as maximum power point tracking (MPPT), even under partial shading conditions. However, the DPP architecture was found to have more room to optimize the performance of the systems, by the application of an extra extremum-seeking control, the so-called least power point tracking (LPPT) method that was introduced last year. The main idea is that most of the power from the PV modules is processed through the main-string high-efficiency nonisolation converter, and only a minimal fraction of the power that changes depending on the PV-string current is transferred through the low-efficiency bidirectional isolated DPP converters. This paper suggests a second version of the LPPT method, called unit-minimum power-distributing LPPT, which improves the first version of LPPT, called total-minimum centralized power-distributing LPPT. Instead of minimizing the total power of DPPs, the proposed LPPT minimizes the power of the DPP converter unit, which is the largest among them. Then, the system size and cost can be reduced by the proposed LPPT method, which enables the multiple DPP converters to have smaller power capacity and losses than those of the previous LPPT method. The real-time extremum-seeking algorithm employs a perturb-and-observe method, which comes from the conventional MPPT one, while the optimization process directs minimal extremity, not maximal. The peak system efficiency achieved with a 400-W prototype DPP system employing the LPPT algorithm is 96.7%.
60 citations
TL;DR: The feasibility of the proposed topology in EV fast charger applications has been verified by a prototype converter developed with the specification of 120-kHz or 50-kHz switching frequencies, maximum power rating of 20-kW, maximum charging current of 30-A, and battery voltage range of 50-650-Vdc.
Abstract: This paper presents an DC/DC topology achieving high efficiency of over 97-% for electric vehicle (EV) fast chargers requiring a very wide output voltage range. The proposed topology consists of an unregulated resonant converter and a non-isolated buck converter. The unregulated resonant converter is responsible for the galvanic isolation for overall system, and the buck converter carries out the charging of the battery inside EV by constant-current or constant-voltage mode control. This structure provides a number of advantages such as easy realization of a very wide voltage range, no circulating-current, zero-voltage-switching operation on all the switches of the unregulated resonant converter running at high frequency and high voltage, and the achievement of high efficiency at every time over the entire battery charging profile. The availability of small passive components is a benefit because it enables the design of high power-density. In this paper, the feasibility of the proposed topology in EV fast charger applications has been verified by a prototype converter developed with the specification of 120-kHz or 50-kHz switching frequencies, maximum power rating of 20-kW, maximum charging current of 30-A, and battery voltage range of 50-650-Vdc.
60 citations
TL;DR: A deadbeat-based method capable of achieving the input current regulation (ICR) and the output voltage regulation (OVR) simultaneously for the single-inductor multiple-input multiple-output (SI-MIMO) dc–dc converter is presented.
Abstract: This paper presents a deadbeat-based method for the single-inductor multiple-input multiple-output (SI-MIMO) dc–dc converter. By solving the cross regulation problem of the SI-MIMO dc–dc converter, the proposed method is capable of achieving the input current regulation (ICR) and the output voltage regulation (OVR) simultaneously. Moreover, the output current observers are adopted to replace the output current sensors, which are required by the conventional model based methods for dc–dc converters. The proposed control approaches including ICR and OVR are discussed in detail. To verify the effectiveness of the proposed deadbeat-based method, simulation runs and experiments are conducted on the single-inductor dual-input dual-output buck converter simulation platform and hardware prototype, respectively. The simulation and experimental results are analyzed in detail, and the comparison with the previous works is conducted.
TL;DR: In this paper, a buck-type, unity power factor SWISS rectifier was designed for DC power distribution systems for data centers, industrial applications, and residential areas, which can provide higher efficiency, higher reliability, and lower cost compared to ac systems and have been an important research topic in recent years.
Abstract: DC power distribution systems for data centers, industrial applications, and residential areas are expected to provide higher efficiency, higher reliability, and lower cost compared to ac systems and have been an important research topic in recent years. In these applications, an efficient power factor correction (PFC) rectifier, supplying the dc distribution bus from the conventional three-phase ac mains, is typically required. This paper analyzes the three-phase, buck-type, unity power factor SWISS Rectifier for the realization of an ultrahigh-efficiency PFC rectifier stage with a 400-V rms line-to-line ac input voltage and a 400-V dc output voltage. It is shown that the mains current total harmonic distortion of the rectifier can be improved significantly by interleaving two converter output stages. Furthermore, the dc output filter is implemented using a current-compensated integrated common-mode coupled inductor, which ensures equal current sharing between the interleaved half bridges and provides common-mode electromagnetic interference (EMI) filter inductance. Based on a theoretical analysis of the coupled inductor's magnetic properties, the necessary equations and the design procedure for selecting semiconductors, magnetic cores, the number of turns, and the EMI filter are discussed. Based on these results, an ultrahigh-efficient 8-kW 4-kW $\cdot$ dm $^{-3}$ (66-W $\cdot$ in $^{-3}$ ) laboratory-scale prototype converter using 1.2-kV SiC MOSFETs is designed. Measurements taken on the prototype confirm a full power efficiency of $\text{{99.16}{\%}}$ and a peak efficiency of $\text{{99.26}{\%,}}$ as well as the compliance to CISPR 11 Class B conducted emission limits.
01 Dec 2019
TL;DR: In this article, the authors report the first comprehensive research about GaN power integrated circuits (ICs) on GaN-on-SOI (silicon-oninsulator).
Abstract: We report the first comprehensive research about GaN power integrated circuits (ICs) on GaN-on-SOI (silicon-on-insulator). Specific stepped (Al)GaN superlattice buffer and highly robust deep trench isolation are developed. Various components including HEMT, metal-insulator-metal (MIM) capacitor, Schottky barrier diode (SBD), two-dimensional electron gas (2DEG) resistor, and resistor-transistor logic (RTL) are co-integrated, compatible with the p-GaN technology. Based on these achievements, 200 V GaN HEMT with integrated driver shows an extraordinary switching performance. A 48V-to-1V single-stage buck converter is realized using a GaN half-bridge with integrated on-chip drivers. Further, an all-GaN buck converter containing a smart control pulse-width modulation (PWM) circuit, dead-time control, drivers, and half-bridge is successfully designed using the GaN IC platform process design kit (PDK).
TL;DR: In this paper, the cascade connection of two dc-dc switching converters for constant power supply was studied. But the source converter is of boost type while the load converter was of buck type.
Abstract: The cascade connection of two dc-dc switching converters for constant power supply is studied. The source converter is of boost type while the load converter is of buck type. The natural unstable behaviour of the cascade connection for both on and off states of the boost converter is counteracted by a sliding-mode control strategy that combines unstable trajectories to generate a stable one for the regulated boost converter dynamics. Experimental results using an electronic load to emulate a buck converter-based constant power load are in good agreement with the theoretical predictions. A similar agreement is later obtained when a buck converter with a dynamic behaviour close to an instantaneous constant power load is employed instead of the electronic load.
TL;DR: In this paper, the temperature dependence of dynamic performance of 1.2-kV 4H-SiC power mosfet s is systematically characterized over such wide temperature range of 90 −493 K and compared with 1.1kV Si IGBT by a layout optimized double pulse tester (DPT).
Abstract: Due to the superior material properties, SiC mosfet is a promising candidate switching device for high power density and high efficiency power conversion system. The robustness of switching device under extreme temperature condition becomes a crucial factor to ensure power conversion system safely and continuously operating. In this paper, the temperature dependence of dynamic performance of 1.2-kV 4H-SiC power mosfet s is systematically characterized over such wide temperature range of 90–493 K and compared with 1.2-kV Si IGBT by a layout optimized double pulse tester (DPT). The degradation of dynamic on -resistance related interface traps is analyzed specially and the energy loss caused by degradation is quantified at cryogenic temperatures. Besides, to validate the performance of SiC mosfet under safely and continuously operating conditions for cryogenic temperature application, a hard switched non-isolated dc–dc buck converter is designed and tested to estimate temperature dependence of conversion efficiency under temperature range of 90–290 K. Moreover, the further characterizations are conducted with gate resistance range of 2–20 Ω, load current range of 3–30 A, and converter output current of 5–22.5 A under different switching frequency (up to 150 kHz) to validate high power and high frequency application potential of SiC mosfet .
TL;DR: In this paper, a GaN half-bridge including the drivers were successfully fabricated on 200mm engineered substrates of Qromis substrate technology (QST®), and a single-die GaN power IC exhibiting 200-V swift switching capability was successfully demonstrated.
Abstract: Co-integration of the key power stage, namely gate drivers and half-bridge in a single-die solution, is a tremendous and inevitable challenge to realizing GaN power integrated circuits (GaN power ICs). In this letter, a monolithically integrated GaN half-bridge including the drivers were successfully fabricated on 200-mm engineered substrates of Qromis substrate technology (QST®). Deep trench isolation together with the buried oxide of the GaN-on-QST® isolates the high side, low side, and the drivers. While on GaN-on-Si, the back-gating effect more and more impedes the integration of a half-bridge’s low side and high side as the voltage increases. This effect is fully eliminated using the proposed effective isolation strategy. In this letter, we will present a single-die GaN power IC exhibiting 200-V swift switching capability. Finally, based on this GaN power IC, a 48V-to-1V single-stage buck converter was successfully demonstrated.
TL;DR: The experimental results show that the proposed MPC-MPPT is a quick and accurate tracker under very fast changing irradiance, while maintaining high tracking efficiency even under very low irradiance.
Abstract: This paper presents a method that overcomes the problem of the confusion during fast irradiance change in the classical maximum power point tracking (MPPT) as well as in model predictive control (MPC)-based MPPTs available in the literature. The previously introduced MPC-based MPPTs take into account the model of the converter only, which make them prone to the drift during fast environmental conditions. Therefore, the model of the photovoltaic (PV) array is also considered in the proposed algorithm, which allows it to be prompt during rapid environmental condition changes. It takes into account multiple previous samples of power, and based on that is able to take the correct tracking decision when the predicted and measured power differ (in case of drift issue). After the tracking decision is taken, it will be sent to a second part of the algorithm as a reference. The second part is used for following the reference provided by the first part, where the pulses are sent directly to the converter, without a modulator or a linear controller. The proposed technique is validated experimentally by using a buck converter, fed by a PV simulator. The tracking efficiency is evaluated according to EN50530 standard in static and dynamic conditions. The experimental results show that the proposed MPC-MPPT is a quick and accurate tracker under very fast changing irradiance, while maintaining high tracking efficiency even under very low irradiance.
TL;DR: In this paper, a TSV air-core toroidal inductor with a hollow core and suspended windings has been proposed for PSiP. The proposed casting method is simple, scalable, and generic for a wide range of magnetic powders.
Abstract: The integration of power inductors is a roadblock in realizing highly miniaturized power supply in package (PSiP) and power supply on chip. Inductors in such power systems are used for energy storage and filtering, but they dominate in size and loss. This paper presents a novel three-dimensional in-silicon through-silicon via (TSV) magnetic-core toroidal inductor for PSiP. The magnetic powder based core is embedded into a TSV air-core inductor using a casting method. The unique air-core inductor design with a hollow core and suspended windings enables a complete core filling with microscale magnetic powders. The proposed casting method is simple, scalable, and generic for a wide range of magnetic powders. TSV magnetic-core inductors are fabricated in a compact size of 2.4 mm × 2.4 mm × 0.28 mm with the core content varying from 63 to 88 wt% of soft ferrite NiZn powders. The TSV magnetic-core toroidal inductors are fabricated and electrically characterized. Small-signal measurements show a threefold higher inductance of 112 nH and a 30% higher quality factor of 14.3 at 12.5 MHz for magnetic-core inductors compared with similar TSV air-core inductors. The small-signal measurement results are verified by the modeled results. The total core loss is characterized by large-signal measurements. A suitable inductor is implemented in a 12-MHz buck converter that operates in a zero-voltage-switching mode. The converter achieves a peak efficiency of 71.6% and an output power of 2.4 W while converting 12 to 5 Vdc.
TL;DR: A comprehensive review and analysis of the derivation and inner connection of high step-up boost converters with coupled inductor, and numerous new topologies are continuously proposed by combinations and equivalent simplifications.
Abstract: High step-up boost converters with coupled inductor have attracted much attention in the fuel cell or photovoltaic grid-connected generation system, however, there are few literatures elaborated on the construction ideas and derivation methods of them. Accordingly, in order to obtain a clear roadmap on the derivation and inner connection of these converters, a comprehensive review and analysis are presented in this paper. First, the basic boost converter with coupled inductor is regarded as the basic topology, and its merits and demerits are analyzed in detail. Then, in order to address these demerits, various step-up techniques are introduced, such as the rectifier circuit, the active-clamped circuit, the multi-winding coupled inductor, and the voltage doubler rectifier; and numerous new topologies are continuously proposed by combinations and equivalent simplifications. In addition to a detailed synthesis of each topology, a comparative and quantitative analysis among some important converters is presented, and the optimal one is chosen to build a 250 W prototype. Finally, based on comparisons and analysis, the main characteristics and inner connections of these high step-up boost converters with coupled inductor are identified and clarified.
TL;DR: The twice step-down benefit of SC-Buck converter and the zero-voltage switching benefit of series-capacitor tapped Buck (SC-TaB) converter are combined together to propose a new topology: interleaved series- capacitorTap Buck (ISC-TaBs) converter.
Abstract: High step-down dc/dc converters are widely utilized in telecom and modern industrial applications. Due to the high step-down ratio, conventional Buck converter cannot provide satisfactory performance. To solve this problem, quite a few new topologies have been proposed to improve the performance of high step-down dc/dc converters, such as series-capacitor Buck (SC-Buck) converter, 3-level Buck converters, tapped inductor Buck converters, and LLC resonant converters. In this paper, the twice step-down benefit of SC-Buck converter and the zero-voltage switching benefit of series-capacitor tapped Buck (SC-TaB) converter are combined together to propose a new topology: interleaved series-capacitor tapped Buck (ISC-TaB) converter. To analyze the performance of the proposed ISC-TaB converter, the operation principles are discussed and the voltage conversion ratio is derived. In addition, to guide the design procedure and optimization, the current waveforms and voltage waveforms of the proposed ISC-TaB are derived. In order to verify the performance of the proposed ISC-TaB, hardware prototype of the proposed ISC-TaB converter and conventional two-phase series-capacitor tapped Buck converter (2ph-TaB) are designed and tested. The application is targeted at telecom with 48-V input and 3.3 V/20 A output. The test results are compared between these two converters. A peak efficiency of 95.6% is achieved on the proposed ISC-TaB and the efficiency of the ISC-TaB over all load range is at least 1% higher than that of 2ph-TaB.
TL;DR: In this paper, a buck converter was used to buffer the imbalance energy between input and output in a half-line cycle of an AC-connected light emitting diode (LED) driver.
Abstract: AC-connected light emitting diode (LED) drivers experience imbalanced energy between input and output in a half-line cycle. To achieve the flicker-free operation, the imbalanced energy needs to be buffered, often by energy-dense electrolytic capacitors. However, electrolytic capacitors are also well-known for their short lifespan. These capacitors are the limiting factor of an LED drivers’ lifespan. High voltage film capacitors and a buck converter have been used in the proposed LED driver to buffer the imbalanced energy. When P in > P LED, the extra energy is transferred from the ac input directly to the high voltage film capacitors. When P in P LED, the energy is transferred from the high voltage film capacitors to the output by the buck converter. The imbalanced energy goes through two power conversion steps in the proposed LED driver, which is one time less than other comparable electrolytic capacitor-less designs, enabling a higher efficiency to be achieved. A 28 W flyback topology based experimental prototype had been built and tested to verify the proposed design.
26 May 2019
TL;DR: A converter nonlinear model is implemented in MATLAB and SIMULINK for both the case without parasitic components and with parasitic components, making it possible to perform a systematic analysis of the dynamical behavior induced by the various perturbation sources acting on the converters.
Abstract: In this paper, a nonlinear approach to modeling DC-DC PWM converters in continuous conduction mode (CCM) is presented. Specifically, a converter nonlinear model is implemented in MATLAB and SIMULINK for both the case without parasitic components (ideal case) and with parasitic components (non-ideal case). The implementation, which is based on the analytical computation of the periodic solutions in the high frequency steady-state operating condition, makes it possible to perform a systematic analysis of the dynamical behavior induced by the various perturbation sources acting on the converters. A comparison of the dynamics generated in the ideal and nonideal cases by step changes in duty cycle, input voltage and load resistance is reported for both the boost and buck converters.
TL;DR: A controller based on a resistance feedback control strategy that produces a stable and fast converging operating point for the PVE and is able to follow the current–voltage characteristic of the PV module accurately is proposed.
Abstract: Using a photovoltaic (PV) emulator (PVE) simplifies the testing of the PV generation system. However, conventional controllers used for PVEs suffer from oscillating output voltage, requiring a high number of iterations, or being too complex to be implemented. This paper proposes a controller based on a resistance feedback control strategy that produces a stable and fast converging operating point for the PVE. The resistance feedback control strategy requires a new type of PV model, which is the current–resistance ( I – R ) PV model. This model is computed using a binary search method at a fast convergence rate. It is combined with a closed-loop buck converter using a proportional-integral controller to form the resistance feedback control strategy. The PVE's controller is implemented into dSPACE ds1104 hardware platform for experimental validation. The acquired experimental results show that the proposed PVE is able to follow the current–voltage characteristic of the PV module accurately. In addition, the PVE's efficiency is more than 90% under maximum power point operation. The transient response of the proposed PVE is similar to the PV panel during irradiance changes.
TL;DR: This work provides analytical guarantees for existence and stability of the interleaved state as well as extensive hardware results for a system of five 120 W 48 V-to-12 V dc–dc buck converters that demonstrate convergence to the interLEaved state in the face of a variety of large-signal disturbances.
Abstract: We present a decentralized control strategy that yields switch interleaving for parallel-connected dc–dc buck converters Compared to state-of-the-art methods that are distributed at best, the proposed architecture requires no communication, and hence, presents a variety of advantages with regard to reliability, modularity, and cost The method is based on the digital implementation of the dynamics of a Lienard-type oscillator circuit as the controller for the converters Each controller only requires the locally measured output current to synthesize the pulsewidth modulation (PWM) carrier waveform The intrinsic electrical coupling between converters drives the nonlinear-oscillator-based controllers to converge to an interleaved state with uniform phase spacing across PWM carriers, independent of the number of converters, the load, and initial conditions We provide analytical guarantees for existence and stability of the interleaved state as well as extensive hardware results for a system of five 120 W 48 V-to-12 V dc–dc buck converters that demonstrate convergence to the interleaved state in the face of a variety of large-signal disturbances
TL;DR: It is shown by simulation and experimentation that the transient and steady state performance of both the controllers are satisfactory and the practical stability of the proposed schemes is proved.
TL;DR: This paper proposes a method for open-circuit fault identification, based on the time-domain comparison of the residual of a state-space observer with signatures per phase, which has the capacity to identify faults in two switching periods.
Abstract: Fault-tolerance capability is a critical matter in power conversion systems that require continuous operation. Multiphase converters provide an inherent redundancy that gives them fault-tolerant capability. In addition, the interleaved operation of these converters provides them with some advantages regarding total current ripple, which otherwise would be lost under a fault condition. This issue can be solved by means of an identification and reconfiguration system. This paper proposes a method for open-circuit fault identification, based on the time-domain comparison of the residual of a state-space observer with signatures per phase. Signature online generation, together with a proper normalization and thresholding strategy, provides immunity with respect to the operation point. The use of the phase information associated to the interleaved operation allows to reduce the number of sensed variables, making it possible to identify the faulty leg by only sensing input and output signals, which are conventionally used for control purposes. Hence, the measurement of signals within every leg is avoided. Experimental results on a four-phase interleaved buck converter validate the method capacity to identify faults in two switching periods. Robustness regarding abrupt changes in the operational conditions was tested.
TL;DR: This paper presents an ac–dc LED driver with an additional active rectifier and a unidirectional auxiliary circuit for ripple power isolation and operates with reduced redundant power processing and a lower voltage on the storage capacitor.
Abstract: Single-phase ac light-emitting diode (LED) lamps require long-lifespan and high-efficiency ac–dc power converters for power factor correction (PFC) and current regulation. In such converters, the inherent double-line-frequency ripple power from the ac source is isolated from the load by large electrolytic capacitors (E-caps) or E-cap-less active circuits to improve reliability and lifespan. This paper presents an ac–dc LED driver with an additional active rectifier and a unidirectional auxiliary circuit for ripple power isolation. As compared with other similar designs, the proposed LED driver operates with reduced redundant power processing and a lower voltage on the storage capacitor, and the additional active circuits include fewer power components. The prototype with small polymer-hybrid capacitors and ceramic capacitors is separately tested in the experiment.
TL;DR: The output voltage tracking problem with overcurrent protection for a pulse width modulation-based dc–dc buck converter is investigated and a novel and simple current-constrained controller is constructed that shows a nice property of robustness against load uncertainty.
Abstract: The output voltage tracking problem with overcurrent protection for a pulse width modulation-based dc–dc buck converter is investigated in this brief. On the one hand, large transient current during the start-up phase is required for fast dynamics. On the other hand, overlarge transient current may lead to a risk of hardware damage. Conventionally, this problem is solved by choosing conservative control parameters, while the dynamic performance is sacrificed to a certain extent. Besides, the load uncertainty is inevitable in practical applications. Hence, a control design that keeps a good balance between dynamic performance, overcurrent protection, and robustness is desired. To this end, a novel and simple current-constrained controller is constructed. Both dynamic performance and current constraint are taken into account. The low complexity of the proposed current-constrained controller yields a higher reliability of dc–dc buck converter control system, and reduces cost of hardware. Moreover, it shows a nice property of robustness against load uncertainty. Control action is penalized by adjusting controller gains automatically when inductor current tends to the barrier bound. Rigorous stability analysis is given under the presented controller. Comparative simulation and experimental results between the proposed control scheme and the classic proportion–integration–differentiation control scheme on the buck converter system are illustrated to verify the feasibility and effectiveness of the proposed control scheme.
TL;DR: Bode plots based on small signal model show that the proposed CCR-controlled SIDO CCM buck converter significantly reduces cross regulation and improves the transient performance compared with the peak current mode controlled Sidenote buck converter.
Abstract: For a single-inductor dual-output (SIDO) dc–dc converter operating in continuous conduction mode (CCM), load variation of one output will affect the voltage of the other output, i.e., there exists cross regulation between its two outputs. To suppress the cross regulation of the SIDO dc–dc converter operating in CCM, a novel ripple based control technique, called capacitor current ripple (CCR) control technique, is proposed in this paper. The operation principle of the SIDO CCM buck converter and the proposed CCR control technique are presented. The small signal model of the CCR-controlled SIDO CCM buck converter is established by the state space averaging method. Bode plots based on small signal model show that the proposed CCR-controlled SIDO CCM buck converter significantly reduces cross regulation and improves the transient performance compared with the peak current mode controlled SIDO CCM buck converter. In addition, the effect of the variation of loads on the stability of the proposed CCR-controlled SIDO CCM buck converter is analyzed by eigenvalues analysis. Finally, experimental results are provided to verify the analysis results.
TL;DR: DPDC achieves a high power efficiency and thus also reduces the heating problem, which is another critical issue in the mobile set and can shrink the volume of the PMIC set with a low manufacturing cost by alleviating an large DCR of the inductor.
Abstract: A dual-path step-down converter (DPDC) is presented for achieving high power efficiency in the mobile power management ICs (PMICs). Adopting a hybrid structure using one inductor and one flying capacitor, the proposed DPDC supplies a load current via two parallel paths, relieved an intrinsic problem of the conventional buck converter (CBC) topology, which is a significant power loss from a large DCR of the inductor ( ${R}_{\mathrm {DCR}}$ ). Therefore, DPDC achieves a high power efficiency and thus also reduces the heating problem, which is another critical issue in the mobile set. Moreover, DPDC can shrink the volume of the PMIC set with a low manufacturing cost by alleviating an ${R}_{\mathrm {DCR}}$ specification of the inductor. In this paper, although a 250 $\text{m}\Omega $ of large ${R}_{\mathrm {DCR}}$ inductor is used for our measurements, a 96.2% of peak efficiency was achieved and the power loss of total parasitic resistances can be reduced to up to 30% of that of CBC. Moreover, according to our measurement plots, it is verified that DPDC achieves the efficiency notably higher not only in a wide load current ( $I_{\mathrm {LOAD}}$ ) range but also in a wide conversion ratio ( $V_{\mathrm {OUT}}/V_{\mathrm {IN}}$ ) range, compared to CBC.