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Bus network

About: Bus network is a research topic. Over the lifetime, 7017 publications have been published within this topic receiving 97556 citations.


Papers
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Patent
18 Mar 1998
TL;DR: In this paper, the authors describe an intelligent sensor system in which different types of sensors are connected to a network communication bus and analog and digital signals are transferred bi-directionally on the common communication bus between the distributed sensors and an application specific controller referred to as a bus converter/controller module (BCM).
Abstract: This invention disclosure describes an intelligent sensor system in which different types of sensors are connected to a network communication bus. Analog and digital signals are transferred bi-directionally on the common communication bus between the distributed sensors and an application specific controller referred to as a bus converter/controller module (BCM). The traditional analog type sensors are connected to the communication bus through interface devices referred to as transducer-to-bus interface modules (TBIM). The TBIM provides sensor identification, self-test and data correction functions.

96 citations

Journal ArticleDOI
TL;DR: In this article, a high-resolution spatio-temporal, GIS-based public transit network model is presented to measure the accessibility of public transit from origins to destinations.

95 citations

Patent
09 Mar 2001
TL;DR: In this paper, an interface device is connected to a host by an I/O bus and provides hardware and processing mechanisms for accelerating data transfers between a network and a storage unit, while controlling the data transfers by the host.
Abstract: An interface device is connected to a host by an I/O bus and provides hardware and processing mechanisms for accelerating data transfers between a network and a storage unit, while controlling the data transfers by the host. The interface device includes hardware circuitry for processing network packet headers, and can use a dedicated fast-path for data transfer between the network and the storage unit, the fast-path set up by the host. The host CPU and protocol stack avoids protocol processing for data transfer over the fast-path, freeing host bus bandwidth, and the data need not cross the I/O bus, freeing I/O bus bandwidth. Realtime audio and video communication can also be provided when the interface device is coupled by an audio/video interface to appropriate communication devices, such as microphone, a speaker, a camera and/or a display.

95 citations

Patent
Erik P. Staats1
01 Apr 1996
TL;DR: In this article, a bus transaction is interrupted by a bus reset, and the new destination node bus address is used to complete the bus transaction that was interrupted by the bus reset.
Abstract: A computer system includes a plurality of nodes, each having an associated unique identification and bus address, interconnected by point-to-point links. Device data records are maintained in a memory of the computer system wherein node unique identifications, which are bus reset invariant, are associated with corresponding node bus addresses, which are subject to change with bus resets. A driver associated with a source node initiates a bus transaction and specifies a reference identification for the destination node. The reference identification of the destination node is used to access the device data records to obtain the corresponding destination node bus address. When a bus transaction cannot be completed because a bus reset occurs, the device data records are updated to associate the new bus addresses of the nodes with the corresponding node unique identifications. The new destination node bus address is used to complete the bus transaction that was interrupted by the bus reset.

94 citations

Patent
22 Sep 1998
TL;DR: In this paper, a high frequency bus system (450) is proposed to ensure uniform arrival times of high fidelity signals to the devices (510), despite the use of the bus on modules (420) and connectors.
Abstract: A high frequency bus system (450) which insures uniform arrival times of high fidelity signals to the devices (510), despite the use of the bus (450) on modules (420) and connectors. The high frequency bus system (450) includes a first bus segment having one or more devices (510) connected between a first and second end. The high frequency bus system (450) also includes a second bus segment which has no devices connected to it. The first end of the first segment and the second end of the second segment are coupled in series to form a chain of segments and when two signals are introduced to the first end of the second bus segment at substantially the same time, they arrive at each device (510) connected to the first bus segment at substantially the same time. Conversely when two signals originate at a device (510) substantially at the same time, they arrive at the first end of the second bus segment at substantially the same time. Uniform arrival times hold despite the use of connectors to couple the segments together, despite the segments being located on modules, without the need for stubs, despite the presence of routing turns in the segments and despite the type of information, such as address, data, or control, carried by the signals.

94 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202310
202229
202192
202093
201999
2018108