Showing papers on "Capacitance published in 1977"

DC-to-DC switching converter

Abstract: A dc-to-dc converter having nonpulsating input and output current uses two inductances, one in series with the input source, the other in series with the output load. An electrical energy transferring device with storage, namely storage capacitance, is used with suitable switching means between the inductances to DC level conversion. For isolation between the source and load, the capacitance may be divided into two capacitors coupled by a transformer, and for reducing ripple, the inductances may be coupled. With proper design of the coupling between the inductances, the current ripple can be reduced to zero at either the input or the output, or the reduction achievable in that way may be divided between the input and output.

Transient capacitance measurements of hole emission from interface states in MOS structures

Abstract: The energy spectrum of MOS interface states and the capture cross section for holes have been measured in p‐type silicon by transient capacitance spectroscopy. In MOS capacitors with interface state densities of <1010 cm−2 eV−1 near midgap, the density decreases with energy towards the valence‐band edge over the measurement range of 0.17

Effects of Dispersion and Dead-End Pore Volume in Miscible Flooding

Abstract: The design of the solvent slug size for a miscible flood process can be improved with data on holdup (or capacitance effects) and dispersion of the solvent slug in the reservoir. A modified version of the Coats-Smith dispersion-capacitance model and an improved method of solution of the model were used to study dispersion and capacitance effects in cores. The velocity dependence of the model parameters is shown. A correlation is developed for estimation of effective dispersion coefficients for field application. The method described provides a means of characterizing the properties of dispersive mixing and micro-heterogeneity of reservoir cores. It provides an aid in the design of the volume of solvent for miscible floods. (19 refs.)

Corona characteristics of conductor bundles under impulse voltages

Abstract: This paper presents the results of an experimental study on the corona characteristics of single and bundle conductors under impulse voltage conditions in a large cage. Both lightning and switching impulses were used for the tests, most of which were performed with positive impulses. The influence of artificial rain on the corona characteristics was also studied. An analysis of the experimental results is presented with emphasis on the corona onset voltage gradient, the apparent change in the capacitance of the line conductor and the energy dissipated by corona. A simple analog circuit is suggested to simulate the influence of impulse corona on waves propagating along line conductors.

Evaluation of the size of a plant's root system using its electrical capacitance

Abstract: This paper extends an earlier one5. The relationship between electrical capacitance of a plant root system (C) and size (weight, volume, surface) of the root system (x) can be expressed by equation of the line $$C = a + bx$$ ifa equals size of parasitic capacitance of measurement, i.e. capacitance of soil, wires,etc. andb equals regression coefficient influenced by type of soil plant species, measuring frequency and voltage,etc.

Measurement of wall charge and capacitance variation for a single cell in the AC plasma display panel

Abstract: Real-time dynamic measurements are performed on a single cell in a standard commercially available large plasma panel. The measurements determine cell response to variations in address pulses, sustain waveforms, or priming from neighboring cells. The wall-charge measurement indicates the internal dielectric surface charge and the capacitance measurement indicates the existence of a plasma in the gas volume. These measurements have shown that neighboring on cells can cause a large wall-charge transfer in off cells that results in reduced write and sustain voltage margins. Direct wall-charge measurements allows use of a simple technique for determination of the voltage transfer curve of the plasma cell which greatly aids device characterization. The capacitance measurement has shown that a plasma exists in commercial MgO panels for 10-15 µs after the discharge-current peak. The capacitance and wall-charge measurements can be combined to give simultaneous real-time results.

Distributed capacitance of planar electrodes in optic and acoustic surface wave devices

Abstract: The distributed capacitance of the periodic grating, the 2- electrode, and the 3-electrode stripline waveguide modulators are derived exactly using conformal mapping techniques The capacitance formulas are shown to have a common form; they differ in a single parameter which is simply related to the electrode width and spacing Discrepancies previously found in the capacitance expressions used for the 2-electrode structure are resolved For the finite 3-electrode structure studied here, a self- and a mutual distributed capacitance are defined Techniques for switching a 3-electrode directional coupler are suggested The closed form mapping function derived here will be useful in the design of waveguide directional couplers The electrode structures examined here are similar to those used in surface acoustic wave devices; therefore, the capacitance calculations should also be applicable

Theory of switching phenomena in metal/semi-insulator/n-p+ silicon devices

Abstract: The theory of switching is presented for a structure consisting of a p + - n junction and a metal electrode separated from the N -section of the p + - n junction by a semi-insulating (leaky) layer. When a negative bias is applied to the electrode, the section of the n -layer under the electrode goes into deep depletion. In this mode, the current through the device is limited by generation in the deeply depleted region. This is the high-impedance or OFF state of the device. At a sufficiently high voltage, the switching voltage, V s , the p + - n junction is turned on by either avalanching in the n -layer or by the deep-depletion region extending through to the p + - n region (punch-through). When the junction turns on, the n -section goes from deep-depletion towards inversion. Thus, the voltage across the device decreases with a concomitant increase in the current through the device. This is the switching mode. The switching voltage may be tailored by varying the doping and/or width of the n -section. Following switching, the device comes into the steady-state when the current through the insulating layer is equal to the current flowing across the p + - n junction. The I-V characteristic of this highly conducting (ON state) mode is determined principally by the I-V characteristic of the semi-insulating film. By suitable choice of material this portion of the characteristic can approach zero dynamic impedance, i.e. a near-vertical characteristic, characterized by a low holding voltage. Capacitance and switching characteristics of the device are also discussed.

Method of making a V-MOS field effect transistor for a dynamic memory cell having improved capacitance

Abstract: This disclosure relates to a method of making a V-MOS field effect transistor which does not require the extra steps of epitaxial growth in order to form the source area of the transistor. The formation of the source area is achieved by masking the silicon substrate, opening an aperture in the mask and then etching the silicon substrate in such a manner as to undercut the mask so that the mask provides a shield to subsequent ion implanting of the source area. Both P and N type dopants can be separately implanted with different energy levels so as to form an enhanced PN junction capacitance for the device. Such a field effect transistor can be achieved without the formation of a graded dopant concentration in the channel between the source and drain areas of the transistor and is provided with enhanced source capacitance.

Capacitive Analysis of Twisted Nematic Liquid Crystal Displays

Abstract: Magnetocapacitive null (MCN) and capacitance versus voltage (C-V) measurements are valuable tools for analyzing electro-optical properties of twisted bematic LCDs. the C-V technique is particularly useful when resulrs are presented in the form of reduced capacitance CR(V) = [C(V) - C]/(C∥ - C1) = sin2α, where αe(V) is an effective molecular tilt. Thus, the effective voltage induced distortion of the LC is determined by monitoring CR-V.

Impedance Measurements at the N‐ and P‐Type GaP Single Crystal Electrode

Abstract: Impedance measurements were made at the dark n- and p-type GaP single crystal electrodes in aqueous indifferent electrolyte solutions as a function of applied voltage and of frequency. The results allow the determination of the flatband potential and hence of the position of the Fermi level and the conduction and valence band edges at the electrode surface. The observed frequency dependence of the capacitance can be attributed to dipole relaxation phenomena in the space-charge layer of the semiconductor electrode. The influence of preliminary etching on the frequency behavior is discussed.

Equivalent Circuit Capacitance of Microstrip Step Change in Width

Abstract: Calculated results which extend existing data on the capacitance of step discontinuity are presented for w/sub 1/ /H of value 0.1, 0.5,1.0, and 2.0, for relative dielectric constants of 15.1, 9.0, 4.0, and 2.3, and for w/sub 2/ /H in the range 0.1-10.0. The quasi-static method of calculation is used, and the excess capacitance associated with the steps is determined by the solution of the integral equation using Green's functions.

Capacitance-to-voltage transformation circuit

Abstract: A capacitance-to-voltage transformation circuit for providing an output voltage proportional to capacitive variations includes a variable capacitor, a reference voltage source, and circuit means for charging the variable capacitor to the reference potential. A switch means alternately connects the variable capacitor to the charging means and to ground at a cyclical rate determined by an oscillator clock. An impedance means coupled between the charging and switch means, develops a voltage drop thereacross of a magnitude directly proportional to capacitance variations of the variable capacitor. In accordance with another aspect of the invention, the circuit includes a compensating means for nullifying any fixed capacitance component of the variable capacitor.

Ceramic capacitor having a silver doped dielectric of (Pb,La)(Zr,Ti)O{HD 3 {B and glass

Abstract: The dielectric material of a ceramic capacitor contains a high temperature silver doped ceramic with a small proportion of a low temperature glass. The ceramic component consists essentially of a lead zirconate in which from 0.07 to 0.16 molar parts of the lead are replaced by lanthanum and in which from 0.10 to 0.40 molar parts of the zirconate are replaced by titanate. The capacitors may be fired in an air atmosphere without substantial loss of lead at temperatures as high as 2000 DEG F. Silver containing electrodes may be employed in a monolithic capacitor of this invention, the co-fired electrode advantageously causing a silver doping of the ceramic that in turn improves the stability of capacitance with temperature and applied voltage. Alternatively, the ceramic may be predoped with silver to achieve this result.

Capacitive touch-pad devices with dynamic bias

Abstract: A dynamic biasing capacitance is formed between a transmitting electrode and a receiving electrode of a capacitive touch-pad device to couple a portion of the scan voltage signal into the sense node of a voltage comparator circuit, coupled to the receiving electrode, to offset the comparator circuit threshold voltage. The dynamic biasing capacitance may be formed by overlapping portions of the electrodes, with a dielectric layer positioned therebetween, or by the parasitic capacitance between aligned end surfaces of the two electrodes, with the magnitude of the dynamic biasing capacitance being adjusted by variation of interelectrode geometries.

Frequency and temperature tests for lateral nonuniformities in MIS capacitors

Abstract: Interface states and lateral nonuniformities produce very similar abnormalities in the C-V curves of MIS capacitors. Two C-V techniques are presented here to aid in distinguishing between them. The first technique is based on the frequency dependence of the interface-state capacitance and utilizes the resulting frequency dispersion of the "high-frequency" capacitance in the depletion regime, which occurs in a frequency range typically between a few hundred Hz and 1 MHz. The second method utilizes a freeze-in of carriers in the interface states at liquid nitrogen temperature. A sweep of bias from accumulation into deep depletion at low temperature produces a C-V characteristic which, when compared with the corresponding ideal characteristic for the same semiconductor doping profile, reveals the presence of lateral nonuniformities. A complementary test is provided by temporary illumination of the deep-depleted structure followed by a sweep of bias from inversion into accumulation. A ledge in the C-V characteristic reveals the presence of interface states in the central half of the bandgap.

Semiconductor memory devices

Abstract: A semiconductor memory (storage) device is provided using layered semiconductor structures which produce spatially separate electron and hole wells. The state of the device depends upon whether or not charge carriers (electrons and holes) are confined in these wells. Thus, the device has a first state exhibiting one conductance or capacitance when the wells do not have charge carriers in them, and a second state (different conductance or capacitance) when charge carriers are confined in the potential wells. The lifetime of the state in which carriers are confined in the wells depends upon the amount of time required for electron-hole recombination and is expected to be very long since the electrons and holes are spatially separated. A preferred embodiment utilizes a layered heterostructure formed in the space charge region of a p-n junction. Electrons and holes are generated in the potential wells using either electrical injection or incident light, while reading is accomplished by measuring conductance or capacitance. Erasure of the device state is achieved by a reverse electrical bias which removes the electrons and holes from confinement in the potential wells. Confinement of electrons and holes in three dimensions is also achieved.

Field effect transistor with reduced series resistance

Abstract: A field effect transistor having an additional highly doped source region contiguous to the source region and protruding into the channel having a shape approximately conforming to the shape of the depletion layer and almost contiguous with the depletion layer in a desired operative state, thereby reducing the series resistance from the source to the pinch-off point without increasing the capacitance between the source and the gate. The improvement is particularly effective for devices of a high power, high speed and high frequency use and is compatible with the integrated circuit techniques.

Piezoelectric polymer receiving arrays for ultrasonic applications

Abstract: Broadband ultrasonic detector elements each approximately 2 mm in diameter and multielement linear arrays have been constructed using commercially available polyvinylidene fluoride sheet 25 μm thick. Electrode and electrical lead patterns were deposited on both surfaces by vacuum evaporation. Poling was achieved by applying ∼2000 V across the electroded parts of the sheet while the temperature was cycled from room temperature to ∼120°C over a period of ∼1 h. The open‐circuit responsivity of the samples to ultrasound was measured in the frequency range of 300 kHz to 1 MHz with the samples freely immersed in water, with the array backed by a steel ref1ector plate, and with the array a distance away from the reflector plate. The measurements were performed with the elements connected to a preamplifier by means of a 50 Ω coaxial tube about 30 cm long. Since the capacitance of an element is about 8 pF, the measured responsivity of about −230 dB re 1 V/μPa was degraded considerably by the cable capacitance. The...

Composite wire and fence made therefrom useful for security purposes

Abstract: At least two conductive wire elements which are separated from each other by a thin insulating layer such that as soon as a pressure is exerted on the composite wire at least one of the electrical characteristics, contact resistance and/or capacitance between the elements, changes to a measurable extent. A fence constructed of such composite wire has a circuit connected with both conductive wire elments for detecting any deviation in the nominal value of contact resistance and/or capacitance between them and for controlling an alarm circuit responsive to such deviation.

System and method for determining capacitance and cable length in the presence of other circuit elements

Abstract: Method and apparatus utilizing constant current charging and discharging to determine the capacitance of a telephone cable or other circuit element. An output signal corresponding to the time required to increase the voltage from a first level to a second level and back to the first level corresponds to the capacitance of the element and, in the case of a cable, the length of the cable.

MIS capacitance element

Abstract: A MIS capacitance element formed in a semiconductor substrate of p-(or n-) conductivity type comprises an n- (or p-) type well region formed in one principal surface of the semiconductor substrate and a polycrystalline region formed on the surface of the well region through a gate insulator layer. A polar voltage is applied between the well region and the polycrystalline layer so that the well region is forward biased and no carrier channel region is formed in the surface of the well region. The MIS element is particularly suited for use in a complementary MIS IC and provides almost no voltage or field dependency of the capacitance.

Microelectrode amplifier with improved method of input-capacitance neutralisation.

Abstract: A circuit is described which allows the input capacitance of an f.e.t. input integrated circuit to be used both as the feedback capacitance to neutralise the total input capacitance and to inject current pulses into the input. Compared with the conventional method of adding discrete capacitors to perform these functions, this design results in a lower total capacitance at the input, which reduces the high-frequency noise generated by the amplifier and facilitates the achievement of a low effective capacitance. A modified version having an ultralow (0·1pA) input current, for use with ion-sensitive microelectrodes, is also described.

Induction heating apparatus

Abstract: An induction heating apparatus comprises a DC power source, a series resonant circuit of a heating coil and capacitance connected between the terminals of the DC power source, a diode connected in parallel with the capacitor and in polarity-reversed relation to the DC power source, a transistor having a collector-emitter path connected in parallel with the capacitor, and a control circuit for controlling the conductive state of the transistor in accordance with the magnitude and direction of a current flowing through the heating coil.

Dielectric thermal power converter

Abstract: A method and apparatus is disclosed for use in converting heat to electrical energy and comprises a plurality of capacitors which have a temperature dependent capacitance. Heat is used to decrease the dielectric constant in the capacitors causing charge to expand from the capacitors into an associated circuit and do electrical work. The invention also includes reeds which are caused to vibrate by the flow of vapor carrying heat between stages. These reeds serve as thermal switches which pulse heat at the proper frequency and phase through a large number of stacked capacitors. The efficiency of the apparatus is optimized by operating the individual capacitors through cycles approximating Carnot cycles.

Pressure to electric transducer

Abstract: A pressure to electric transducer is described employing an electrical capacitance formed by two parallel metal plates separated by a variable air gap, one of the plates being fixedly mounted and the other being movable to change the spacing in direct proportion to fluid pressure acting on an input element or capsule to which the movable plate is connected. The capacitance forms one leg of a negative feed back divider network, for controlling an operational amplifier so that its gain is directly proportional to the spacing of the plates. The amplifier is driven by a constant alternating current source so that its output is directly proportional to the applied pressure. The voltage output can be rectified and transformed in a conventional manner for transmission of a signal.

Method of separating hysteresis effects from MIS capacitance measurements

Abstract: A new method is proposed to estimate interface state density in hysteretic MIS devices. In this method, a narrow bias‐voltage swing is applied around a certain center bias voltage to obtain a narrow C‐V curve without hysteresis. It is shown that the capacitance derivative obtained in this way depends on MIS capacitance only, and then can be used for determining the interface state density in the hysteretic InSb MIS devices.