Showing papers on "Capacitance published in 2005"

Impedance spectroscopy : theory, experiment, and applications

Abstract: Preface. Preface to the First Edition. Contributors. Contributors to the First Edition. Chapter 1. Fundamentals of Impedance Spectroscopy (J.Ross Macdonald and William B. Johnson). 1.1. Background, Basic Definitions, and History. 1.1.1 The Importance of Interfaces. 1.1.2 The Basic Impedance Spectroscopy Experiment. 1.1.3 Response to a Small-Signal Stimulus in the Frequency Domain. 1.1.4 Impedance-Related Functions. 1.1.5 Early History. 1.2. Advantages and Limitations. 1.2.1 Differences Between Solid State and Aqueous Electrochemistry. 1.3. Elementary Analysis of Impedance Spectra. 1.3.1 Physical Models for Equivalent Circuit Elements. 1.3.2 Simple RC Circuits. 1.3.3 Analysis of Single Impedance Arcs. 1.4. Selected Applications of IS. Chapter 2. Theory (Ian D. Raistrick, Donald R. Franceschetti, and J. Ross Macdonald). 2.1. The Electrical Analogs of Physical and Chemical Processes. 2.1.1 Introduction. 2.1.2 The Electrical Properties of Bulk Homogeneous Phases. 2.1.2.1 Introduction. 2.1.2.2 Dielectric Relaxation in Materials with a Single Time Constant. 2.1.2.3 Distributions of Relaxation Times. 2.1.2.4 Conductivity and Diffusion in Electrolytes. 2.1.2.5 Conductivity and Diffusion-a Statistical Description. 2.1.2.6 Migration in the Absence of Concentration Gradients. 2.1.2.7 Transport in Disordered Media. 2.1.3 Mass and Charge Transport in the Presence of Concentration Gradients. 2.1.3.1 Diffusion. 2.1.3.2 Mixed Electronic-Ionic Conductors. 2.1.3.3 Concentration Polarization. 2.1.4 Interfaces and Boundary Conditions. 2.1.4.1 Reversible and Irreversible Interfaces. 2.1.4.2 Polarizable Electrodes. 2.1.4.3 Adsorption at the Electrode-Electrolyte Interface. 2.1.4.4 Charge Transfer at the Electrode-Electrolyte Interface. 2.1.5 Grain Boundary Effects. 2.1.6 Current Distribution, Porous and Rough Electrodes- the Effect of Geometry. 2.1.6.1 Current Distribution Problems. 2.1.6.2 Rough and Porous Electrodes. 2.2. Physical and Electrochemical Models. 2.2.1 The Modeling of Electrochemical Systems. 2.2.2 Equivalent Circuits. 2.2.2.1 Unification of Immitance Responses. 2.2.2.2 Distributed Circuit Elements. 2.2.2.3 Ambiguous Circuits. 2.2.3 Modeling Results. 2.2.3.1 Introduction. 2.2.3.2 Supported Situations. 2.2.3.3 Unsupported Situations: Theoretical Models. 2.2.3.4 Unsupported Situations: Equivalent Network Models. 2.2.3.5 Unsupported Situations: Empirical and Semiempirical Models. Chapter 3. Measuring Techniques and Data Analysis. 3.1. Impedance Measurement Techniques (Michael C. H. McKubre and Digby D. Macdonald). 3.1.1 Introduction. 3.1.2 Frequency Domain Methods. 3.1.2.1 Audio Frequency Bridges. 3.1.2.2 Transformer Ratio Arm Bridges. 3.1.2.3 Berberian-Cole Bridge. 3.1.2.4 Considerations of Potentiostatic Control. 3.1.2.5 Oscilloscopic Methods for Direct Measurement. 3.1.2.6 Phase-Sensitive Detection for Direct Measurement. 3.1.2.7 Automated Frequency Response Analysis. 3.1.2.8 Automated Impedance Analyzers. 3.1.2.9 The Use of Kramers-Kronig Transforms. 3.1.2.10 Spectrum Analyzers. 3.1.3 Time Domain Methods. 3.1.3.1 Introduction. 3.1.3.2 Analog-to-Digital (A/D) Conversion. 3.1.3.3 Computer Interfacing. 3.1.3.4 Digital Signal Processing. 3.1.4 Conclusions. 3.2. Commercially Available Impedance Measurement Systems (Brian Sayers). 3.2.1 Electrochemical Impedance Measurement Systems. 3.2.1.1 System Configuration. 3.2.1.2 Why Use a Potentiostat? 3.2.1.3 Measurements Using 2, 3 or 4-Terminal Techniques. 3.2.1.4 Measurement Resolution and Accuracy. 3.2.1.5 Single Sine and FFT Measurement Techniques. 3.2.1.6 Multielectrode Techniques. 3.2.1.7 Effects of Connections and Input Impedance. 3.2.1.8 Verification of Measurement Performance. 3.2.1.9 Floating Measurement Techniques. 3.2.1.10 Multichannel Techniques. 3.2.2 Materials Impedance Measurement Systems. 3.2.2.1 System Configuration. 3.2.2.2 Measurement of Low Impedance Materials. 3.2.2.3 Measurement of High Impedance Materials. 3.2.2.4 Reference Techniques. 3.2.2.5 Normalization Techniques. 3.2.2.6 High Voltage Measurement Techniques. 3.2.2.7 Temperature Control. 3.2.2.8 Sample Holder Considerations. 3.3. Data Analysis (J. Ross Macdonald). 3.3.1 Data Presentation and Adjustment. 3.3.1.1 Previous Approaches. 3.3.1.2 Three-Dimensional Perspective Plotting. 3.3.1.3 Treatment of Anomalies. 3.3.2 Data Analysis Methods. 3.3.2.1 Simple Methods. 3.3.2.2 Complex Nonlinear Least Squares. 3.3.2.3 Weighting. 3.3.2.4 Which Impedance-Related Function to Fit? 3.3.2.5 The Question of "What to Fit" Revisited. 3.3.2.6 Deconvolution Approaches. 3.3.2.7 Examples of CNLS Fitting. 3.3.2.8 Summary and Simple Characterization Example. Chapter 4. Applications of Impedance Spectroscopy. 4.1. Characterization of Materials (N. Bonanos, B. C. H. Steele, and E. P. Butler). 4.1.1 Microstructural Models for Impedance Spectra of Materials. 4.1.1.1 Introduction. 4.1.1.2 Layer Models. 4.1.1.3 Effective Medium Models. 4.1.1.4 Modeling of Composite Electrodes. 4.1.2 Experimental Techniques. 4.1.2.1 Introduction. 4.1.2.2 Measurement Systems. 4.1.2.3 Sample Preparation-Electrodes. 4.1.2.4 Problems Associated With the Measurement of Electrode Properties. 4.1.3 Interpretation of the Impedance Spectra of Ionic Conductors and Interfaces. 4.1.3.1 Introduction. 4.1.3.2 Characterization of Grain Boundaries by IS. 4.1.3.3 Characterization of Two-Phase Dispersions by IS. 4.1.3.4 Impedance Spectra of Unusual Two-phase Systems. 4.1.3.5 Impedance Spectra of Composite Electrodes. 4.1.3.6 Closing Remarks. 4.2. Characterization of the Electrical Response of High Resistivity Ionic and Dielectric Solid Materials by Immittance Spectroscopy (J. Ross Macdonald). 4.2.1 Introduction. 4.2.2 Types of Dispersive Response Models: Strengths and Weaknesses. 4.2.2.1 Overview. 4.2.2.2 Variable-slope Models. 4.2.2.3 Composite Models. 4.2.3 Illustration of Typical Data Fitting Results for an Ionic Conductor. 4.3. Solid State Devices (William B. Johnson and Wayne L. Worrell). 4.3.1 Electrolyte-Insulator-Semiconductor (EIS) Sensors. 4.3.2 Solid Electrolyte Chemical Sensors. 4.3.3 Photoelectrochemical Solar Cells. 4.3.4 Impedance Response of Electrochromic Materials and Devices (Gunnar A. Niklasson, Anna Karin Johsson, and Maria Stromme). 4.3.4.1 Introduction. 4.3.4.2 Materials. 4.3.4.3 Experimental Techniques. 4.3.4.4 Experimental Results on Single Materials. 4.3.4.5 Experimental Results on Electrochromic Devices. 4.3.4.6 Conclusions and Outlook. 4.3.5 Time-Resolved Photocurrent Generation (Albert Goossens). 4.3.5.1 Introduction-Semiconductors. 4.3.5.2 Steady-State Photocurrents. 4.3.5.3 Time-of-Flight. 4.3.5.4 Intensity-Modulated Photocurrent Spectroscopy. 4.3.5.5 Final Remarks. 4.4. Corrosion of Materials (Digby D. Macdonald and Michael C. H. McKubre). 4.4.1 Introduction. 4.4.2 Fundamentals. 4.4.3 Measurement of Corrosion Rate. 4.4.4 Harmonic Analysis. 4.4.5 Kramer-Kronig Transforms. 4.4.6 Corrosion Mechanisms. 4.4.6.1 Active Dissolution. 4.4.6.2 Active-Passive Transition. 4.4.6.3 The Passive State. 4.4.7 Point Defect Model of the Passive State (Digby D. Macdonald). 4.4.7.1 Introduction. 4.4.7.2 Point Defect Model. 4.4.7.3 Electrochemical Impedance Spectroscopy. 4.4.7.4 Bilayer Passive Films. 4.4.8 Equivalent Circuit Analysis (Digby D. Macdonald and Michael C. H. McKubre). 4.4.8.1 Coatings. 4.4.9 Other Impedance Techniques. 4.4.9.1 Electrochemical Hydrodynamic Impedance (EHI). 4.4.9.2 Fracture Transfer Function (FTF). 4.4.9.3 Electrochemical Mechanical Impedance. 4.5. Electrochemical Power Sources. 4.5.1 Special Aspects of Impedance Modeling of Power Sources (Evgenij Barsoukov). 4.5.1.1 Intrinsic Relation Between Impedance Properties and Power Sources Performance. 4.5.1.2 Linear Time-Domain Modeling Based on Impedance Models, Laplace Transform. 4.5.1.3 Expressing Model Parameters in Electrical Terms, Limiting Resistances and Capacitances of Distributed Elements. 4.5.1.4 Discretization of Distributed Elements, Augmenting Equivalent Circuits. 4.5.1.5 Nonlinear Time-Domain Modeling of Power Sources Based on Impedance Models. 4.5.1.6 Special Kinds of Impedance Measurement Possible with Power Sources-Passive Load Excitation and Load Interrupt. 4.5.2 Batteries (Evgenij Barsoukov). 4.5.2.1 Generic Approach to Battery Impedance Modeling. 4.5.2.2 Lead Acid Batteries. 4.5.2.3 Nickel Cadmium Batteries. 4.5.2.4 Nickel Metal-hydride Batteries. 4.5.2.5 Li-ion Batteries. 4.5.3 Impedance Behavior of Electrochemical Supercapacitors and Porous Electrodes (Brian E. Conway). 4.5.3.1 Introduction. 4.5.3.2 The Time Factor in Capacitance Charge or Discharge. 4.5.3.3 Nyquist (or Argand) Complex-Plane Plots for Representation of Impedance Behavior. 4.5.3.4 Bode Plots of Impedance Parameters for Capacitors. 4.5.3.5 Hierarchy of Equivalent Circuits and Representation of Electrochemical Capacitor Behavior. 4.5.3.6 Impedance and Voltammetry Behavior of Brush Electrode Models of Porous Electrodes. 4.5.3.7 Impedance Behavior of Supercapacitors Based on Pseudocapacitance. 4.5.3.8 Deviations of Double-layer Capacitance from Ideal Behavior: Representation by a Constant-phase Element (CPE). 4.5.4 Fuel Cells (Norbert Wagner). 4.5.4.1 Introduction. 4.5.4.2 Alkaline Fuel Cells (AFC). 4.5.4.3 Polymer Electrolyte Fuel Cells (PEFC). 4.5.4.4 Solid Oxide Fuel Cells (SOFC). Appendix. Abbreviations and Definitions of Models. References. Index.

Chemical detection with a single-walled carbon nanotube capacitor.

Abstract: We show that the capacitance of single-walled carbon nanotubes (SWNTs) is highly sensitive to a broad class of chemical vapors and that this transduction mechanism can form the basis for a fast, low-power sorption-based chemical sensor. In the presence of a dilute chemical vapor, molecular adsorbates are polarized by the fringing electric fields radiating from the surface of a SWNT electrode, which causes an increase in its capacitance. We use this effect to construct a high-performance chemical sensor by thinly coating the SWNTs with chemoselective materials that provide a large, class-specific gain to the capacitance response. Such SWNT chemicapacitors are fast, highly sensitive, and completely reversible.

Impedance characterization and modeling of electrodes for biomedical applications

Abstract: A low electrode-electrolyte impedance interface is critical in the design of electrodes for biomedical applications. To design low-impedance interfaces a complete understanding of the physical processes contributing to the impedance is required. In this work a model describing these physical processes is validated and extended to quantify the effect of organic coatings and incubation time. Electrochemical impedance spectroscopy has been used to electrically characterize the interface for various electrode materials: platinum, platinum black, and titanium nitride; and varying electrode sizes: 1 cm/sup 2/, and 900 /spl mu/m/sup 2/. An equivalent circuit model comprising an interface capacitance, shunted by a charge transfer resistance, in series with the solution resistance has been fitted to the experimental results. Theoretical equations have been used to calculate the interface capacitance impedance and the solution resistance, yielding results that correspond well with the fitted parameter values, thereby confirming the validity of the equations. The effect of incubation time, and two organic cell-adhesion promoting coatings, poly-L-lysine and laminin, on the interface impedance has been quantified using the model. This demonstrates the benefits of using this model in developing a better understanding of the physical processes occurring at the interface in more complex, biomedically relevant situations.

Low-voltage organic field-effect transistors and inverters enabled by ultrathin cross-linked polymers as gate dielectrics

Abstract: The quest for high-performance organic thin-film transistor (OTFT) gate dielectrics is of intense current interest. Beyond having excellent insulating properties, such materials must meet other stringent requirements for optimum OTFT function: efficient low-temperature solution fabrication, mechanical flexibility, and compatibility with diverse gate materials and organic semiconductors. The OTFTs should function at low biases to minimize power consumption, hence the dielectric must exhibit large gate capacitance. We report the realization of new spin-coatable, ultrathin (<20 nm) cross-linked polymer blends exhibiting excellent insulating properties (leakage current densities approximately 10(-)(8) Acm(-)(2)), large capacitances (up to approximately 300 nF cm(-)(2)), and enabling low-voltage OTFT functions. These dielectrics exhibit good uniformity over areas approximately 150 cm(2), are insoluble in common solvents, can be patterned using standard microelectronic etching methodologies, and adhere to/are compatible with n(+)-Si, ITO, and Al gates, and with a wide range of p- and n-type semiconductors. Using these dielectrics, complementary invertors have been fabricated which function at 2 V.

The effect of Al2O3 barrier layers in TiO2/dye/CuSCN photovoltaic cells explored by recombination and DOS characterization using transient photovoltage measurements.

Abstract: Solid-state dye-sensitized solar cells of the type TiO2/dye/CuSCN have been made with thin Al2O3 barriers between the TiO2 and the dye. The Al2O3-treated cells show improved voltages and fill factors but lower short-circuit currents. Transient photovoltage and photocurrent measurements have been used to find the pseudo-first-order recombination rate constant (kpfo) and capacitance as a function of potential. Results show that kpfo is dependent on Voc with the same form as in TiO2/dye/electrolyte cells. The added Al2O3 layer acts as a “tunnel barrier”, reducing the kpfo and thus increasing Voc. The decrease in kpfo also results in an increased fill factor. Capacitance vs voltage plots show the same curvature (∼150 mV/decade) as found in TiO2/dye/electrolyte cells. The application of one Al2O3 layer does not cause a significant shift in the shape or position of the capacitance curve, indicating that changes in band offset play a lesser role in the observed Voc increase. Cells made with P25 TiO2 have, on ave...

Nanoscale FinFETs with gate-source/drain underlap

Abstract: Using two-dimensional numerical device simulations, we show that optimally designed nanoscale FinFETs with undoped bodies require gate-source/drain (G-S/D) underlap that can be effectively achieved via large, doable straggle in the S-D fin-extension doping profile without causing S-D punch-through. The effective underlap significantly relaxes the fin-thickness requirement for control of short-channel effects (SCEs) via a bias-dependent effective channel length (L/sub eff/), which is long in weak inversion and approaches the gate length in strong inversion. Dependence of L/sub eff/ on the S/D doping profile defines a design tradeoff regarding SCEs and S/D series resistance that can be optimized, depending on the fin width, via engineering of the doping profile in the S/D fin-extensions. The noted optimization is exemplified via a well-tempered FinFET design with an 18-nm gate length, showing further that designs with effective underlap yield minimal parasitic capacitance and reduce leakage components such as gate-induced drain leakage current.

Current-voltage relations for electrochemical thin films

Abstract: The DC response of an electrochemical thin film, such as the separator in a microbattery, is analyzed by solving the Poisson--Nernst--Planck equations, subject to boundary conditions appropriate for an electrolytic/galvanic cell. The model system consists of a binary electrolyte between parallel-plate electrodes, each possessing a compact Stern layer, which mediates Faradaic reactions with nonlinear Butler--Volmer kinetics. Analytical results are obtained by matched asymptotic expansions in the limit of thin double layers and compared with full numerical solutions. The analysis shows that (i) decreasing the system size relative to the Debye screening length decreases the voltage of the cell and allows currents higher than the classical diffusion-limited current; (ii) finite reaction rates lead to the important possibility of a reaction-limited current; (iii) the Stern-layer capacitance is critical for allowing the cell to achieve currents above the reaction-limited current; and (iv) all polarographic (cur...

Low-voltage operation of a pentacene field-effect transistor with a polymer electrolyte gate dielectric

Abstract: Large operating voltages are often required to switch organic field-effect transistors (OFETs) on and off because commonly used gate dielectric layers provide low capacitive coupling between the gate electrode and the semiconductor. We present here a pentacene OFET gated by a solution-deposited polymer electrolyte film in which the current was modulated over four orders of magnitude using gate voltages less than 2V. A subthreshold slope of 180mV per decade of current was observed during transistor turn on at a source-drain bias of −1V; the estimated dielectric layer specific capacitance was 5μF∕cm2. Sweep rate-dependent hysteresis may be attributed to a combination of ion migration and charge carrier trapping effects. Strategies to improve switching speeds for polymer electrolyte-gated OFETs are also discussed.

A closed-form model for the pull-in voltage of electrostatically actuated cantilever beams

Abstract: A simple computationally efficient closed-form model has been developed to determine the pull-in voltage of a cantilever beam actuated by electrostatic force. The approach is based on a linearized uniform approximate model of the nonlinear electrostatic pressure and the load deflection model of a cantilever beam under uniform pressure. The linearized electrostatic pressure includes the electrostatic pressure due to the fringing field capacitances and has been derived from Meijs and Fokkema's highly accurate empirical expression for the capacitance of a VLSI on-chip interconnect. The model has been verified by comparing the results with published experimentally verified 3D finite element analysis results and also with results from similar closed-form models. The new model can evaluate the pull-in voltage for a cantilever beam with a maximum deviation of ±2% from the finite element analysis results for wide beams, and a maximum deviation of ±1% for narrow beams (extreme fringing field).

Using transformer parasitics for resonant converters - a review of the calculation of the stray capacitance of transformers

Abstract: Parasitic capacitances of conventional transformers can be used as resonant elements in resonant DC-DC converters in order to reduce the overall system size. For predicting the values of the parasitic capacitors without building the transformer different approaches for calculating these capacitances are compared. A systematic summary of the known approaches is given and missing links between the different theories and missing equations are added. Furthermore, a new simple procedure for modelling parasitic capacitances which is based on the known approaches is proposed. The resulting equations are verified by measurements on four different high voltage transformers.

Modeling and optimization of fringe capacitance of nanoscale DGMOS devices

Abstract: We analyze the impact of gate electrode thickness and gate underlap on the fringe capacitance of nanoscale double-gate MOS (DGMOS) transistors. We propose an analytical fringe capacitance model considering gate underlap and finite source/drain length. A comparison with the simulation results show that the model can accurately estimate the fringe capacitance of the device. We show that an optimum gate underlap can significantly reduce the fringe capacitance resulting in higher performance and lower power consumption. Also, the effects of process variation in gate underlap devices are discussed. Simulation results on a three-stage ring oscillator show that with optimum gate underlap 32% improvement in delay can be achieved.

Assessment of high-frequency performance potential of carbon nanotube transistors

Abstract: Self-consistent quantum simulations are used to explore the high-frequency performance potential of carbon nantube field-effect transistors (CNTFETs). The cutoff frequency expected for a recently reported CNT Schottky-barrier FET is well below the performance limit, due to the large parasitic capacitance between electrodes. We show that using an array of parallel nanotubes as the transistor channel reduces parasitic capacitance per tube. Increasing tube density gives a large improvement of high-frequency performance when tubes are widely spaced and parasitic capacitance dominates but only a small improvement when the tube spacing is small and intrinsic gate capacitance dominates. Alternatively, using quasi-one-dimensional nanowires as source and drain contacts should significantly reduce parasitic capacitance and improve high-frequency performance. Ballistic CNTFETs should outperform ballistic Si MOSFETs in terms of the high-frequency performance limit because of their larger band-structure-limited velocity.

Functionalized single wall carbon nanotubes treated with pyrrole for electrochemical supercapacitor membranes

Abstract: Supercapacitor electrodes based on pyrrole treated-functionalized single wall carbon nanotubes (SWNTs) were developed. High values of capacitance (350 F/g), power density (4.8 kW/kg), and energy density (3.3 kJ/kg) were obtained in 6 M KOH, and the capacitance is almost 7 times that of the control buckypaper. Specific capacitance of these materials has a strong dependence on the macropore surface area. The double layer capacity of pyrrole treated-functionalized SWNT electrodes is 154 μF/cm2 based on the BET model, and even higher based on the DFT model.

Linear capacitance measurement and touchless switch

Abstract: Capacitance measurement apparatus that enhances the sensitivity and accuracy of capacitive transducers, proximity sensors, and touchless switches. Each of two capacitors (C 1 , C 2 ) under measurement has one end connected to ground and is kept at substantially the same voltage potential by operational amplifier (A 1 ) or amplifiers (A 0 , A 1 ) using negative feedback. The apparatus is driven by a periodic e.g. sinusoidal signal source (G 1 ) or sources (G 1 , G 2 ) and includes a difference amplifier (A 2 ) operative to produce an electrical signal having a linear relationship with a specified arithmetic function of the capacitances of the two capacitors (C 1 , C 2 ). A touchless switch is implemented using the capacitance measurement apparatus. The touchless switch includes two sensor electrodes (E 1 , E 2 ) that correspond to the two capacitors (C 1 , C 2 ) under measurement and in one embodiment has a front surface in the form of a container.

Capacitance and conductance of single-walled carbon nanotubes in the presence of chemical vapors.

Abstract: Simultaneous conductance and capacitance measurements on a single-walled carbon nanotube (SWNT) network are used to extract an intrinsic property of molecular adsorbates. Adsorbates from dilute chemical vapors produce a rapid response in both the capacitance and the conductance of the SWNT network. These responses are caused by a combination of two distinct physiochemical properties of the adsorbates: charge transfer and polarizability. We find that the ratio of the conductance response to the capacitance response is a concentration-independent intrinsic property of a chemical vapor that can assist in its identification.

A 6-bit 1.2-GS/s low-power flash-ADC in 0.13-/spl mu/m digital CMOS

Abstract: We present a 6-bit 1.2-GS/s flash-ADC with wide analog bandwidth and low power, realized in a standard digital 0.13 /spl mu/m CMOS copper technology. Employing capacitive interpolation gives various advantages when designing for low power: no need for a reference resistor ladder, implicit sample-and-hold operation, no edge effects in the interpolation network (as compared to resistive interpolation), and a very low input capacitance of only 400 fF, which leads to an easily drivable analog converter interface. Operating at 1.2 GS/s the ADC achieves an effective resolution bandwidth (ERBW) of 700 MHz, while consuming 160 mW of power. At 600 MS/s we achieve an ERBW of 600 MHz with only 90 mW power consumption, both from a 1.5 V supply. This corresponds to outstanding figure-of-merit numbers (FoM) of 2.2 and 1.5 pJ/convstep, respectively. The module area is 0.12 mm/sup 2/.

Understanding Capacitively Coupled Contactless Conductivity Detection in Capillary and Microchip Electrophoresis. Part 2. Peak Shape, Stray Capacitance, Noise, and Actual Electronics

Abstract: Although simple equivalent circuits have been used to explain the basic functioning of a capacitively coupled contactless conductivity detector (C4D), more sophisticated models are required to take into account the effects of the spatial non-homogeneity of the solution conductivity as the electrophoretic zones pass inside the detector. The overshooting phenomenon observed in real electropherograms may be explained by modeling the coupling of the electrodes with the inner capillary with a network of resistors and capacitors and its dependence with the stray capacitance becomes evident. An even more detailed model of the cell based on electrostatics allows one to calculate the stray capacitances. For the typical geometries and materials, this capacitance is on the order of a few to hundreds of femtofarads. It was possible to demonstrate that the ground plane, sometimes used, reduces the capacitance, but does not eliminate it completely. Possible noise sources are also discussed. The electrode tightness minimizes a possible source of mechanical noise due to variation of the coupling capacitances. Thermal control should also be ensured; the calculations showed that a temperature fluctuation as low as 7×10−3 °C induces artifacts as high as the limit of quantification of K+ in a typical electrophoretic condition, for which the technique has one of its highest sensitivities.

Low capacitance junction-isolation for bulk FinFET technology

Abstract: The present invention provides a SiGe-based bulk integration scheme for generating FinFET devices on a bulk Si substrate in which a simple etch, mask, ion implant set of sequences have been added to accomplish good junction isolation while maintaining the low capacitance benefits of FinFETs. The method of the present invention includes providing a structure including a bottom Si layer and a patterned stack comprising a SiGe layer and a top Si layer on the bottom Si layer; forming a well region and isolation regions via implantation within the bottom Si layer; forming an undercut region beneath the top Si layer by etching back the SiGe layer; and filling the undercut with a dielectric to provide device isolation, wherein the dielectric has an outer vertical edge that is aligned to an outer vertical edge of the top Si layer.