Showing papers on "Carry-lookahead adder published in 1989"
17 May 1989
TL;DR: It is shown that n-bit AB mod N operation with 2/sup n-1/
Abstract: An algorithm for computing AB mod N is developed, where N can be any positive integer Since a carry-save adder can be used to implement the algorithm, a VLSI (very-large-scale integration) multiplier with area O(n) for multiplying n-bit integers is very fast It is shown that n-bit AB mod N operation with 2/sup n-1/ >
6 citations
TL;DR: The experimental results of the basic SD arithmetic integrated circuits by means of the bidirectional current-mode circuits and their evaluation show that the addition time of the SD adder is 14 times faster than that of the conventional ripple-carry adder and is three times faster of the block carry lookahead adder.
Abstract: For highly parallel operation, use of a radix-4 signed-digit (SD) number system is attractive. Since the SD number system uses more than three values in each digit, multivalued coding is suitable for the implementation of the high-speed compact arithmetic integrated circuits. We have already proposed the basic idea of multivalued bidirectional current-mode circuits which are essentially suitable for the SD arithmetic implementation. This paper describes the experimental results of the basic SD arithmetic integrated circuits by means of the bidirectional current-mode circuits and their evaluation. A parallel SD adder is implemented with 2-μm CMOS technology and the addition time is estimated to be about 10 ns. The addition time of the SD adder is 14 times faster than that of the conventional ripple-carry adder and is three times faster than that of the block carry lookahead adder.