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Chamber pressure

About: Chamber pressure is a(n) research topic. Over the lifetime, 2988 publication(s) have been published within this topic receiving 30725 citation(s).


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Patent
26 Oct 1988
TL;DR: In this paper, a high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD and plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing.
Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either along or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

347 citations

Patent
26 Oct 1988
TL;DR: In this article, a high pressure, high throughput, single wafer, semiconductor processing reactor is described which is capable of thermal CVD, plasma-enhanced CVD and plasma assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing.
Abstract: A high pressure, high throughput, single wafer, semiconductor processing reactor is disclosed which is capable of thermal CVD, plasma-enhanced CVD, plasma-assisted etchback, plasma self-cleaning, and deposition topography modification by sputtering, either separately or as part of in-situ multiple step processing. The reactor includes cooperating arrays of interdigitated susceptor and wafer support fingers which collectively remove the wafer from a robot transfer blade and position the wafer with variable, controlled, close parallel spacing between the wafer and the chamber gas inlet manifold, then return the wafer to the blade. A combined RF/gas feed-through device protects against process gas leaks and applies RF energy to the gas inlet manifold without internal breakdown or deposition of the gas. The gas inlet manifold is adapted for providing uniform gas flow over the wafer. Temperature-controlled internal and external manifold surfaces suppress condensation, premature reactions and decomposition and deposition on the external surfaces. The reactor also incorporates a uniform radial pumping gas system which enables uniform reactant gas flow across the wafer and directs purge gas flow downwardly and upwardly toward the periphery of the wafer for sweeping exhaust gases radially away from the wafer to prevent deposition outside the wafer and keep the chamber clean. The reactor provides uniform processing over a wide range of pressures including very high pressures. A low temperature CVD process for forming a highly conformal layer of silicon dioxide is also disclosed. The process uses very high chamber pressure and low temperature, and TEOS and ozone reactants. The low temperature CVD silicon dioxide deposition step is particularly useful for planarizing underlying stepped dielectric layers, either alone or in conjunction with a subsequent isotropic etch. A preferred in-situ multiple-step process for forming a planarized silicon dioxide layer uses (1) high rate silicon dioxide deposition at a low temperature and high pressure followed by (2) the deposition of the conformal silicon dioxide layer also at high pressure and low temperature, followed by (3) a high rate isotropic etch, preferably at low temperature and high pressure in the same reactor used for the two oxide deposition steps. Various combinations of the steps are disclosed for different applications, as is a preferred reactor self-cleaning step.

285 citations

Journal ArticleDOI

253 citations

Patent
28 Jul 1997
TL;DR: In this article, a method of etching a trench in a semiconductor substrate in a reactor chamber using alternatively reactive ion etching and depositing a passivation layer by chemical vapour deposition is described.
Abstract: This invention relates to methods for treatment of semiconductor substrates and in particular a method of etching a trench in a semiconductor substrate in a reactor chamber using alternatively reactive ion etching and depositing a passivation layer by chemical vapour deposition, wherein one or more of the following parameters: gas flow rates, chamber pressure, plasma power, substrate bias, etch rate, deposition rate, cycle time and etching/deposition ratio vary with time.

250 citations

Journal ArticleDOI
TL;DR: In this paper, an experimental study on rotating detonation in a rocket engine is presented, where a model of a simple engine was designed, built, and tested, and the model of the engine was connected to the dump tank.
Abstract: An experimental study on rotating detonation is presented in this paper. The study was focused on the possibility of using rotating detonation in a rocket engine. The research was divided into two parts: the first part was devoted to obtaining the initiation of rotating detonation in fuel–oxygen mixture; the second was aimed at determination of the range of propagation stability as a function of chamber pressure, composition, and geometry. Additionally, thrust and specific impulse were determined in the latter stage. In the paper, only rich mixture is described, because using such a composition in rocket combustion chambers maximizes the specific impulse and thrust. In the experiments, two kinds of geometry were examined: cylindrical and cylindrical-conic, the latter can be simulated by a simple aerospike nozzle. Methane, ethane, and propane were used as fuel. The pressure–time courses in the manifolds and in the chamber are presented. The thrust–time profile and detonation velocity calculated from measured pressure peaks are shown. To confirm the performance of a rocket engine with rotating detonation as a high energy gas generator, a model of a simple engine was designed, built, and tested. In the tests, the model of the engine was connected to the dump tank. This solution enables different environmental conditions from a range of flight from 16 km altitude to sea level to be simulated. The obtained specific impulse for pressure in the chamber of max. 1.2 bar and a small nozzle expansion ratio of about 3.5 was close to 1,500 m/s.

219 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
20226
202167
202086
201991
201882
201799