Showing papers on "Channel length modulation published in 1970"

A New Instability in MOS Transistor Caused by Hot Electron and Hole Injection from Drain Avalanche Plasma into Gate Oxide

Abstract: Results of an experimental study are reported of a new instability found in p- and n-channel MOS transistors. This phenomenon is that when a higher voltage in an excess of a brakdown voltage is applied to the drain electrode the breakdown voltage drifts to a higher value and the drain current also increases. The origin of this instability is investigated by extensive measurements and analyses of the electrical characteristics of the transistors. It is concluded that 1) the semiconductor surface near the drain becomes p-like in the p-channel transistors and n-like in the n-channel transistors and thus the active channel length is shortened, 2) this is caused by charging of the gate oxide due to injection of electrons or holes generated during the drain avalanche breakdown, and 3) electron and hole injection is much affected by electric field across the oxide over the drain junction.

An analysis of current saturation mechanism of junction field-effect transistors

Abstract: A two-dimensional numerical analysis has been amde for junction field-effect transistors with small and large values of length-to-width ratio. Comparison of the results for different drain bias voltages shows the cause of the saturation of the drain current and the finite differential drain conductance in the saturation region. The effects of the geometry of the device and the field dependent mobility to the drain characteristics are clarified. Detailed pictures of the free carrier density distribution are presented, and the minimum channel width and the channel length are given for various bias conditions. A conduction path from the source to the drain with appreciable free carrier density has been found for bias conditions normally considered as pinched-off conditions. The drain characteristic with gate bias voltage is seen to be equivalent to that of a device with correspondingly smaller width and zero gate bias.

Potential, field and carrier distribution in the channel of junction field-effect transistors

Abstract: The operation mechanism of field-effect transistors (FET) was investigated by the measurements of the potential distribution in the channel using a tungsten needle as a probe in alloyed junction type FET in operation. The field distribution and the free carrier distribution were obtained as the first and the second derivative of the measured potential distribution. It is clear that, before the current saturation, from the source to the drain the electrically neutral channel exists. In this region the ionized impurity density and the carrier density are equal and the field toward the gate can be neglected. Contrary to this, in the channel at the drain side after the current saturation, the space charge layer extending from the gates reaches near the channel centre and the field to the gate direction becomes extremely high. In this region, an effective channel is formed in which the free carriers decrease toward the gate. At the centre of the effective channel, the electrical neutrality almost holds. Almost all of the voltage after the current saturation are spent in this region which is independent of the source side. In this short high field region, the field seems to be even in the velocity saturation region ( E >1·5×10 4 V/cm) of the carriers. The highest field region is rather outside of the gates. The potential and the carrier distribution in the channel at the drain side show a fairly good agreement with the theoretical calculation analysed in this paper.

Planar junction-gate field-effect transistors

Abstract: A junction-gate field-effect transistor is provided with its channel extending from the source to the drain in a direction normal to the plane of the substrate. The length of the channel is thereby substantially shorter than where the channel extends parallel to the plane of the substrate. The shorter channel provides faster switching speed and increased transconductance of the transistor.