Showing papers on "Channel length modulation published in 1979"
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TL;DR: In this paper, an accurate and convenient method to determine an effective MOSFET channel length is proposed based on a computer aided evaluation of an intrinsic channel resistance without using special test devices.
Abstract: An accurate and convenient method to determine an effective MOSFET channel length is proposed. This method is based on a computer aided evaluation of an intrinsic MOSFET channel resistance without using special test devices. N-channel silicon-gate MOSFETs were fabricated, and the channel length and its range of device to device scatter were evaluated . To define an effective channel, a simple model of the source-drain (S-D) diffusion layer is proposed. This model shows that the expected transition layer resistance between the S-D diffusion layer and the inverted channel layer agrees with the experimental results. The accuracy of this method is also discussed. It is found to be better than 0.1 µm.
269 citations
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TL;DR: In this article, the authors investigated the practical limitations of minimum-size MOS-LSI devices through measurement of experimental devices and concluded that the smallest feasible device has a channel length of 0.52 µm and a gate oxide thickness of 9.4 nm when the supply voltage is 1.5 V.
Abstract: Practical limitations of minimum-size MOS-LSI devices are investigated through measurement of experimental devices. It is assumed that scaled-down MOSFET's are limited by three physical phenomena. These are 1) poor threshold control which is caused by drain electric field, 2) reduced drain breakdown voltage due to lateral bipolar effects, and 3) hot-electron injection into the gate oxide film which yields performance variations during device operation. Experimental models of these phenomena are proposed and the smallest possible MOSFET structure, for a given supply voltage, is considered. It is concluded that the smallest feasible device has a channel length of 0.52 µm and a gate oxide thickness of 9.4 nm when the supply voltage is 1.5 V. Reliable threshold control is most difficult to realize in an MOS-LSI with the smallest devices.
88 citations
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TL;DR: In this paper, a two-dimensional numerical analysis is made for MOSFETs having short channel lengths, which is especially characterized by the existence of the punch-through current which cannot be explained by the one-dimensional MOS-FET models.
Abstract: A two-dimensional numerical analysis is made for MOSFETs having short channel lengths. The short channel MOSFET is especially characterized by the existence of the punch-through current which cannot be explained by the one-dimensional MOSFET models. The two-dimensional analysis makes clear the following facts relating about the punch-through mechanism. The punch-through is a condition in which the depletion layers of the source and the drain connect mutually at the deep region in the substrate even in equilibrium. The punch-through current is injected through the saddle point of the intrinsic potential into the drain region by the electric field from the drain, at the low gate voltages.
47 citations
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06 Aug 1979TL;DR: In this article, a vertical MOSFET structure with a drain consisting of a high conductivity region and a low conductivity area is proposed to minimize the device turn-on resistance without degrading the device breakdown voltage.
Abstract: A vertical MOSFET structure which includes a drain which comprises a high conductivity region and a low conductivity region. The high conductivity drain region is contoured so as to minimize the device turn-on resistance without degrading the device breakdown voltage.
30 citations
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TL;DR: In this paper, a detailed expression of the threshold voltage for a short-channel MOSFET is derived from a model of surfacepotential distribution under the gate using a relationship of surface-channel charge neutrality.
Abstract: A detailed expression of the threshold voltage for a short-channel MOSFET is derived from a model of surface-potential distribution under the gate using a relationship of surface-channel charge neutrality. The theory is compared with the measured threshold voltages. The theoretical curves for threshold voltage over a wide range of drain and backgate voltage are in good agreement with experimental results. It is shown for a MOSFET having a channel length less than 2 μm that the body-bias constant increases as the drain voltage increases. The theory also predicts that the increase in backgate voltage leads to the reduction in short-channel effect for the shorter-channel case.
20 citations
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TL;DR: The noise in MOSFETs at zero drain bias was found to be somewhat larger than the thermal noise of the output conductance gdo at that bias as discussed by the authors, and the effect was most pronounced at 300°K and has practically disappeared at 77°K.
Abstract: The noise in MOSFETs at zero drain bias is found to be somewhat larger than the thermal noise of the output conductance gdo at that bias The effect is most pronounced at 300°K and has practically disappeared at 77°K The effect is attributed to the large transverse field at the surface of the channel; the temperature dependence of the effect is as yet unexplained
15 citations
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TL;DR: In this paper, the authors show that at a given drain current, the transconductance gm for large Vg−VT is smaller than the elementary theory predicts, which introduces an error I2d/[g2m(Vg −VT)2] in the calculated results.
Abstract: The elementary theories of flicker noise in MOSFET’s operating at low drain bias evaluate the spectrum SVeq8f) of the equivalent gate noise emf δVeq under the assumptions of an effective mobility μeff that is independent of the gate voltage Vg and of a carrier number in the channel that varies linearly with the gate voltage We show here that this introduces an error I2d/[g2m(Vg—VT)2] in the calculated results Experiments show that this error can be significant, so that it makes some existing interpretations of SVeq(f) doubtful The error comes about because at a given drain current Id the transconductance gm for large Vg−VT is smaller than the elementary theory predicts This affects most MOSFET modeling at low drain bias
13 citations
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TL;DR: In this article, deep ion implantation of acceptor impurities beneath the channel is found to improve the sub-threshold voltage characteristics of short channel nMOSFET in the subthreshold region.
Abstract: The current voltage characteristics of short channel nMOSFET in the subthreshold region is investigated by two-dimensional numerical analysis. Deep ion implantation of acceptor impurities beneath the channel is found to improve the subthreshold characteristics. Structure optimization for the deeply ion-implanted short channel MOSFET is carried out to obtain low subthreshold current with steep semilogarithmic slope, which are almost comparable with the long channel MOSFET.
12 citations
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01 Jan 1979TL;DR: In this article, a simple, approximate relation between MOSFET parameters and the minimum channel length for which long-channel subthreshold behavior will be observed is proposed, without requiring reduction of all dimensions by the same scale factor.
Abstract: As MOSFET dimensions are reduced, it is desirable to preserve long-channel MOSFET behavior. In general, lower voltages, shallower junctions, thinner oxides, and heavier doping help to maintain long-channel behavior as channel length is reduced. Our purpose here is to propose a simple, approximate relation between these parameters and the minimum channel length for which long-channel subthreshold behavior will be observed. This relation provides a simple estimate for MOSFET parameters, not requiring reduction of all dimensions by the same scale factor.
8 citations
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TL;DR: In this paper, an expression for the on-resistance of a V-groove vertical-channel m.o.s. transistor is presented, which is useful in optimizing the drift region parameters for minimum onresistance and maximum drain-source breakdown.
Abstract: An expression for the on-resistance of a V-groove vertical-channel m.o.s. (V-v.m.o.s.) transistor is presented. The expression relates the on-resistance to the geometry and resistivity of the drain drift region and is useful in optimising the drift region parameters for minimum on-resistance and maximum drain-source breakdown.
1 citations