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Showing papers on "Channel length modulation published in 1981"


Journal ArticleDOI
Richard B. Fair1, R.C. Sun
TL;DR: In this paper, a semiquantitative model is proposed which shows that holes can recombine at H 2 molecules and release sufficient energy to cause dissociation, and the model calculations of the time, temperature, and voltage dependences of this threshold instability agree well with measured results.
Abstract: Hydrogen introduced and trapped in the gate oxide of MOSFET's by the silicon-nitride capping process can be activated by emitted holes from the MOSFET channel to produce a large threshold-voltage shift. This effect requires avalanche multiplication in the channel for the production of holes when a dc voltage is applied to the gate. For the pulsed-gate case, the magnitude of the threshold-voltage shift depends significantly on the gate-pulse fall time, cycle time, and duty cycle. In both cases the electric field normal to the Si/SiO 2 interface near the drain aids the emission of holes across that interface. A semiquantitative model is proposed which says that holes can recombine at H 2 molecules and release sufficient energy to cause dissociation. The atomic hydrogen created can participate in electrochemical reactions at the gate oxide/channel interface which create nonuniform distributions of trapped charge and interface states along the channel. Model calculations of the time, temperature, and voltage dependences of this threshold instability agree well with measured results.

162 citations


Proceedings ArticleDOI
T. Shibata1, K. Hieda, M. Sato, M. Konaka, R.L.M. Dang, H. Iizuka 
01 Jan 1981
TL;DR: In this paper, an n-channel MOS process has been optimized to yield desirable characteristics for submicron channel length MOSFETs, including long-channel subthreshold characteristics, saturation drain characteristics up to 5V, and minimized substrate bias effects for transistors with channel lengths as small as 0.5µ.
Abstract: An n-channel MOS process has been optimized to yield desirable characteristics for submicron channel length MOSFETs. Process/device simulation is extensively used to find an optimized processing sequence compatible to typical production line processes. The simulation results show an excellent agreement to experimental data. We have obtained long-channel subthreshold characteristics, saturation drain characteristics up to 5V, and minimized substrate bias effects for transistors with channel lengths as small as 0.5µ. The short channel effects have been also minimized. A unique self-aligned silicidation technology which has been developed to reduce the increased resistance of down-scaled junctions is also presented.

45 citations


Proceedings ArticleDOI
01 Jan 1981
TL;DR: In this article, the Schottky source and drain contacts with 300A PtSi were used to reduce the potential barrier arising in the gap between the source contact and the inversion channel.
Abstract: Recently MOSFET with Schottky source and drain has been considered an important candidate for VLSI because of its ultra-shallow junctions to minimize short-channel effects, low source and drain series resistances, simplified processes, and the elimination of minority carrier injection into the substrate [1]. We present results of MOSFETs with 300A PtSi as the source and drain contacts. The devices are fabricated on 2 × 1015cm-3, oriented n-Si substrates; and the gate oxide thickness is 250-300A. Long-channel behavior is observed for devices with channel lengths down to 1 µm, in very good agreement with the generalized guide for MOSFET miniaturization[2]. We observe that the output currents are smaller than those for the conventional MOSFETs. This is explained by the potential barrier arising in the gap between the Schottky source contact and the inversion channel. Extensive Arrhenius plots indicate that the gap has a profound effect in enhancing the corner field which in turn can greatly increase the current availability from the source. By reducing the gap to about 100A, the current approaches that as expected from the Pao-Sah theory[3].

41 citations


Journal ArticleDOI
TL;DR: In this paper, the anomalous phenomenon that the threshold voltage increases with decreasing channel length over a wide range of channel lengths was investigated in relatively heavily and deeply boron-implanted n-channel MOSFETs.
Abstract: In relatively heavily and deeply boron-implanted n-channel MOSFET's, we found the anomalous phenomenon that the threshold voltage increases with decreasing channel length over a wide range of channel lengths. This is quite contrary to the well-known short-channel effect associated with the dependence of the threshold voltage on the channel length. It is difficult to explain this phenomenon directly by any simplified models that have been presented to date. In this brief, we present mainly the detailed experimental results of such an anomalous short-channel effect.

41 citations


Journal ArticleDOI
TL;DR: In this paper, a high-speed buried channel MOSFET dielectrically isolated from the substrate through the use of oxygen implantation technology is described, and the effective carrier mobility calculated from the drain conductance is 750 cm2/V. s.
Abstract: This paper describes a high-speed buried channel MOSFET dielectrically isolated from the substrate through the use of oxygen implantation technology. An implanted silicon dioxide layer is formed just beneath the surface. An n-type epitaxial layer is grown on the remaining thin single-crystal layer at the surface. Then, buried channel MOSFET's are formed on the n-type layer. The interface between the implanted SiO 2 and the upper silicon is abrupt, and the interface charge density is 6.9 × 1010cm-2. The effective carrier mobility calculated from the drain conductance is 750 cm2/V . s. Leakage current which should be inherent in this device structure can not be observed. Submicron MOSFET's show much smaller threshold voltage shifts than conventional ones, and this agrees with the results of two-dimensional numerical calculation. A ring oscillator composed of MOSFET's with 1-µm channel length shows a minimum delay time of 95 ps and a power delay product of 310 fJ at V DD of 15 V.

33 citations


Journal ArticleDOI
TL;DR: In this paper, a closed form analytical expression for the threshold voltage of a small geometry MOSFET is developed, which is derived from a three dimensional geometrical approximation of the bulk charge.
Abstract: A closed form analytical expression for the threshold voltage of a small geometry MOSFET is developed. The threshold voltage expression is derived from a three dimensional geometrical approximation of the bulk charge. The threshold voltage is expressed as a function of gate oxide thickness, channel doping concentraton, junction-depth, backgate bias and channel length and width. The theory is compared with experimental results and the agreement is close.

32 citations


Journal ArticleDOI
TL;DR: In this article, the effects of neutron and gamma radiation on the drain-source resistance characteristics of power VDMOS transistors are presented, showing that the change in resistance with neutron exposure is related to the resistivity of the drain material, which in turn can be related to drain source breakdown voltage.
Abstract: Data on the effects of neutron and gamma radiation on the drain-source resistance characteristics of power VDMOS transistors are presented. The change in resistance with neutron exposure is related to the resistivity of the drain material, which in turn can be related to the drain-source breakdown voltage. A device with a 450-V rating experienced a factor of 13 increase in resistance on exposure to a neutron fluence of 1014/cm2 whereas one with a breakdown voltage of 150 V experiences no increase in resistance. Threshold voltage shifts of about 2 V occurred at a gamma dose of 105 rad(Si) without bias and was accelerated by positive gate bias. All of these data are consistent with the predictions of a simple model for the dependence of drain-source resistance on gate voltage and drain resistivity. This model illustrates a general separability of neutron and gamma effects on power VDMOS devices. The systems implications for using this type device in a radiation environment are briefly addressed.

24 citations


Journal ArticleDOI
M.R. Wordeman1, R.H. Dennard1
TL;DR: In this paper, it was shown that the threshold voltage of a depletion-mode MOSFET is a function of its mode of operation (linear or saturated) due to a change in dominant conduction mechanisms caused by the finite depth of donor impurities in the channel.
Abstract: This paper presents the results of a study of the characteristics of the depletion-mode MOSFET. In particular, it is shown that the threshold voltage of this device is a function of its mode of operation (linear or saturated) due to a change in dominant conduction mechanisms caused by the finite depth of donor impurities in the channel. The effect of these impurities on the short channel behavior of the devices also is examined.

19 citations


Journal ArticleDOI
TL;DR: In this article, a simple closed-form analytical expression of the threshold voltage for a narrow-width MOSFET was developed, which gives a threshold voltage expression as a function of gate oxide thickness and channel doping concentration.
Abstract: A simple closed-form analytical expression of the threshold voltage for a narrow-width MOSFET is developed. The narrow-width model gives a threshold voltage expression as a function of gate oxide thickness, channel doping concentration, backgate bias and channel width. The theory is compared with experimental results and the agreement is close.

18 citations


Proceedings ArticleDOI
01 Jan 1981
TL;DR: In this article, simulation is used to show how the lateral subdiffusion regions of S/D represent a dominant, V GS -dependent portion of the total resistance, since the doping profile there is steeply decreasing and the carrier concentration can be modulated by the gate voltage.
Abstract: At small V DS , g m reduction in MOSFET's is often attributed to mobility degradation due to increased vertical electric field with increasing V GS . This is correct for long channel devices; however, for short channel devices the parasitic series resistance of source/drain, R T , has a similar effect in reducing the g m value. In this paper, simulation is used to show how the lateral subdiffusion regions of S/D represent a dominant, V GS -dependent portion of the total resistance, since the doping profile there is steeply decreasing and the carrier concentration can be modulated by the gate voltage.

17 citations


Journal ArticleDOI
TL;DR: In this paper, the drain breakdown characteristics for the short channel MOSFETs are calculated by the two-dimensional analysis method, and it is shown that the degradation voltage decreases with an increase in gate voltage.
Abstract: Recently, the electrical characteristics for the short channel MOSFETs (Metal-Oxide-Semiconductor field effect transistor) have become important because of the increasing density of LSIs (Large Scale Integrated Circuits). One of the methods to understand the characteristics of the short channel MOSFETs is the two-dimensional analysis of the MOSFETs, and many studies about threshold voltage and other items have been made by using the two-dimensional method. In this paper, the drain breakdown characteristics for the short channel MOSFETs are calculated by the two-dimensional analysis method. Consequently, one of the phenomena for the short channel MOSFETs, that the breakdown voltage decreases with increase in gate voltage, is reduced to the difference of the electric field strength distribution from that of the long channel MOSFETs. This variation of the electric field distribution is caused by the strong influence of the electric field from the drain upon the considerable region in the substrate of the short channel MOSFETs.

Journal ArticleDOI
TL;DR: In this paper, simple expressions of threshold and subthreshold characteristics for a very small buried-channel MOSFET are derived from a model of majority-carrier distribution along the channel.
Abstract: Simple expressions of threshold and subthreshold characteristics for a very small buried-channel MOSFET is derived from a model of majority-carrier distribution along the channel. The carrier distribution is determined from the Poisson equation for a high-low junction. The basic formula for the subthreshold characteristic is derived from the majority-carrier drift-current equation. The theory is compared with the measured threshold voltages and the measured inverse semilogarithmic slopes of subthreshold current. The theoretical curves are in a reasonable agreement with experimental results. It is shown for a buried-channel MOSFET having a channel length less than 1 μm that the threshold and subthreshold characteristics change abruptly as the channel length is reduced because the majority-carrier concentration increases through the carrier diffusion from the source and drain terminals. The theoretical estimation shows that buried-channel MOSFETs will have the less short-channel effect than surface-channel MOSFETs for a small drain voltage. The theory also predicts that the buried-channel MOSFET can be scaled down in the same way as the surface-channel MOSFET.

Proceedings ArticleDOI
01 Jan 1981
TL;DR: In this paper, a charge sheet DC MOSFET model for small geometry devices is derived, taking into account the drain induced barrier lowering and high field effects at the drain side.
Abstract: A charge sheet DC MOSFET model for small geometry devices is derived. It takes into account the drain induced barrier lowering and high field effects at the drain side. This model includes the diffusion component; the current expression is therefore valid in a continuous way for all regions of operation including the subthreshold regime. Two important saturation mechanisms are brought out by the analysis : at low current a diffusion mode and at high current a drift mode. I-V characteristics are predicted, within the limits of process parameter variations, using as inputs only physical and structural constants.

Journal ArticleDOI
TL;DR: In this paper, the threshold voltage in a short-channel MOS transistor is a sensitive function of the effective channel length, substrate bias and the channel impurity profile, and a continuous model is developed to obtain a simple analytical expression for the above described sensitivities suitable for CAD program implementation.
Abstract: The threshold voltage in a short-channel MOS transistor is a sensitive function of the effective channel length, substrate bias and the channel impurity profile. A continuous model is developed in this letter to obtain a simple analytical expression for the above described sensitivities suitable for CAD program implementation. The calculated values for the threshold voltage are compared with the measurements on MOSFETs with effective channel lengths between 9.7 μm and 1.2 μm.

Journal ArticleDOI
TL;DR: In this paper, the relative magnitude of the bulk charge for three MOSFET structures suitable for VLSI devices, such as NMOS (normal), VMOS (V slot) and UMOS (U slot), is carried out.
Abstract: An analysis of the relative magnitudes of the bulk charge for three MOSFET structures suitable for VLSI devices, such as NMOS (normal), VMOS (V slot) and UMOS (U slot), is carried out. It is shown that even for the same channel design (i.e. channel length, doping, source/drain junction depth, and oxide thickness), the amount of bulk charge and hence the threshold voltage can be significantly different for the three structures. This effect becomes more important with decreasing channel length, and increasing source to substrate bias. Further, for a given channel length, the bulk charge and hence the threshold voltage of an NMOS decreases with increasing source/drain junction depth. However, for the VMOS and UMOS structures, the bulk charge as well as the threshold voltage do not depend on the junction depth of the source/drain diffusion. An expression is also derived for the bulk charge of UMOS transistors valid for both short and long channels.