Channel length modulation

About: Channel length modulation is a research topic. Over the lifetime, 1790 publications have been published within this topic receiving 34179 citations.

Mos-type integrated circuit

Abstract: In a MOS-type integrated circuit, a source and a gate of a double diffusion MOSFET of an n-channel type and a drain and a gate of a double diffusion MOSFET of a p-channel type are in an island region surrounded by an n-type annular contact region having high impurity concentration. An n epitaxial layer, in each island region, is used for the sources and drains of both MOSFETs. The drain electrode of the p-channel MOSFET is connected to the gate electrode of the n-channel MOSFET. With this structure, the power consumption of the circuit is decreased, and the operating speed thereof is increased.

Impact of velocity saturation and hot carrier effects on channel thermal noise model of deep sub-micron MOSFETs

Abstract: This paper discusses the impact of the short channel effects, such as channel length modulation (CLM), velocity saturation effect (VSE) and hot carrier effect (HCE), on the channel thermal noise model of short channel MOSFETs. Based on the fundamental thermal noise theory, the channel thermal noise models are derived in four different cases considering the effect of CLM only, CLM and VSE, CLM and HCE, and the combine effect of CLM, VSE and HCE. The noise reduction due to the VSE is found to be completely cancelled out by the noise increment due to the HCE for all the operating conditions.

Generalized guide for MOSFET miniaturization

Abstract: As MOSFET dimensions are reduced, it is desirable to preserve long-channel MOSFET behavior. In general, lower voltages, shallower junctions, thinner oxides, and heavier doping help to maintain long-channel behavior as channel length is reduced. Our purpose here is to propose a simple, approximate relation between these parameters and the minimum channel length for which long-channel subthreshold behavior will be observed. This relation provides a simple estimate for MOSFET parameters, not requiring reduction of all dimensions by the same scale factor.

Drain current local variability from linear to saturation region in 28 nm bulk NMOSFETs

Abstract: In this work, we investigate the impact of the source - drain series resistance mismatch on the drain current variability in 28 nm bulk MOSFETs. For the first time, a mismatch model including the local fluctuations of the threshold voltage (Vt), the drain current gain factor (β) and the source – drain series resistance (RSD) in both linear and saturation regions is presented. Furthermore, it is demonstrated that the influence of the source – drain series resistance mismatch is attenuated in the saturation region, due to the weaker sensitivity of the drain current variability on the series resistance variation. The experimental results were further verified by numerical simulations of the drain current characteristics with sensitivity analysis of the MOSFET parameters Vt, β and RSD.

MOS switch with hysteresis

Abstract: An MOS circuit possessing hysteresis and positive feedback for fast switching includes a first MOSFET having its gate connected to an input. A second depletion mode MOSFET has its drain connected to the source of the first MOSFET and its source connected to ground. A third depletion mode MOSFET has its drain connected to the source of the first MOSFET and its gate and source connected to the drain of a fourth MOSFET and to the gate of a fifth MOSFET. The gate of the fourth MOSFET is connected to the gate and source of a sixth depletion mode MOSFET and to the drain of the fifth MOSFET. The fifth MOSFET has its source connected to ground.