Channel length modulation

About: Channel length modulation is a research topic. Over the lifetime, 1790 publications have been published within this topic receiving 34179 citations.

Self-aligned metal-semiconductor field effect transistor

Abstract: Disclosed is a self-aligned GaAs, lightly doped drain metal-semiconductor field effect transistor. The device (70) consists of a shallow n- active channel region (53A) formed on a GaAs substrate (50), a Schottky gate (54) overlying the n- region and highly doped and deep n* source (64) and drain (65) regions formed on either side of the gate. In the channel regions between the gate edges and the source/drain regions are positioned n-type source/drain extensions (57A, 58A) which have an intermediate depth and doping concentration to minimize the device series resistance, suppress short channel effects and permit channel length reduction to submicron levels. In addition, p-type pockets (59A, 60A) are provided under the source/drain extensions (57A, 58A) to better control the device threshold voltage and further reduce the channel length.

Modelling the channel-length modulation coefficient for junction field-effect transistors

Abstract: The saturation current-voltage characteristics of a junction field-effect transistor (JFET) are influenced by the effective conducting channel length of the device. The effective channel length is modulated by the gate voltage and the drain voltage due to the variation of the thicknesses of the depletion layers associated with the top-and bottom-gate of the JFET. For a given gate voltage, the effective channel length will shrink if the drain voltage is increased, a mechanism normally described by the channel-length modulation coefficient k. This paper develops a model for calculating λ, when combined with a recently developed JFET static model, this λ model can be used to predict the saturation behaviour of JFETs. Experimental data are included in support of the model.

One-way switch

Abstract: A one-way switch comprises a metal-oxide semiconductor field-effect transistor (MOSFET) and a driver. Source and drain of the transistor function as P-terminal and N-terminal of the one-way switch. The driver, such as comparator or amplifier, is used to detect the voltage difference between the source and drain of the MOSFET. When the voltage of the P-terminal is higher than that of the N-terminal, the driver 150 outputs a driving voltage to gate of the MOSFET to turn on the MOSFET. If the voltage of P-terminal is lower than that of the N-terminal, the driver 150 cannot output voltage to turn on the MOSFET, and the one-way switch is off. Therefore, the one-way switch has the characteristic of workings in one direction.

Reference voltage generation circuit

Abstract: PROBLEM TO BE SOLVED: To prevent a depression-type MOS transistor, which becomes a reference current source, from being affected by a substrate bias effect and a channel length modulation effect. SOLUTION: A reference voltage generation circuit is provided with; a depression-type NMOS transistor MD1 which works, as a reference current source, without a substrate bias; an enhancement-type NMOS transistor MN1 which is connected to a diode; a bias circuit 1 which supplies bias currents corresponding to voltages, which are inputted to a control input terminal 1B, from bias output terminals 1C and 1D to the drains of the MOS transistors MD1 and MN1; and a differential amplifier 3 which outputs a voltage corresponding to a difference between the drain voltages of the MOS transistor MD1 and MOS transistor MN1 to the control input terminal 1B of the bias circuit 1. The reference voltage generation circuit supplies the MOS transistor MN1 with the same current as the drain current of the MOS transistor MD1 to control both drain voltages so that they may be equal, and outputs, as a reference voltage Vref, a voltage between the gate and source of the MOS transistor MN1. COPYRIGHT: (C)2007,JPO&INPIT

Performance evaluation of FD-SOI Mosfets for different metal gate work function

Abstract: Fully depleted (FD) Silicon on Insulator (SOI) metal oxide Field Effect Transistor (MOSFET) Is the Leading Contender for Sun 65nm Regime. This paper presents a study of effects of work functions of metal gate on the performance of FD-SOI MOSFET. Sentaurus TCAD simulation tool is used to investigate the effect of work function of gates ont he performance FDSOI MOSFET. Specific channel length of the device that had been concentrated is 25nm. From simulation we observed that by changing the work function of the metal gates of FD-SOI MOSFET we can change the threshold voltage. Hence by using this technique we can set the appropriate threshold voltage of FD-SOI MOSFET at same voltage and we can decrease the leakage current, gate tunneling current and short channel effects and increase drive current.