Topic
Channel length modulation
About: Channel length modulation is a research topic. Over the lifetime, 1790 publications have been published within this topic receiving 34179 citations.
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07 Aug 1989
TL;DR: In this article, the authors examined six models for predicting triode region MOSFET behavior, which were formed from the combination of two channel charge models and three carrier velocity models.
Abstract: The authors examine six models for predicting triode region MOSFET behavior. The six models are formed from the combination of two channel charge models and three carrier velocity models. The channel charge and velocity descriptions are well documented in the literature, but only four of the models have been compared with experiment. It is shown that all six models predict identical MOSFET characteristics for sufficiently small drain voltages. It is shown that, at temperatures high enough that channel carrier freezeout is negligible, it is acceptable to extract MOSFET parameters from the transfer characteristics using methods derived from the simple square law model without velocity saturation. However, due to channel carrier freezeout onto the minority impurity sites for device bodies which contain both donors and acceptors, these methods are invalid at low temperatures. It is also shown that the hole saturation velocity in the channel increases with decreasing temperature. Between room and liquid-nitrogen temperatures, the increase is about 44%. >
4 citations
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01 Dec 2009TL;DR: In this paper, the drain parasitic inductance, intrinsic capacitance, channel resistance, gate resistance, drain resistance, and source resistance are determined from the scattering parameters measured on RFMOS transistors with channel length of 90nm, 100nm and 110nm with different numbers of gate-fingers.
Abstract: This work reports a new model parameter extraction scheme for multi-finger MOS transistors operated in the radio-frequency (RF) range. The drain parasitic inductance, intrinsic capacitance, channel resistance, gate resistance, drain resistance, and source resistance are determined from the scattering parameters measured on RFMOS transistors with channel length of 90nm, 100nm and 110nm with different numbers of gate-fingers. Most of the values and dependencies of the extracted parameters agree with the theoretical models. However, for transistor with gate length of 90 nm and 48 gate fingers, the experimental result suggests the substrate capacitance and substrate resistance should be considered in the small signal equivalent circuit.
4 citations
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TL;DR: An analytical model based on the non-uniform lateral concentration profile along the channel for a long-channel grooved-gate MOSFET has been developed to investigate the effects of the groove angle, dose and energy of the channel implantation and other groove dimensions on the electrical performance of the device as mentioned in this paper.
Abstract: In a grooved-gate MOSFET with a U-grooved gate and a ion-implanted channel, the lateral concentration profile of the channel is non-uniform. This has a remarkable influence on the current-voltage characteristics of the device. An analytical model based on the non-uniform lateral concentration profile along the channel for a long-channel grooved-gate MOSFET has been developed to investigate the effects of the groove angle, dose and energy of the channel implantation and other groove dimensions on the electrical performance of the device. The simulation results demonstrates that if properly optimized, higher current conduction at a desired threshold voltage with improved breakdown voltage, as compared with a conventional MOSFET can be achieved. Experimental results from a fabricated test device structure support the simulated current-voltage characteristics based on the model.
4 citations
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05 Sep 1989TL;DR: In this article, the authors present a biasing structure which always guarantees the correct biasing under any process variations (parameter variations from chip to chip) or any bulk effect and ensures that all the transistors are always biased just in saturation.
Abstract: To reduce the channel length modulation effect, a cascode structure is very often used in current mirrors. However, this technique requires a correct biasing of the cascode transistor. The author presents a biasing structure which always guarantees the correct biasing under any process variations (parameter variations from chip to chip) or any bulk effect and ensures that all the transistors are always biased just in saturation. As a result a current mirror is realized which has a maximum voltage output swing and a very high current mirror accuracy. >
4 citations
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TL;DR: In this article, the authors developed a theory for scaling properties of quantum transport in nano-field effect transistors based on a one-dimensional effective expression for the drain current in the Landauer-Buttiker formalism.
Abstract: We develop a theory for scaling properties of quantum transport in nano-field effect transistors. Our starting point is a one-dimensional effective expression for the drain current in the Landauer-Buttiker formalism. Assuming a relatively simple total potential acting on the electrons the effective theory can be reduced to a scale-invariant form yielding a set of dimensionless control parameters. Among these control parameters are the characteristic length l and -width w of the electron channel which are its physical length and -width in units of the scaling length . Here is the Fermi energy in the source contact and is the effective mass in the electron channel. In the limit of wide transistors and low temperatures we evaluate the scale-invariant i-v characteristics as a function of the characteristic length. In the strong barrier regime, i. e. for long-channel behavior is found. At weaker barriers source-drain tunneling leads to increasingly significant deviations from the long-channel behavior.
4 citations