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Channel length modulation

About: Channel length modulation is a research topic. Over the lifetime, 1790 publications have been published within this topic receiving 34179 citations.


Papers
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Journal ArticleDOI
TL;DR: In this article, a new model for HEMT's is presented based on a single analytical function that describes the electron concentrations in the two dimensional electron gas and in the AlGaAs layer.
Abstract: In this paper we present a new model for HEMT's which is based on a single analytical function that describes the electron concentrations in the two dimensional electron gas and in the AlGaAs layer. Besides accounting for the AlGaAs conduction, the model includes the effect of mobility degradation, channel length modulation in the saturation region and the series resistances R/sub S/ and R/sub D/. The model results in closed form expressions for the current, transconductance, output conductance and gate capacitance. Finally, the theoretical predictions of the model are compared with the experimental data and shown to be in good agreement over a wide range of bias conditions. >

53 citations

Journal ArticleDOI
TL;DR: In this paper, a new method is proposed to use an L-array for extracting the low field mobility μ00, the mobility degradation coefficient θ, the channel length correction l′, and the parameters Rs0 and Rsv for the gate-voltage-dependent series resistance on the source side RsS = Rs0 + Rsv/VG∗.
Abstract: P-channel LDD MOSFETs with a p+-poly gate and an n+-poly gate are investigated. The p+-poly gate forms a surface channel and the n+-pol gate a bulk channel. A new method is proposed to use an L-array for extracting the low field mobility μ00, the mobility degradation coefficient θ, the channel length correction l′, and the parameters Rs0 and Rsv for the gate-voltage-dependent series resistance on the source side RsS = Rs0 + Rsv/VG∗. A bulk channel device has a higher μ00 value, a Rsv and a smaller series resistance RDd on the drain side than a surface channel device. The θ value and the gate-voltage-independent part of the series resistance Rs0 are about the same in both devices. Under the same external bias conditions, a surface channel MOSFET has a smaller current and a higher 1/f current noise than a bulk channel device. The 1/f noise parameter α is found to be independent of the effective gate voltage and of the channel length for both defices. The bulk channel MOSFET shows α values of about 4×10−7 which are among the lowest values ever reported in literature. The α values in the surface channel devices are about two orders of magnitude higher than those in the bulk type. Comparing the d.c. characteristics and 1/f noise of both devices, an indication is given on how to reduce the 1/f noise in a surface p-channel MOSFET.

53 citations

Patent
24 Jun 1988
TL;DR: In this paper, a construction method and apparatus for lightly doped drain MOSFET that has low or minimum drift on-state resistance and maintains high voltage blocking in the off-state is presented.
Abstract: Construction method and apparatus for lightly doped drain MOSFET that has low or minimum drift on-state resistance and maintains high voltage blocking in the off-state. Temperature sensitivity of the electrical properties of the MOSFET are also reduced relative to MOSFETs produced by processes such as SIPOS. Voltage level shifting of p-channel and n-channel MOSFETs, produced according to the invention, relative to another voltage level is easily accomplished.

52 citations

Journal ArticleDOI
TL;DR: An analytical drain current model for undoped (or lightly doped) short-channel triple-gate fin-shaped field effect transistors (finFETs) is presented in this article.
Abstract: An analytical compact drain current model for undoped (or lightly doped) short-channel triple-gate fin-shaped field-effect transistors (finFETs) is presented, taking into account quantum-mechanical and short-channel effects such as threshold-voltage shifts, drain-induced barrier lowering, and subthreshold slope degradation. In the saturation region, the effects of series resistance, surface roughness scattering, channel length modulation, and saturation velocity were also considered. The proposed model has been validated by comparing the transfer and output characteristics with device simulations and with experimental results. The good accuracy and the symmetry of the model make it suitable for implementation in circuit simulation tools.

51 citations

Proceedings ArticleDOI
29 Sep 2008
TL;DR: In this article, a double-gate MOSFET with three laterally contacting material with different work functions is proposed to improve short channel effects, such as drain-induced barrier lowering (DIBL), hot-carrier effects and channel length modulation (CLM).
Abstract: In this paper, a novel double-gate (DG) MOSFET in which the top and bottom gates consist of three laterally contacting material with different work functions is proposed. Using two-dimensional (2-D) device simulation, improvement of short channel effects such as drain-induced barrier lowering (DIBL), hot-carrier effects and channel length modulation (CLM) are investigated and compared with the dual material double-gate MOSFET and conventional DG MOSFET. This structure exhibits significantly improved short channel effects (SCEs) when compared with the conventional DG MOSFET.

51 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202310
202230
202111
202016
201915
20189