Channel length modulation

About: Channel length modulation is a research topic. Over the lifetime, 1790 publications have been published within this topic receiving 34179 citations.

Scalability of Extremely Thin SOI (ETSOI) MOSFETs to Sub-20-nm Gate Length

Abstract: We report high-performance extremely thin SOI MOSFETs fabricated with a channel thickness down to 3.5 nm, sub-20-nm gate length, and contacted gate pitch of 100 nm. At an effective channel length of 18 nm, a drain-induced barrier lowering of 100 mV is achieved by either thinning the channel to 3.5 nm or by applying a reverse back-gate bias to 6-nm channel MOSFETs. Moreover, minimal increase in series resistance is seen when the channel is scaled to 3.5 nm, resulting in no performance degradation with SOI thickness scaling.

A 25-nm-long Channel Metal-Gate p-Type Schottky Source/Drain Metal-Oxide-Semiconductor Field Effect Transistor on Separation-by-Implanted-Oxygen Substrate

Abstract: A 25-nm-long channel metal-gate PtSi Schottky source/drain metal-oxide-semiconductor field effect transistor (MOSFET) fabricated on a separation-by-implanted-oxygen (SIMOX) substrate was demonstrated. The drain current and transconductance were 293 µA/µm and 431 mS/mm, respectively.

Fabrication of a New Si Field Emitter Tip with Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) Structure

Abstract: A current-controllable silicon field emitter tip with a metal-oxide-semiconductor field-effect transistor (MOSFET) structure is fabricated. The device has a simple structure in which a conical Si tip is made in the drain region of a MOSFET. The gate performs two roles; one is that of a conventional extraction gate and the other is that of a control gate for the drain current supplied to the tip. The fabrication process is very simple. In order to form n-type regions for the source and drain, only two steps including a self-aligned ion implantation were added to the conventional silicon tip fabrication process. Experimental results showed that the emission current was well controlled and stabilized by the drain current of the MOSFET. Stable emission of about 0.8 µA was obtained with a single tip. We also discuss a dual-gate MOSFET for further extension of the fabrication process introduced.

Analytical Model of Short-Channel Double-Gate JFETs

Abstract: In this paper, we propose a compact model of the short-channel double-gate (DG) JFETs, which are devices intended for low-power logic applications. In order to make the current equation continuous through all operating conditions from the subthreshold to well above the threshold without nonphysical fitting parameters, mobile carriers in depletion regions are considered. For describing the short-channel behavior, relevant parameters extracted from the 2-D analytical solution of Poisson's equation are used to modify long-channel equations. The field-dependent mobility, velocity saturation, channel-length modulation, and drain-induced barrier lowering are considered in the short-channel analysis. Models for the DG JFET are verified through numerically simulated current-voltage characteristics. Based on the model of the DG JFETs, the advantages of the DG JFETs over single-gate MOSFETs-which may have similar fabrication requirements-with the subthreshold regime are addressed.

Drain-Induced Barrier Lowering and Parasitic Resistance Induced Instabilities in Short-Channel InSnZnO TFTs

Abstract: Effect of short-channel induced instabilities in InSnZnO-based thin-film transistors (TFTs) caused by combination of the drain induced barrier lowering (DIBL) and parasitic resistance is reported. As the active channel length decreased below a critical value of around 8 μm, the draincurrent (2.81 μA) are abruptly increased and N-shaped behavior of the transconductance are observed due to the formation of additional current path in the channel. The magnitude of subgap density of states is also depended on the channel size. The higher value of parasitic resistance RSD (~42 kg) and DIBL coefficient (76.8 mV/V) in short-channel ITZO TFT devices are also discussed.