Channel length modulation

About: Channel length modulation is a research topic. Over the lifetime, 1790 publications have been published within this topic receiving 34179 citations.

A large-signal GaAs MESFET model implemented on SPICE

Abstract: A device model that predicts large-signal GaAs MESFET performance has been implemented on the large-scale circuit simulation program SPICE. The model takes into consideration drift velocity saturation, channel length modulation, and subthreshold current effects. In addition, the model depends primarily on physical (i.e. material and geometric) rather than empirical parameters. Combined with the SPICE program, a general CAD tool is formed which can be used to aid in the design of GaAs circuits such a power amplifiers, oscillators, mixers, and fast-switching digital integrated circuits. Model predictions are compared to measured device performance, and limitations of this large-signal circuit design approach are discussed.

Method Of Sensing Magnitude Of Current Through Semiconductor Power Device

Abstract: A cascode current sensor includes a main MOSFET and a sense MOSFET. The drain terminal of the main MOSFET is connected to a power device whose current is to be monitored, and the source and gate terminals of the main MOSFET are connected to the source and gate terminals, respectively, of the sense MOSFET. The drain voltages of the main and sense MOSFETs are equalized, in one embodiment by using a variable current source and negative feedback. The gate width of the main MOSFET is typically larger than the gate width of the sense MOSFET. Using the size ratio of the gate widths, the current in the main MOSFET is measured by sensing the magnitude of the current in the sense MOSFET. Inserting the relatively large MOSFET in the power circuit minimizes power loss.

Open drain driver, and a switch comprising the open drain driver

Abstract: An open drain driver (7) selectively switches a MOSFET switch (MN1) which is passively held in the conducting state into the non-conducting state. The MOSFET switch (MN1) switches an AC analogue input signal on a main input terminal (3) to a main output terminal (4) and the gate of the MOSFET switch (MN1) is AC coupled by a capacitor (C1) to the drain thereof. The open drain driver (7) comprises a first MOSFET (MN2) and a second MOSFET (MN3) through which the gate of the MOSFET switch (MN1) is pulled to ground (Vss). The gate of the first MOSFET (MN2) is coupled to the supply voltage (VDD) for maintaining the first MOSFET (MN2) in the open state. A control signal is applied to the gate of the second MOSFET (MN3) for selectively operating the open drain driver (7) in the conducting state for operating the MOSFET switch (MN1) in the non-conducting state. When the second MOSFET (MN3) is in the non-conducting state, the first MOSFET (MN2) remains in the conducting state until the voltage on a coupling node (9) between the first and second MOSFETs (MN2,MN3) equals the difference between its gate voltage and its threshold voltage, at which stage, any over-voltages applied to the gate of the MOSFET switch (MN1) are divided between the first and second MOSFETs (MN2,MN3). A coupling diode (D1) coupling the coupling node (9) to the supply voltage (VDD) clamps the voltage on the coupling node (9) at the supply voltage (VDD) plus the conducting voltage of the diode (D1), in the event of the voltage on the coupling node (9) rising after the first MOSFET (MN2) has gone into the non-conducting state. The coupling node (9) may be capacitively coupled to the supply voltage (VDD) by a coupling capacitor instead of or as well as the diode (D1) for limiting the voltage on the coupling node (9).

Hot-carrier induced drain leakage current in n-channel MOSFET

Abstract: Hot-carrier induced drain leakage current in n-channel MOSFET's has been found. Two leakage mechanisms exist at least. The leakage current for one mechanism can be characterized by it, exponential dependence on the drain voltage, approximate proportionality to the stress time, and very small (0.10eV) activation energy. The other mechanism can be characterized by its somewhat ohmic-like dependence on the drain voltage, approximate quadratic dependence on the stress time, and relatively large (0.29eV) activation energy. When stress is imposed by triode-mode operation, the former mechanism is dominant. For pentode-mode operation, the former is followed by the latter. The drain leakage current is observed for conventional, LDD and ALDD (Advanced LDD) structures, although they differ in magnitude. This hot-carrier induced drain leakage current may cause functional failure in DRAM cell or in resistor-load type SRAM cell, while the corresponding degradation in channel conductance may not.