Topic
Channel length modulation
About: Channel length modulation is a research topic. Over the lifetime, 1790 publications have been published within this topic receiving 34179 citations.
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TL;DR: In this article, the results of a systematic analytical characterization, supplemented by 2D device simulation, applied to novel device architecture: hetero-material double-gate (HEM-DG) MOSFET with effective channel length down to 30 nm.
Abstract: The paper presents the results of a systematic analytical characterization, supplemented by 2D device simulation, applied to novel device architecture: hetero-material double-gate (HEM-DG) MOSFET with effective channel length down to 30 nm. A new approach to explain the pertinent device physics is presented, which can facilitate device design and technology selection for enhanced performance. Numerical device simulation data, obtained using 2D device simulator: ATLAS, for threshold voltage, drain induced barrier lowering (DIBL) and subthreshold swing (S) were compared to the model to validate the analytical formulation. The comparison of symmetric DG (SDG) MOSFET and HEM-DG MOSFET configurations demonstrated superiority of HEM-DG MOSFET: ideal S and reduced DIBL. Comparison with simulated results reveals excellent quantitative agreement.
26 citations
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06 Sep 1990TL;DR: In this paper, an indium arsenide well monolayer is formed in an InGaAs channel region and functions to move a first quantized energy level E 0 closer to the bottom of the channel region quantum well thereby increasing electron concentration by increasing effective band offset potential.
Abstract: A heterojunction field effect transistor (HFET) having a source, drain, and channel, wherein the channel comprises a quantum well and at least one mono-atomic well or barrier layer is provided. The mono-atomic well or barrier layer has a different bandgap than the channel region and serves to modify electron wave function and conduction band energy in the channel region. Preferably, an indium arsenide well monolayer is formed in an InGaAs channel region and functions to move a first quantized energy level E 0 closer to the bottom of the channel region quantum well thereby increasing electron concentration by increasing effective band offset potential. Another embodiment uses an aluminum arsenide monolayer as a barrier monolayer in the InGaAs channel. By varying location of the monolayers, confinement of electrons in the channel can be improved.
26 citations
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TL;DR: In this article, the authors show that the vertical electric field should be at least 10 times higher than the lateral electric filed in order to suppress the short channel effects of transistors, and that the field effect mobility of long channel devices is about an order of magnitude larger than small channel devices (L from 0.3 to 2.5 μm).
Abstract: Organic thin film transistors with P3HT (poly-3-hexylthiophene) as active semiconducting layer, channel lengths from 0.3 to 20 μm, and gate oxide thicknesses from 15 to 170 nm have been successfully fabricated on Si substrates. The measurement results show that the channel length over oxide thickness ratio should be large enough (i.e., the vertical electric field should be at least 10 times higher than the lateral electric filed) in order to suppress the short channel effects of transistors. The field effect mobility of long channel devices (L ≥ 5 μm) is about an order of magnitude larger than small channel devices (L from 0.3 to 2.5 μm), which could be attributed to the more severe contact resistance effects between organic materials and metal contacts for devices with smaller dimensions.
26 citations
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TL;DR: In this paper, the effect of chiral vector, metal work function, channel length and High-K dielectric on threshold voltage of carbon nanotubes (CNTFET) was analyzed.
26 citations
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27 May 2009
TL;DR: In this article, the authors focus on the determination of the valid device domain for the use of the top of the barrier (ToB) model to simulate quantum transport in nanowire MOSFETs in the ballistic regime.
Abstract: This work focuses on the determination of the valid device domain for the use of the Top of the barrier (ToB) model to simulate quantum transport in nanowire MOSFETs in the ballistic regime. The presence of a proper Source/Drain barrier in the device is an important criterion for the applicability of the model. Long channel devices can be accurately modeled under low and high drain bias with DIBL adjustment. Keywords-component; nanowires; top of the barrier; MOSFET; ballistic transport model; DIBL; tunneling current; top-of-the- barrier; subthreshold- slope; Tight-Binding;Short channel effects .
26 citations