Chip

About: Chip is a research topic. Over the lifetime, 44555 publications have been published within this topic receiving 352381 citations.

Spread spectrum multiple access communication using satellite or terrestrial repeaters

Abstract: A multiple access, spread spectrum communication system and method for providing high capacity communications to, from, or between a plurality of system users, using code-division-spread-spectrum communication signals. The communication system uses means for providing marginal isolation between user communication signals. The marginal isolation is provided by generating simultaneous multiple steerable beams; using an omni-directional antenna with polarization enhancement; using power control devices to adjust the output power for user generated communication signals either in response to their input activity level, or in accordance with a minimum allowable power for maintaining a communication link. The communication system can also employ a means for transmitting a predetermined pilot chip sequence contiguous with the code-division-spread-spectrum communication signals. In further embodiments the communication system employs a plurality of user terminals linked to each other or to other services through one or more terrestrial or satellite repeaters. Multiple satellite repeaters are operable in a new communication mode to obtain further gains in signal isolation.

Mechanics of the Metal Cutting Process. I. Orthogonal Cutting and a Type 2 Chip

Abstract: An analysis of the chip geometry and the force system found in the case of orthogonal cutting accompanied by a type 2 chip has yielded a collection of useful equations which make possible the study of actual machining operations in terms of basic mechanical quantities. The shearing strain undergone by the metal during chip formation, and the velocities of shear and of chip flow are among the geometrical quantities which can be quantitatively determined. The force relationships permit calculation of such quantities as the various significant force components, stresses, the coefficient of friction between chip and cutting tool, and the work done in shearing the metal and in overcoming friction on the tool face. The experimental methods by which such analyses can be readily made are described. Observed and calculated values from typical tests are presented.

A Regular Layout for Parallel Adders

Abstract: With VLSI architecture, the chip area and design regularity represent a better measure of cost than the conventional gate count. We show that addition of n-bit binary numbers can be performed on a chip with a regular layout in time proportional to log n and with area proportional to n.

Code Combining--A Maximum-Likelihood Decoding Approach for Combining an Arbitrary Number of Noisy Packets

Abstract: It is well known that if the data rate is chosen below the available channel capacity, error-free communication is possible. Furthermore, numerous practical error-correction coding techniques exist which can be chosen to meet the user's reliability constraints. However, a basic problem in designing a reliable digital communication system is still the choice of the actual code rate. While the popular rate-1/2 code rate is a reasonable, but not optimum, choice for additive Gaussian noise channels, its selection is far from optimum for channels where a high percentage of the transmitted bits are destroyed by interference. Code combining represents a technique of matching the code rate to the prevailing channel conditions. Information is transmitted in packet formats which are encoded with a relatively high-rate code, e.g., rate 1/2, which can be repeated to Obtain reliable communications when the redundancy in a rate-1/2 code is not sufficient to overcome the channel interference. The receiver combines noisy packets (code combining) to obtain a packet with a code rate which is low enough such that reliable communication is possible even for channels with extremely high error rates. By combining the minimum number of packets needed to overcome the channel conditions, the receiver optimizes the code rate and minimizes the delay required to decode a given packet. Thus, the receiver adapts to the actual jammer-to-signal (J/S) ratio which is critical when the level of interference J is not known a priori.

Single-chip microprocessor that communicates directly using light

Abstract: An electronic–photonic microprocessor chip manufactured using a conventional microelectronics foundry process is demonstrated; the chip contains 70 million transistors and 850 photonic components and directly uses light to communicate to other chips. The rapid transfer of data between chips in computer systems and data centres has become one of the bottlenecks in modern information processing. One way of increasing speeds is to use optical connections rather than electrical wires and the past decade has seen significant efforts to develop silicon-based nanophotonic approaches to integrate such links within silicon chips, but incompatibility between the manufacturing processes used in electronics and photonics has proved a hindrance. Now Chen Sun et al. describe a 'system on a chip' microprocessor that successfully integrates electronics and photonics yet is produced using standard microelectronic chip fabrication techniques. The resulting microprocessor combines 70 million transistors and 850 photonic components and can communicate optically with the outside world. This result promises a way forward for new fast, low-power computing systems architectures. Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems—from mobile phones to large-scale data centres. These limitations can be overcome1,2,3 by using optical communications based on chip-scale electronic–photonic systems4,5,6,7 enabled by silicon-based nanophotonic devices8. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic–photonic chips9,10,11 are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic–photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a ‘zero-change’ approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics12, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors13,14,15,16. This demonstration could represent the beginning of an era of chip-scale electronic–photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.