Cipher

About: Cipher is a research topic. Over the lifetime, 9409 publications have been published within this topic receiving 110309 citations. The topic is also known as: cypher & cryptographic algorithm.

Encryption method and apparatus with forward secrecy and random-access key updating method

Abstract: An encryption method and apparatus that provides forward secrecy, by updating the key using a one-way function after each encryption. By providing forward secrecy within a cipher, rather than through a key management system, forward secrecy may be added to cryptographic systems and protocols by using the cipher within an existing framework. A random-access key updating method can efficiently generate one or more future keys in any order. Embodiments are applicable to forward secret ciphers that are used to protect protocols with unreliable transport, to ciphers that are used in multicast or other group settings, and to protection of packets using the IPSec protocols.

Efficient Fault Diagnosis Schemes for Reliable Lightweight Cryptographic ISO/IEC Standard CLEFIA Benchmarked on ASIC and FPGA

Abstract: Lightweight block ciphers are essential for providing low-cost confidentiality to sensitive constrained applications. Nonetheless, this confidentiality does not guarantee their reliability in the presence of natural and malicious faults. In this paper, fault diagnosis schemes for the lightweight internationally standardized block cipher CLEFIA are proposed. This symmetric-key cipher is compatible with yet lighter in hardware than the Advanced Encryption Standard and enables the implementation of cryptographic functionality with low complexity and power consumption. To the best of the authors' knowledge, there has been no fault diagnosis scheme presented in the literature for the CLEFIA to date. In addition to providing fault diagnosis approaches for the linear blocks in the encryption and the decryption of the CLEFIA, error detection approaches are presented for the nonlinear S-boxes, applicable to their composite-field implementations as well as their lookup table realizations. Through fault-injection simulations, the proposed schemes are benchmarked, and it is shown that they achieve error coverage of close to 100%. Finally, both application-specific integrated circuit and field-programmable gate array implementations of the proposed error detection structures are presented to assess their efficiency and overhead. The proposed fault diagnosis architectures make the implementations of the International Organization for Standardization/International Electrotechnical Commission-standardized CLEFIA more reliable.

A fully homomorphic crypto-processor design: correctness of a secret computer

Abstract: A KPU is a replacement for a standard CPU that natively runs encrypted machine code on encrypted data in registers and memory --- a 'crypto-processor unit', in other words Its computations are opaque to an observer with physical access to the processor but remain meaningful to the owner of the computation In theory, a KPU can be run in simulation and remain as secure (or otherwise) as in hardware Any block cipher with a block-size of about a word is compatible with this developing technology, the long-term aim of which is to make it safe to entrust data-oriented computation to a remote environment Hardware is arranged in a KPU to make the chosen cipher behave as a mathematical homomorphism with respect to computer arithmetic We describe the architecture formally here and show that 'type-safe' programs run correctly when encrypted

Ring oscillator as confusion – diffusion agent: a complete TRNG drove image security

Abstract: The utility of true random number generators (TRNGs) is not only restricted to session key generation, nonce generation, OTP generation etc. in cryptography. In the proposed work, two ring oscillator (RO) based TRNG structures adopting identical and non-identical ring of inverters have alone been employed for confusion (scrambling) and diffusion (intensity variation) processes for encrypting the greyscale and RGB images. Cyclone IVE EP4CE115F29C7 FPGA was utilised to generate a couple of random synthetic images using the two RO architectures which took a maximum of 520 combinational units and 543 logic registers. The suggested scheme of image encryption was tested on 100 test greyscale images of size 256 × 256. This non-chaos influenced image ciphering has resulted in an approximate average entropy of 7.99 and near-zero correlation figures for the greyscale & RGB cipher images. The attack resistance capability was checked by performing various occlusion and noise attacks on encrypted images.