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Showing papers on "Clock synchronization published in 2002"


Journal ArticleDOI
09 Dec 2002
TL;DR: Reference Broadcast Synchronization (RBS) as discussed by the authors is a scheme in which nodes send reference beacons to their neighbors using physical-layer broadcasts, and receivers use their arrival time as a point of reference for comparing their clocks.
Abstract: Recent advances in miniaturization and low-cost, low-power design have led to active research in large-scale networks of small, wireless, low-power sensors and actuators. Time synchronization is critical in sensor networks for diverse purposes including sensor data fusion, coordinated actuation, and power-efficient duty cycling. Though the clock accuracy and precision requirements are often stricter than in traditional distributed systems, strict energy constraints limit the resources available to meet these goals.We present Reference-Broadcast Synchronization, a scheme in which nodes send reference beacons to their neighbors using physical-layer broadcasts. A reference broadcast does not contain an explicit timestamp; instead, receivers use its arrival time as a point of reference for comparing their clocks. In this paper, we use measurements from two wireless implementations to show that removing the sender's nondeterminism from the critical path in this way produces high-precision clock agreement (1.85 ± 1.28μsec, using off-the-shelf 802.11 wireless Ethernet), while using minimal energy. We also describe a novel algorithm that uses this same broadcast property to federate clocks across broadcast domains with a slow decay in precision (3.68 ± 2.57μsec after 4 hops). RBS can be used without external references, forming a precise relative timescale, or can maintain microsecond-level synchronization to an external timescale such as UTC. We show a significant improvement over the Network Time Protocol (NTP) under similar conditions.

2,537 citations


Proceedings ArticleDOI
05 Dec 2002
TL;DR: This paper discusses the major features and design objectives of the IEEE-1588 standard, designed to serve the clock synchronization needs of industrial systems, and recent performance results of prototype implementations of this standard in an Ethernet environment are presented.
Abstract: This paper discusses the major features and design objectives of the IEEE-1588 standard. Recent performance results of prototype implementations of this standard in an Ethernet environment are presented. Potential areas of application of this standard are outlined.

1,112 citations


Proceedings ArticleDOI
02 Feb 2002
TL;DR: An alternative approach is described, which is called a multiple clock domain (MCD) processor, in which the chip is divided into several clock domains, within which independent voltage and frequency scaling can be performed.
Abstract: As clock frequency increases and feature size decreases, clock distribution and wire delays present a growing challenge to the designers of singly-clocked, globally synchronous systems. We describe an alternative approach, which we call a multiple clock domain (MCD) processor, in which the chip is divided into several clock domains, within which independent voltage and frequency scaling can be performed. Boundaries between domains are chosen to exploit existing queues, thereby minimizing inter-domain synchronization costs. We propose four clock domains, corresponding to the front end , integer units, floating point units, and load-store units. We evaluate this design using a simulation infrastructure based on SimpleScalar and Wattch. In an attempt to quantify potential energy savings independent of any particular on-line control strategy, we use off-line analysis of traces from a single-speed run of each of our benchmark applications to identify profitable reconfiguration points for a subsequent dynamic scaling run. Using applications from the MediaBench, Olden, and SPEC2000 benchmark suites, we obtain an average energy-delay product improvement of 20% with MCD compared to a modest 3% savings from voltage scaling a single clock and voltage system.

508 citations


Proceedings ArticleDOI
07 Nov 2002
TL;DR: This paper considers the design of power-saving protocols for mobile ad hoc networks (MANETs) that allow mobile hosts to switch to a low-power sleep mode and proposes three power management protocols, namely dominating-awake-interval, periodically-fully-aw Wake-Interval, and quorum-based protocols, which are directly applicable to IEEE 802.11-based MANETs.
Abstract: Power-saving is a critical issue for almost all kinds of portable devices. In this paper, we consider the design of power-saving protocols for mobile ad hoc networks (MANETs) that allow mobile hosts to switch to a low-power sleep mode. The MANETs being considered in this paper are characterized by unpredictable mobility, multi-hop communication, and no clock synchronization mechanism. In particular, the last characteristic would complicate the problem since a host has to predict when another host will wake up to receive packets. We propose three power management protocols, namely dominating-awake-interval, periodically-fully-awake-interval, and quorum-based protocols, which are directly applicable to IEEE 802.11-based MANETs. As far as we know, the power management problem for multi-hop MANETs has not been seriously addressed in the literature. Existing standards, such as IEEE 802.11, HIPERLAN, and Bluetooth, all assume that the network is fully connected or there is a clock synchronization mechanism. Extensive simulation results are presented to verify the effectiveness of the proposed protocols.

468 citations


Proceedings ArticleDOI
01 Jun 2002
TL;DR: This paper introduces a novel delay-based measurement scheme that does not require clock synchronization, making it more practical than other previous proposals, and develops a novel Markov Chain Monte Carlo procedure for rapid determination of the most likely topologies.
Abstract: Network tomography is a process for inferring "internal" link-level delay and loss performance information based on end-to-end (edge) network measurements. These methods require knowledge of the network topology; therefore a first crucial step in the tomography process is topology identification. This paper considers the problem of discovering network topology solely from host-based, unicast measurements, without internal network cooperation. First, we introduce a novel delay-based measurement scheme that does not require clock synchronization, making it more practical than other previous proposals. In contrast to methods that rely on network cooperation , our methodology has the potential to identify layer two elements (provided they are logical topology branching points and induce some measurable delay). Second, we propose a maximum penalized likelihood criterion for topology identification. This is a global optimality criterion, in contrast to other recent proposals for topology identification that employ suboptimal, pair-merging strategies. We develop a novel Markov Chain Monte Carlo (MCMC) procedure for rapid determination of the most likely topologies. The performance of our new probing scheme and identification algorithm is explored through simulation and Internet experiments.

205 citations


Patent
13 Aug 2002
TL;DR: In this article, a technique for synchronizing clocks in a network is disclosed, which consists of receiving a first timestamp and a second timestamp, each indicating a respective time instance as determined by a first clock signal within the network.
Abstract: A technique for synchronizing clocks in a network is disclosed. In one exemplary embodiment, the technique may be realized as a method for synchronizing clocks in a network. The method comprises receiving a first timestamp and a second timestamp, each indicating a respective time instance as determined by a first clock signal within the network. The method also comprises measuring a first time interval between the first timestamp and the second timestamp. The method further comprises generating a difference signal representing a difference between the first time interval and a second time interval, and generating a second clock signal based upon the difference signal such that the second clock signal is synchronized with the first clock signal.

192 citations


Proceedings ArticleDOI
09 Jun 2002
TL;DR: To alleviate the asynchronism problem, this paper proposes a simple modification to the current synchronization algorithm, and the modified algorithm is shown to work well for large ad hoc networks.
Abstract: The IEEE 802.11 standards support the peer-to-peer mode Independent Basic Service Set (IBSS), which is an ad hoc network with all its stations within each other's transmission range. In an IBSS, it is important that all stations are synchronized to a common clock. Synchronization is necessary for frequency hopping spread spectrum (FHSS) to ensure that all stations "hop" at the same time; it is also necessary for both FHSS and direct sequence spread spectrum (DSSS) to perform power management. This paper evaluates the synchronization mechanism, which is a distributed algorithm, specified in the IEEE 802.11 standards. By both analysis and simulation, it is shown that when the number of stations in an IBSS is not very small, there is a non-negligible probability that stations may get out of synchronization. The more stations, the higher probability of asynchronism. Thus, the current IEEE 802.11's synchronization mechanism does not scale; it cannot support a large-scale ad hoc network. To alleviate the asynchronism problem, this paper proposes a simple modification to the current synchronization algorithm. The modified algorithm is shown to work well for large ad hoc networks.

190 citations


Proceedings ArticleDOI
Li Zhang1, Zhen Liu1, C. Honghui Xia1
07 Nov 2002
TL;DR: This work proposes several algorithms to estimate and remove the relative clock skews from delay measurements based on the computation of convex hulls, and develops linear algorithms to identity the clock resets, and derive the best clock skew lines.
Abstract: Packet delay traces are important measurements for analyzing end-to-end performance and for designing traffic control algorithms in computer networks. Due to the fact that the clocks at the end systems are usually not synchronized and running at different speeds, these measurements can be quite inaccurate. We propose several algorithms to estimate and remove the relative clock skews from delay measurements based on the computation of convex hulls. Compared with existing techniques, such as linear regression and linear programming, the convex-hull approach provides better insight and allows us to handle more error metrics. We obtain algorithms which are linear in the number of measurement points for the case with no clock resets. For the more challenging case with clock resets, i.e., the clocks are reset to some reference times during the measurement period, we develop linear algorithms to identity the clock resets, and derive the best clock skew lines. We extend this analysis to environments in which at least one of the clocks is controlled by NTP (network time protocol). These algorithms can greatly improve the accuracy of the measurements, and can be used both online and offline. They can also be extended for active clock synchronization, to replace or further improve NTP. Numerical experiments are presented to demonstrate the robustness of the algorithms.

180 citations


Patent
06 Feb 2002
TL;DR: In this article, a slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate.
Abstract: Apparatus, system and method for synchronizing one or more clocks across a communication link. A slave clock may be synchronized to a master clock by means of a synchronization signal sent from the master to the slave clock side of the link. The synchronization signal may be an expected signal pattern sent at intervals expected by the slave side. The slave clock may correlate received signals with a representation of the expected synchronization signal to produce a correlation sample sequence at a first sample rate which is related as n times the slave clock rate. The synchronization signal receipt time indicated by the correlation sample sequence may be refined by interpolating the correlation sample sequence around a best correlation sample to locate a best interpolation at an interpolation resolution smaller than the sample resolution. The best interpolation may in turn be further refined by estimating between interpolator outputs adjacent to the best interpolation output. The synchronization signal receipt time thus determined is compared to the expected time based upon the slave clock, which is adjusted until the times match. After initialization, all slave clock errors are preferably accumulated to prevent long-term slip between the slave and master clocks. Formerly independent master and slave clocks synchronized across the communication link constitute a noncommon clock which may be compared on each side of the link to secondary independent clocks, and the secondary independent clocks may then be separately synchronized by adjusting one to have the same difference from its local noncommon clock as the secondary clock on the other side of the link has from its local noncommon clock.

163 citations


Patent
29 Mar 2002
TL;DR: In this paper, the authors propose a method and apparatus for synchronizing a local clock value in a wireless receiver receiving a data unit containing synchronization information, such that the sum of the calculated offset and the value of the free-running clock provides a clock value that is approximately synchronized in time.
Abstract: A method and apparatus for synchronizing a local clock value in a wireless receiver receiving a data unit containing synchronization information. The method includes receiving a first data unit containing synchronization information, extracting the synchronization information from the received first data unit, copying a local free-running clock at a known reference point in time relative to the time the first data unit was received to generate a local timestamp; and calculating an offset to the free-running clock using the extracted synchronization information and the local timestamp, the calculating in non real-time, such that the sum of the calculated offset and the value of the free-running clock provides a local clock value that is approximately synchronized in time. The apparatus implementing the method is part of a node of a wireless station, and provides a time synchronization function, typically at the MAC layer.

162 citations


Patent
24 Jul 2002
TL;DR: In this paper, an improved clock synchronization algorithm for a distributed system intended for real-time applications is presented, by performing at the same time an offset correction and a clock read correction at each node of the distributed system.
Abstract: The present invention provides an improved clock synchronization algorithm for a distributed system intended for real time applications by performing at the same time an off-set correction and a clock read correction at each node of the distributed system. Expensive oscillators can be avoided and synchronization can be established faster and with higher precision.

Patent
19 Apr 2002
TL;DR: In this paper, a method for synchronizing the playback of a digital audio broadcast on a plurality of network output devices using a microphone near a source, embedded control codes, and the audio patterns from the output devices is presented.
Abstract: A method is provided for synchronizing the playback of a digital audio broadcast on a plurality of network output devices using a microphone near a source, embedded control codes, and the audio patterns from the network output devices. An optional, additional manual adjustment method relies on a graphical user interface for adjustment and audible pulses from the devices which are to be synchronized. Synchronization of the audio is accomplished with clock synchronization of the network output devices. The digital audio broadcast from multiple receivers does not present to a listener any audible delay or echo effect.

Proceedings ArticleDOI
01 Jun 2002
TL;DR: It is argued that accurate rate, and not synchronised offset, is the key requirement of a clock for network measurement, and two calibration methods which do not require a reference clock at the calibration point are given.
Abstract: A highly accurate monitoring solution for active network measurement is provided without the need for GPS, based on an alternative software clock for PC's running Unix. With respect to clock rate, it's performance exceeds common GPS and NTP synchronized software clock accuracy. It is based on the TSC register counting CPU cycles and offers a resolution of around 1ns, a rate stability of 0.1PPM equal to that of the underlying hardware, and a processing overhead well under 1µs per timestamp. It is scalable and can be run in parallel with the usual clock. It is argued that accurate rate, and not synchronised offset, is the key requirement of a clock for network measurement. The clock requires an accurate estimation of the CPU cycle period. Two calibration methods which do not require a reference clock at the calibration point are given. To the TSC clock we add timestamping optimisations to create two high accuracy monitors, one based on Linux and the other on Real-Time Linux. The TSC-RT-Linux monitor has offset fluctuations of the order of 1µs. The clock is ideally suited for high precision active measurement.

Patent
07 Mar 2002
TL;DR: In this paper, a first packet including global time reference (606) derived from local clock is broadcast from a first network device to other devices and the clocks of the network devices are adjusted.
Abstract: Synchronization is maintained among a plurality of network devices (102,...) having local clocks. A first packet including global time reference (606) derived from local clock is broadcast from a first network device to other devices. The clocks of the network devices are adjusted. The difference between a free running clock and a first network global time reference is determined (610). A first network offset is calculated (612). Similarly, a second network offset is calculated to account for the difference between the free running clock and the second network global time reference.

Journal ArticleDOI
TL;DR: A general definition of synchronization is given, capturing features of both self-synchronized systems and systems synchronized by means of external control, exemplified by a number of special cases, including frequency or Hugenii synchronization.

Patent
30 Sep 2002
TL;DR: In this paper, a basic holdover loop for retaining the current reconstructed clock frequency signal receives weighted corrections from an open loop and a network time protocol filter loop, which then synchronizes the clock of the local telecommunications network.
Abstract: Techniques for synchronizing the clock of a local telecommunications network connected to a remote clock source through an asynchronous transport network such as an Ethernet metropolitan area transport network. A basic holdover loop for retaining the current reconstructed clock frequency signal receives weighted corrections from an open loop and a network time protocol filter loop. The open loop measures data packet interarrival times on the local network and calculates a first reconstructed clock frequency signal. The network time protocol loop applies network time protocol to generate timestamps over the asynchronous transport network which are used to generate a second reconstructed clock frequency signal. The first and second reconstructed clock frequency signals are combined using dynamically adjusted weight factors and compared with the current reconstructed clock frequency signal to correct the latter which then synchronizes the clock of the local telecommunications network.

Journal ArticleDOI
TL;DR: An accuracy gain over analogous protocols that employ classical resources is demonstrated and a quantum-cryptographic positioning applica- tion is given, which allows only trusted par- ties to learn the position of whatever must be localized.
Abstract: A method is proposed to employ entangled and squeezed light for determining the position of a party and for synchronizing distant clocks. An accuracy gain over analogous protocols that employ classical resources is demonstrated and a quantum-cryptographic positioning application is given, which allows only trusted parties to learn the position of whatever must be localized. The presence of a lossy channel and imperfect photodetection is considered. The advantages in using partially entangled states is discussed.

Patent
03 Apr 2002
TL;DR: In this paper, an apparatus and method of clock synchronization of a powerline modem network for a plurality of devices are provided, and a synchronization device may be provided to update device clocks on a power line network.
Abstract: An apparatus and method of clock synchronization of a powerline modem network for a plurality of devices are provided. A plurality of devices are provided having a powerline modem and a clock (100). The powerline modem permits communication between the plurality of devices over a powerline network. A synchronization message is provided over the powerline network (102). The synchronization message includes an instruction for reach of the plurality of devices to update their clock in accordance with a clock time provided in the synchronization message (104). A synchronization device may be provided to update device clocks on a powerline network.

Patent
07 Nov 2002
TL;DR: In this article, a clock synchronization method and apparatus is disclosed for use in a communication system including a plurality of wireless nodes communicatively coupled via a wireless network, each of the plurality of nodes having a local time base, and one of the nodes being designated as a master node having a master clock against which the local time bases are synchronized.
Abstract: A clock synchronization method and apparatus is disclosed for use in a communication system including a plurality of wireless nodes communicatively coupled via a wireless network, each of the plurality of wireless nodes having a local time base, and one of the plurality of wireless nodes being designated as a master node having a master time base which serves as a master clock against which the local time bases are synchronized. The clock synchronization method includes the steps of periodically transmitting synchronization frames to the plurality of non-master nodes so as to adjust the slave clocks associated with the respective non-master nodes. The synchronization frames are distributed from the master node at near-periodic intervals and includes a cycle time value that corresponds to the end of the previously transmitted synchronization frame. The slave clocks (i.e., non-master nodes) receiving the synchronization frame determine the cycle time value at the point of reception of the synchronization frame and adjusts their clocks by calculating a difference value between the received cycle time and a previously saved local cycle time value.

Patent
14 Feb 2002
TL;DR: In this article, a method and system of compensating for reference frequency drift utilizes time stamps from a networked reference clock to adjust a local crystal oscillator of a communications device.
Abstract: A method and system of compensating for reference frequency drift utilizes time stamps from a networked reference clock to adjust a local crystal oscillator of a communications device. In an example embodiment, a microprocessor arrangement of the communications device obtains a synchronization time stamp from a networked clock arrangement and synchronizes the local oscillator clock and a clock circuit of the microprocessor with the time stamp. After a predetermined time duration has transpired, a calibration time stamp is obtained from the network clock and the difference between the calibration time stamp and the current time of the clock circuit is extracted. The clock circuit and the networked clock arrangement are then synchronized and the local crystal oscillator is adjusted for crystal aging as a function of the difference between the calibration time stamp and the current time of the clock circuit.

Patent
20 Mar 2002
TL;DR: In this article, a hardware implementation of a clock drift evaluator is presented, which monitors received packets associated with a data stream, and extracts a time stamp generated by a source clock from each packet.
Abstract: A method of and apparatus for detecting drift between two clocks is presented. The apparatus comprises a hardware implementation of a clock drift evaluator. The evaluator monitors received packets associated with a data stream, and extracts a time stamp generated by a source clock from each packet. A difference d between the extracted time stamp and the local time is compared against a d_ref value to determine whether the packet was received early or late. On a prescribed schedule, the degree of late and early receipt of packets is compared against a tolerance level to determine whether a relative drift exists between the pacing of the source clock and the pacing of the local clock. The detection of drift between the two clocks provides support for service level guarantees in provisioning data streaming services in packet-switched environments.

Journal ArticleDOI
TL;DR: A distributed simulator for target CMPs is presented based on the Message Passing Interface (MPI), designed to run on a host cluster of workstations to narrow the parallelization design space concerning the performance impact of distributed vs. centralized target L2 simulation.
Abstract: Chip-multiprocessor (CMP) architectures present a challenge for efficient simulation, combining the requirements of a detailed microprocessor simulator with that of a tightly-coupled parallel system. In this paper, a distributed simulator for target CMPs is presented based on the Message Passing Interface (MPI) designed to run on a host cluster of workstations. Microbenchmark-based evaluation is used to narrow the parallelization design space concerning the performance impact of distributed vs. centralized target L2 simulation, blocking vs. non-blocking remote cache accesses, null-message vs. barrier techniques for clock synchronization, and network interconnect selection. The best combination is shown to yield speedups of up to 16 on a 9-node cluster of dual-CPU workstations, partially due to cache effects.

Patent
05 Jul 2002
TL;DR: In this article, the clock shift, clock drift and propagation delay values are calculated using a series of message exchanges and control algorithms between a selected reference node and a client node in a wireless network, then uses these values to synchronize the client node clock to the reference node clock.
Abstract: A system and method for establishing and maintaining node clock synchronization in a wireless network The system and method calculates the clock shift, clock drift and propagation delay values using a series of message exchanges and control algorithms between a selected reference node and a client node in a wireless network, then uses these values to synchronize the client node clock to the reference node clock

Patent
02 May 2002
TL;DR: A clock synchronization circuit composed of a digital DLL outputs a clock signal delayed by a variable delay line and an additional delay cell, mixes the two clock signals, and outputs an internal clock signal having a smaller delay than a delay time of a delay cell as mentioned in this paper.
Abstract: A clock synchronization circuit The clock synchronization circuit composed of a digital DLL outputs a clock signal delayed by a variable delay line and a clock signal delayed by an additional delay cell, mixes the two clock signals, and outputs an internal clock signal having a smaller delay than a delay time of a delay cell, thereby rapidly precisely synchronizing an external clock signal and the internal clock signal In addition, a driving unit and a control unit for adjusting a duty cycle are provided to set up a ratio of 50%, thereby improving operation performance

Patent
20 Mar 2002
TL;DR: In this paper, a system and method for synchronizing clocks related to telecommunications throughout a point-to-multipoint optical network utilizes downstream data timed using a high frequency transmission clock received from a central office CO (102) to distribute timing information of a central telecom-based clock (316) to remote terminals (ONU).
Abstract: A system and method for synchronizing clocks related to telecommunications throughout a point-to-multipoint optical network utilizes downstream data timed using a high frequency transmission clock received from a central office CO (102) to distribute timing information of a central telecom-based clock (316) to remote terminals (ONU). In an exemplary embodiment, the point-to-multipoint optical network system is an Ethernet-based passive optical network PON system that operates in accordance with a Gigabit Ethernet standard. The timing information of the central telecom-based clock (316) is extracted from the downstream data (220) at each remote terminal (ONU) by recovering the high frequency transmission clock (322) and then, deriving a reference clock, which is synchronized with the central telecom-based clock (316), from the recovered transmission clock. The reference clock is then used to generate one or more telecom-related clocks (318) that are needed by the remote terminal (ONU). The system and method allows telecom-related clocks throughout the system to be synchronized in an efficient and cost-effective manner.

Patent
07 May 2002
TL;DR: An autonomous vehicle collision/crossing warning system provides for simple, inexpensive and decentralized installation, operation and maintenance of a reliable vehicle collision and crossing warning system as discussed by the authors, which utilizes a single frequency TDM radio communication network with GPS clock synchronization, time slot arbitration and connectionless UDP protocol to broadcast messages among vehicles and components.
Abstract: An autonomous vehicle collision/crossing warning system provides for simple, inexpensive and decentralized installation, operation and maintenance of a reliable vehicle collision/crossing warning system. The autonomous warning system preferably utilizes a single frequency TDM radio communication network with GPS clock synchronization, time slot arbitration and connectionless UDP protocol to broadcast messages among vehicles and components in the warning system. Adaptive localized mapping of components of interest within the warning system eliminates the need for centralized databases or coordination and control systems and enables new vehicles and warning systems to be easily added to the system in a decentralized manner. Preferably, stationary warning systems are deployed as multiple self-powered units each equipped to receive broadcast messages and to communicate with the other units by a low power RF channel in a redundant Master-Slave configuration. The communication schemes are preferably arranged for low duty cycle operation to decrease power consumption.

Patent
07 May 2002
TL;DR: An autonomous vehicle collision/crossing warning system provides for simple, inexpensive and decentralized installation, operation and maintenance of a reliable vehicle collision and crossing warning system as mentioned in this paper, which utilizes a single frequency TDM radio communication network with GPS clock synchronization, time slot arbitration and connectionless UDP protocol to broadcast messages among vehicles and components.
Abstract: An autonomous vehicle collision/crossing warning system provides for simple, inexpensive and decentralized installation, operation and maintenance of a reliable vehicle collision/crossing warning system. The autonomous warning system preferably utilizes a single frequency TDM radio communication network with GPS clock synchronization, time slot arbitration and connectionless UDP protocol to broadcast messages among vehicles and components in the warning system. Adaptive localized mapping of components of interest within the warning system eliminates the need for centralized databases or coordination and control systems and enables new vehicles and warning systems to be easily added to the system in a decentralized manner. Preferably, stationary warning systems are deployed as multiple self-powered units each equipped to receive broadcast messages and to communicate with the other units by a low power RF channel in a redundant Master-Slave configuration. The communication schemes are preferably arranged for low duty cycle operation to decrease power consumption.

Patent
14 Nov 2002
TL;DR: In this article, the authors propose a method for time synchronization using dynamic thresholds, which includes calculating a latency (104) of the time synchronization message and estimating an adjustment (106) that may be made to the internal clock in response to the message.
Abstract: Methods and apparatus for time synchronization using dynamic thresholds. A method for synchronizing network elements includes receiving at a network element a time synchronization message (102) sent from a master clock element. The network element includes an internal clock to be synchronized with a master clock of the master clock element. The method includes calculating a latency (104) of the time synchronization message. The method includes estimating an adjustment (106) that may be made to the internal clock in response to the time synchronization message. The method includes determining whether the latency calculated is less than the adjustment estimated (108). The method includes adjusting the internal clock (110) when the latency calculated is less than the adjustment estimated.

Proceedings ArticleDOI
10 Dec 2002
TL;DR: The SPIDER is a general-purpose computational platform suitable for use in ultrareliable embedded control applications and the conceptual design of the ROBUS is presented in this paper including requirements, topology, protocols, and the block-level design.
Abstract: The Scalable Processor-Independent Design for Electromagnetic Resilience (SPIDER) is a new family of fault-tolerant architectures under development at NASA Langley Research Center (LaRC). The SPIDER is a general-purpose computational platform suitable for use in ultrareliable embedded control applications. The design scales from a small configuration supporting a single aircraft function to a large distributed configuration capable of supporting several functions simultaneously. SPIDER consists of a collection of simplex processing elements communicating via a Reliable Optical Bus (ROBUS). The ROBUS is an ultra-reliable, time-division multiple access broadcast bus with strictly enforced write access providing basic fault-tolerant services using formally verified fault-tolerance protocols including Interactive Consistency (Byzantine Agreement), Internal Clock Synchronization, and Distributed Diagnosis. The conceptual design of the ROBUS is presented in this paper including requirements, topology, protocols, and the block-level design. Verification activities, including the use of formal methods, are also discussed.

Patent
05 Dec 2002
TL;DR: In this paper, a time information message is received at an in-vehicle telematics unit, which monitors for a time-update trigger event and sends a message to a vehicle bus in response to the time update trigger event.
Abstract: The present invention is a system and method for providing local time to a mobile vehicle. A time information message is received at an in-vehicle telematics unit, which monitors for a time-update trigger event. A time-update message is sent from the telematics unit to a vehicle bus in response to the time-update trigger event. A computer usable medium with suitable computer program code is employed to provide local time to a mobile vehicle.