Showing papers on "Clock synchronization published in 2021"

Digital-Twin-Enabled Intelligent Distributed Clock Synchronization in Industrial IoT Systems

Abstract: Tight cooperation among distributively connected equipment and infrastructures of an Industrial-Internet-of-Things (IIoT) system hinges on low latency data exchange and accurate time synchronization within sophisticated networks. However, the temperature-induced clock drift in connected industry facilities constitutes a fundamental challenge for conventional synchronization techniques due to dynamic industrial environments. Furthermore, the variation of packet delivery latency in IIoT networks hinders the reliability of time information exchange, leading to deteriorated clock synchronization performance in terms of synchronization accuracy and network resource consumption. In this article, a digital-twin-enabled model-based scheme is proposed to achieve an intelligent clock synchronization for reducing resource consumption associated with distributed synchronization in fast-changing IIoT environments. By leveraging the digital-twin-enabled clock models at remote locations, required interactions among distributed IIoT facilities to achieve synchronization is dramatically reduced. The virtual clock modeling in advance of the clock calibrations helps to characterize each clock so that its behavior under dynamic operating environments is predictable, which is beneficial to avoiding excessive synchronization-related timestamp exchange. An edge-cloud collaborative architecture is also developed to enhance the overall system efficiency during the development of remote digital-twin models. Simulation results demonstrate that the proposed scheme can create an accurate virtual model remotely for each local clock according to the information gathered. Meanwhile, a significant enhancement on the clock accuracy is accomplished with dramatically reduced communication resource consumption in networks with different packet delay variations.

A survey on quantum positioning system

Abstract: The quantum positioning system (QPS) takes advantage of the entanglement property of the quantum system itself, and it is possible to breakthrough the limitation of the positioning accuracy due to ...

Target Localization and Clock Refinement in Distributed MIMO Radar Systems With Time Synchronization Errors

Abstract: Achieving accurate clock synchronization may not be feasible for distributed multiple-input multiple-output (MIMO) radar systems with non-ideal clocks of the sensors. In this paper, the problem of target localization and clock synchronization in distributed MIMO radar systems in presence of time synchronization errors is addressed by utilizing time delay measurements. Firstly, the necessity to consider time synchronization errors when locating a target is illustrated by analyzing the increase in Cramer-Rao lower bound (CRLB) of the target position due to the time synchronization error. Then, a self-synchronized localization framework based on the hybrid maximum likelihood and maximum a posteriori estimator is proposed to estimate the target position and time synchronization error sequentially. Specifically, a method based on the levenberg marquardt algorithm and an analytical solution are developed respectively to estimate the target position, and a combination strategy is recommended further based on the two methods to achieve a more accurate target position estimate. The time synchronization error is figured out then by utilizing the target position estimate. Meanwhile, the closed-form solution of estimating the target position and time synchronization error is analytically proved to be approximately unbiased and can attain the CRLB under weak noise conditions. It is demonstrated through numerical simulations that the combination strategy has better estimation performance than the two methods. Simultaneously, simulation results show that the proposed self-synchronized localization method outperforms the state-of-the-art algorithms in the target position and time synchronization error estimation accuracy.

Timestamp-Free Clock Parameters Tracking Using Extended Kalman Filtering in Wireless Sensor Networks

Abstract: Clock synchronization is crucial for applications in wireless sensor networks, such as event scheduling and data fusion. In practical wireless networks, environmental changes cause the oscillator to be imperfect. Thus, it is necessary to track the nonlinear varying clock dynamically. In this paper, we propose a timestamp-free clock skew (frequency difference) and offset (time difference) joint tracking algorithm based on extended Kalman filter (EKF), which can be embedded into the general network data flow to achieve long-term synchronization without additional communication overhead. To further improve energy efficiency of clock synchronization, this paper develops an EKF clock skew tracking algorithm for silent nodes in receiver-only synchronization. For the situation that silent node overhears synchronization information from multiple active nodes, we present multi-information timestamp-free synchronization and multi-observation clock skew fusion scheme for silent nodes. Simulation results show the effectiveness of the proposed tracking algorithms.

FRLLE: a failure rate and load-based leader election algorithm for a bidirectional ring in distributed systems

Abstract: In a distributed system, multiple nodes work together to build a highly available, reliable, resource shareable, and fault-tolerant system to achieve a common goal. Here, multiple nodes work together to complete a task, so coordination is essential among these nodes. Electing a node as a system leader from among all the nodes can be a possible solution to do the coordination. Besides coordination, the leader also controls various activities like task allocation, result aggregation, efficient resource sharing, clock synchronization, and communication among the nodes of the system. In this work, we address the leader election problem through a new leader election algorithm called Failure Rate and Load-based Leader Election (FRLLE) algorithm for bidirectional ring networks. The proposed algorithm elects a node with a minimum failure rate and load as well so that the system gets a more reliable leader that can concentrate on leadership roles and activity comfortably. Like a proper leader election algorithm, this algorithm satisfies safety, liveness, and termination conditions that help to build an efficient and consistent distributed system. This algorithm reduces the message and time complexity, which means the algorithm takes fewer time steps to elect a leader by exchanging fewer messages. We compare the simulation results of the FRLLE algorithm with the well-known existing leader election algorithms and demonstrate that the FRLLE algorithm exchanges fewer messages and takes fewer time steps to elect the leader. We further carried out a priori complexity analysis and compared the outcome with the results of the simulation to corroborate our proposal.

Clock Synchronization for Mobile Molecular Communication Systems

Abstract: Molecular communication (MC) is a promising paradigm, which conveys messages at the nano- or micro- scale for information exchange by using molecules or particles as signal carriers. Clock synchronization between transmitters and receivers in MC systems plays an important role in information exchange and nanodevices’ collaboration. The current research about the synchronization mainly focuses on fixed MC systems. However, the movements of transmitters and receivers commonly exist in MC systems. In this paper, two clock synchronization schemes, the least square method and the peak time method, are proposed to estimate the clock offset between a mobile transmitter and a mobile receiver in mobile MC systems. The synthesis time of information molecules is also taken into consideration in the proposed schemes, and by using different types of molecules, the influence of the synthesis time of molecules can be solved. The effects of the movement of receiver on the received signal are discussed. The performance of the proposed schemes is evaluated by simulations and discussed.

Resonant Clock Synchronization With Active Silicon Interposer for Multi-Die Systems

Abstract: This paper presents the integration of resonant clocking to multi-die architectures to synchronize individual chiplets connected through an active silicon interposer. The proposed inter-chiplet synchronization through the active silicon interposer rotary oscillator array (ASI-ROA) provides a unitary clock domain to the multiple die (i.e. multiple chiplets) in the package with a very low design overhead. System performance analysis is performed with parasitics-extracted, post-layout simulation models of two different sizes of representative heterogeneous multi-die architectures, each with varying number of RISC-V cores per die. Each RISC-V core of the multi-die package belongs to the unitary clock domain, designed with ASI-ROA to operate at a frequency of 2 GHz. The proposed architecture is investigated for robustness in frequency and skew across the multi-die system (MDS) with SPICE based simulations of post layout models, demonstrating variations of only 80 MHz for a 2 GHz target frequency. The power savings are upto 41% for the overall MDS, compared to an equivalent implementation with a contemporary ADPLL used to synchronize the multiple chiplets over the active interposer. The average clock skew of the completely resonant architecture presented in this work is 8.2 ps.

Desynchronization resistant privacy preserving user authentication protocol for location based services

Abstract: Preserving user privacy and authenticity are essential requirements for location based services in order to protect user’s confidential information from public exposure and provide secure access to various services. Recently, numerous approaches towards these challenges have been proposed. Many of these are based on dynamic update of fixed parameters (such as pseudonym, transaction sequence number, shared key, counter, etc.) along with symmetric/asymmetric key cryptography, and seems promising in dealing with various security related issues such as unlinkability, forward/backward secrecy, replay attack and stolen verifier attack. However, the concept of dynamic update may affect the system performance in case of desynchronization attack as it requires to perform additional computations or user reregistration in order to resynchronize the peers. In this article, we address the problem of desynchronization attack and propose a privacy preserving user authentication protocol for location based services. The proposed protocol is based on elliptic curve cryptography and introduces dynamic randomized counters in order to synchronize the peers. Also, there is no need to resynchronize the peers in case of desynchronization attack. Additionally, there is no timestamp used in construction of the protocol to avoid clock synchronization problem. The security properties of the protocol are validated both formally and informally. Moreover, the safety of the protocol is assured using AVISPA tool based automated simulation. Finally, a performance comparison has been made against some recently proposed approaches to ensure the effectiveness of our protocol in real life implementations.

Recent Advances in Precision Clock Synchronization Protocols for Power Grid Control Systems

Abstract: With the advent of a new Precision Time Protocol specification, new opportunities abound for clock synchronization possibilities within power grid control systems. The third iteration of the Institute of Electrical and Electronics Engineers Standard 1588 specification provides several new features specifically aimed at complex, wide-area deployments in which situational awareness and control require precise time agreement. This paper describes the challenges faced by existing technology, introduces the new time distribution specification, and provides examples to explain how it represents a game-changing innovation.

Feasibility Study of UAV-Assisted Anti-Jamming Positioning

Abstract: As the cost and technical difficulty of jamming devices continue to decrease, jamming has become one of the major threats to positioning service. Unfortunately, most conventional wireless positioning technologies are vulnerable to jamming attacks due to inherent shortcomings like weak signal strength and unfavorable anchor geometry. Thanks to their high operational flexibility, unmanned aerial vehicles (UAVs) could be a promising solution to the above challenges. Therefore, in this article, we propose a UAV-assisted anti-jamming positioning system, in which multiple UAVs first utilize time-difference-of-arrival (TDoA) measurements from ground reference stations and double-response two-way ranging (DR-TWR) measurements from UAV-to-UAV links to perform self-localization as well as clock synchronization, and then act as anchor nodes to provide TDoA positioning service for ground users in the presence of jamming. To evaluate the feasibility and performance of the proposed system, we first derive the Cramer-Rao lower bound (CRLB) of UAV self-localization. Then, the impacts of UAV position uncertainty and synchronization errors caused by jamming on positioning service are modeled, and the theoretical root-mean-square error (RMSE) of user position estimate is further derived. Numerical results demonstrate that the proposed system is a promising alternative to existing positioning systems when their services are disrupted by jamming. The most notable advantage of the proposed system is that it is fully compatible with existing user equipment terminals and positioning methods.

Passive Network Synchronization Based on Concurrent Observations in Industrial IoT Systems

Abstract: Accurate network synchronization is crucial to orchestrate distributed infrastructures in Industrial Internet of Things (IIoT) systems for accomplishing network-wide tight temporal collaboration. Traditional clock synchronization can be achieved with extensive exchanges of explicit timestamps for estimating clock offsets, which becomes impractical due to high overhead with the expansion of the network scale. The performance of conventional synchronization will also be dramatically deteriorated due to various uncertainties of IIoT networks. In this article, we propose a passive network synchronization scheme based on concurrent passive observations to calibrate the distributed clocks in IIoT systems while significantly reducing the explicit interactions and network resource consumption during synchronization. By processing the physical phenomena observed concurrently by a group of selected IIoT devices, the local clock offsets of the passive observing devices can be efficiently estimated according to the common time reference linked to the event observed. Multiple relay nodes are further coordinated by the cloud center to disseminate the reference time information throughout the IIoT system. Simulation results demonstrate that by utilizing a series of concurrent observations with efficient coordination, the proposed scheme can achieve accurate and reliable network synchronization for large-scale IIoT systems with significantly reduced network overhead.

A Clock Distribution and Synchronization Scheme Over Optical Links for Large-Scale Physics Experiments

Abstract: In large-scale physics experiments, there is a trend to implement clock distribution and synchronization over multi-Gigabit serial links on optical networks The accuracy of clock synchronization in such a fashion is mainly determined by two aspects: one is the stability of the clock distribution over the links, and the other is the employed mechanism of clock synchronization To achieve a high synchronization accuracy in a range of tens of picoseconds, this article proposes a new optical fiber link and synchronization scheme based on optical circulators and serial transceivers embedded in field-programmable gate arrays (FPGAs) Benefiting from the single wavelength fiber connection, high-precision time-to-digital converters (TDCs) and phase interpolator (PI) sub-block in state-of-the-art Serializer–Deserializer (SerDes) transceivers on FPGAs, the offset of distributed clocks can be measured on-line and precisely compensated The time synchronization performance is evaluated on a prototype system with three levels of structure Through multiple power or reset cycles and long-term operation tests, the clock synchronization accuracy over a 5-km fiber connection is measured to be lower than 15 ps, and the recovered clocks at nodes at different levels have independent jitter, all lower than 42 ps In addition, the achieved high performance is also proved to be insensitive to operating temperature and the connection distance

Reset Control for Consensus of Multiagent Systems With Asynchronous Sampling

Abstract: This article investigates the consensus problem of multiagent systems (MASs) with the reset control approach. Reset control has been shown to possess great potential to improve transient system performance, but reset-induced state jump dynamics bring difficulties for consensus analysis, especially under the network environment. In this article, a novel reset element is developed, and time regularization is utilized to exclude Zeno behavior. The case with continuous communication is first considered, a distributed proportional integral + reset consensus protocol is proposed, which consists of the proportional-integral controller and the reset mechanism. The results are further generalized to the case with asynchronous sampling, which relaxes the requirement for continuous communication and clock synchronization. A hybrid model of the MAS is constructed to describe the system dynamics, and a hybrid systems approach is proposed to handle the reset- and sampling-induced jump dynamics in a unified framework. Moreover, a novel Lyapunov function is proposed and LMI-based stability conditions are given. Finally, an example is provided to show the effectiveness of the proposed methods.

Energy-Efficient GPS Synchronization for Wireless Nodes

Abstract: Synchronization is a challenging problem for wireless nodes, especially for applications demanding good synchronization accuracy over wide areas. In that case, the GPS is a valuable solution as the nodes can independently synchronize to UTC. However, the energy consumption of a GPS receiver (over 100 mW when switched on) is not sustainable on a wireless node. Therefore, in this work, we developed a synchronization scheme based on periodic extinctions of the GPS receiver. The goal is to study the GPS power switching effect on the synchronization accuracy. To do so, a node with dedicated timestamping hardware was designed. Two clock models were compared to predict the node time when the GPS is off and the impact of a Kalman filter, to remove the GPS noise, was evaluated. From experimental data, we show that the choice of the clock model depends on the accuracy needed and that the Kalman filter improves the estimation of the clock frequency for both models. In our design, the GPS can be off from 60% up to 95% of the time for mean synchronization errors of 20 ns to 420 ns, respectively. This work demonstrates that GPS power switching is an efficient solution to reduce energy costs while maintaining a high synchronization accuracy.

Predicate Monitoring in Distributed Cyber-Physical Systems

Abstract: This paper solves the problem of detecting violations of predicates over distributed continuous-time and continuous-valued signals in cyber-physical systems (CPS). We assume a partially synchronous setting, where a clock synchronization algorithm guarantees a bound on clock drifts among all signals. We introduce a novel retiming method that allows reasoning about the correctness of predicates among continuous-time signals that do not share a global view of time. The resulting problem is encoded as an SMT problem and we introduce techniques to solve the SMT encoding efficiently. Leveraging simple knowledge of physical dynamics allows further runtime reductions. We fully implement our approach on two distributed CPS applications: monitoring of a network of autonomous ground vehicles, and a network of aerial vehicles. The results show that in some cases, it is even possible to monitor a distributed CPS sufficiently fast for online deployment on fleets of autonomous vehicles.

A Secure Clock Synchronization Scheme for Wireless Sensor Networks Against Malicious Attacks

Abstract: This paper studies the secure and accurate clock synchronization problem for sensor networks with time-varying delays and malicious attacks A novel clock synchronization scheme based on the attack detection mechanism, attack compensation, and maximum consensus protocol is proposed The proposed scheme starts with the detection of the malicious attacks and the clock data under attacks is eliminated On the basis, software clock parameters are updated so that all the nodes in the network can have the same software skew and offset, so the clock synchronization can be achieved Furthermore, it is theoretically proved that the proposed scheme can achieve the attack detection correctly, and further can guarantee a secure and accurate clock synchronization In addition, extensive simulations are also conducted to validate the effectiveness of the proposed scheme

Carrier Phase based Synchronization and High-accuracy Positioning in 5G New Radio Cellular Networks

Abstract: Inspired by excellent precision of carrier phase positioning, this paper presents a new carrier phase positioning technique for 5G new radio cellular networks with a focus on clock synchronization and integer ambiguity resolution. A carrier-phase based clock offset estimation method is first proposed to achieve precise clock synchronization among base stations, and proved to achieve the Cramer–Rao Lower Bound (CRLB) asymptotically. A fusion method is developed to fuse the estimated positions of a mobile station (MS) based on time-difference-of-arrival, with the estimated position changes based on the temporal changes of carrier phase measurements. While circumventing the integer ambiguities of the carrier phase measurements, the fusion method provides quality interim estimates of the MS positions, at which the measurements can be linearized to resolve the integer ambiguities. As a result, precise MS positions can be obtained based on the disambiguated carrier phase measurements. Numerical simulations show that the proposed carrier phase positioning can achieve a centimeter-level accuracy in wireless cellular networks.

An Experimental Study of TSN-NonTSN Coexistence

Abstract: Time sensitive networking (TSN) has a promising future in the Industrial Automation and Industrial Internet of Things, with advantages such as interoperability, coexistence of different types of data, data stream scheduling mechanisms, network configuration and management tools. The core technology of TSN includes precise clock synchronization, network bandwidth reservation, and traffic shaping, which ensures high reliability, low latency and other industrial needs. A key feature of TSN is the traffic scheduling mechanism, which can accommodate hard real time streams of critical data with bounded end to end delays. In this work we have setup a heterogeneous TSN test bed with five TSN-enabled devices from different vendors. This study summarizes the devices and tools used in the setup. We have prioritized testing the time-aware shaping feature of TSN as compared to time synchronization. While performing the time aware shaping feature testing we have come across the tools that support configuration of devices individually or as a group. This paper shares the hand-on experience on the TSN feature support from specific devices, their participation in a simple TSN system, their performance and the tools supported for the configuration. The results are articulated, and it is an ongoing work targeting future additions of application layer protocols and scale it up to understand what it takes for engineering a TSN enabled large scale system.

Design an optimal digital phase lock loop with current-starved ring VCO using CMOS technology

Abstract: This paper describes the design of an optimal and low power Digital Phase Lock Loop (DPLL). It consumes the 485 mV power using 45 nm CMOS technology on CADENCE Virtuoso software. DPLL used for fast speed, less noise or jitter and large bandwidth with very fast acquisition time in wireless or wire line communication for modulator or demodulator. Clock recover, clock synchronization are the important factor in which PLL used. In digital system and microprocessor the DPLL uses for the clock generation and frequency synthesizer. DPLL consist the phase detector, low pass filter and VCO. The VCO produced oscillations at 8.5 Ghz. The average power dissipation or power consumption of DPLL is 485mV at an input voltage of 2 V. The results show that of the proposed DPLL design used for less power consumption, high speed operations applications.

Distributed multi-munition cooperative guidance based on clock synchronization for switching and noisy networks

Abstract: This paper proposes a novel three-dimensional guidance method based on clock synchronization algorithms, creatively solving the problems of randomized change, non-connection and even communication outage caused by packet loss and delay in the co-guidance of loitering munitions. The proposed method is characterized by fast convergence of the aspect angle rate in the longitudinal plane, and the attack time constrains in the lateral plane. Normal accelerations on the two sub-planes are thereby calculated, so as to control the munitions’ co-attack. Simulation experiments show that the proposed method can ensure reliable and stable asymptotic agreement of attack time expectation for the cooperative multiple munitions under the switching and noisy networks.

Clock Synchronization Algorithms Over PTP-Unaware Networks: Reproducible Comparison Using an FPGA Testbed

Abstract: This work explores clock synchronization algorithms used to process timestamps from the IEEE 1588 precision time protocol (PTP). It focuses on the PTP-unaware network scenario, where the network nodes do not actively contribute to PTP’s operation. This scenario typically imposes a harsh environment for accurate clock distribution, primarily due to the packet delay variation experienced by PTP packets. In this context, it is essential to process the noisy PTP measurements using algorithms and strategies that consider the underlying clock and packet delay models. This work surveys some attractive algorithms and introduces an open-source analysis library that combines several of them for better performance. It also provides an unprecedented comparison of the algorithms based on datasets acquired from a sophisticated testbed composed of field-programmable gate arrays (FPGAs). The investigation provides insights regarding the synchronization performance under various scenarios of background traffic and oscillator stability.

The 5G Transparent Clock: Synchronization Errors in Integrated 5G-TSN Industrial Networks

Abstract: Deterministic communication across integrated wired and wireless networks is currently one of the big topics in research and standardization. 5G and TSN integration efforts are at the forefront of enabling the convergence of wired and wireless networks for Industry 4.0.In this paper, we investigate how synchronization and syntonization errors affect the achievable end-to-end time synchronization accuracy in integrated 5G and TSN networks. We specifically focus on the impact of the 5G System modeling a TSN transparent clock according to 3GPP Release 17.

Aerial Vehicles Tracking Using Noncoherent Crowdsourced Wireless Networks

Abstract: Air traffic management (ATM) of manned and unmanned aerial vehicles (AVs) relies critically on ubiquitous location tracking. While technologies exist for AVs to broadcast their location periodically and for airports to track and detect AVs, methods to verify the broadcast locations and complement the ATM coverage are urgently needed, addressing anti-spoofing and safe coexistence concerns. In this work, we propose an ATM solution by exploiting noncoherent crowdsourced wireless networks (CWNs) and correcting the inherent clock-synchronization problems present in such non-coordinated sensor networks. While CWNs can provide a great number of measurements for ubiquitous ATM, these are normally obtained from unsynchronized sensors. This article first presents an analysis of the effects of lack of clock synchronization in ATM with CWN and provides solutions based on the presence of few trustworthy sensors in a large non-coordinated network. Secondly, autoregressive-based and long short-term memory (LSTM)-based approaches are investigated to achieve the time synchronization needed for localization of the AVs. Finally, a combination of a multilateration (MLAT) method and a Kalman filter is employed to provide an anti-spoofing tracking solution for AVs. We demonstrate the performance advantages of our framework through a dataset collected by a real-world CWN. Our results show that the proposed framework achieves localization accuracy comparable to that acquired using only GPS-synchronized sensors and outperforms the localization accuracy obtained based on state-of-the-art CWN synchronization methods.

High-Accuracy Attitude Determination Using Single-Difference Observables Based on Multi-Antenna GNSS Receiver with a Common Clock

Abstract: A global navigation satellite system (GNSS) receiver with multi-antenna using clock synchronization technology is a powerful piece of equipment for precise attitude determination and reducing costs. The single-difference (SD) can eliminate both the satellites and receiver clock errors with the common clock between antennas, which benefits the GNSS short-baseline attitude determination due to its lower noise, higher redundancy and stronger function model strength. However, the existence of uncalibrated phase delay (UPD) makes it difficult to obtain fixed SD attitude solutions. Therefore, the key problem for the fixed SD attitude solutions is to separate the SD UPD and fix the SD ambiguities into integers between antennas. This article introduces the one-step ambiguity substitution approach to separate the SD UPD, through which we merge the SD UPD parameter with the SD ambiguity of the reference satellite ambiguity as the new SD UPD parameter. Reconstructing the other SD ambiguities, the rank deficiency can be remedied by nature, and the new SD ambiguities can have a natural integer feature. Finally, the fixed SD baseline and attitude solutions are obtained by combining the ambiguity substitution approach with integer ambiguity resolution (IAR). To verify the effect of the ambiguity substitution approach and the advantages of the SD observables with a common clock in practical applications, we conducted static, kinematic, and vehicle experiments. In static experiments, the root mean squared errors (RMSEs) of the yaw and pitch angles obtained by the SD observables with a common clock were improved by approximately 80% and 93%, respectively, compared to double-difference (DD) observables with a common clock in multi-day attitude solutions. The kinematic results show that the dispersion of the SD-Fix in the pitch angle is two times less that of the DD-Fix, and the standard deviations (STDs) of the pitch angle for SD-Fix can reach 0.02°. Based on the feasibility, five bridges with low pitch angles in the vehicle experiment environment, which the DD observables cannot detect, were detected by the SD observables with a common clock. The attitude angles obtained by the SD observables were also consistent with the fiber optic gyroscope (FOG) inertial navigation system (INS). This research on the SD observables with a common clock provides higher accuracy.

LTDA-MAC v2.0: Topology-Aware Unsynchronized Scheduling in Linear Multi-Hop UWA Networks

Abstract: This paper investigates the use of underwater acoustic sensor networks (UASNs) for subsea asset monitoring. In particular, we focus on the use cases involving the deployment of networks with line topologies, e.g., for monitoring oil and gas pipelines. The Linear Transmit Delay Allocation MAC (LTDA-MAC) protocol facilitates efficient packet scheduling in linear UASNs without clock synchronization at the sensor nodes. It is based on the real-time optimization of a packet schedule for a given network deployment. In this paper, we present a novel greedy algorithm for real-time optimization of LTDA-MAC schedules. It produces collision-free schedules with significantly shorter frame duration, and is 2–3 orders of magnitude more computationally efficient than our previously proposed solution. Simulations of a subsea pipeline monitoring scenario show that, despite no clock synchronization, LTDA-MAC equipped with the proposed schedule optimization algorithm significantly outperforms Spatial TDMA.

Lea-TN: leader election algorithm considering node and link failures in a torus network

Abstract: Torus network topology offers many advantages such as higher speed, lower latency, better fairness, and lower energy consumption. For these kinds of benefits, nowadays, it is used to construct many parallel and distributed systems like IBM Blue Gene, IBM Sequoia, Mira, and Sugon TC8600. In parallel and distributed computing, multiple nodes act together to carry out large tasks fast. Hence, coordination is indispensable among these nodes to complete such tasks. A possible coordination method could be to elect a leader among the nodes. Along with coordination, the elected leader node also manages other activities such as task allocation, result aggregation, clock synchronization, proficient resource sharing management, and communication among the system’s nodes. In this paper, we propose a lower bound $$\varOmega (N\log _3 N)$$ of message complexity on a comparison-based leader election for a 2D torus network (where N is the number of nodes in the network). Next, we sketch a new leader election algorithm (Lea-TN) considering both the node and link failures for a 2D torus network. This Lea-TN is a deterministic and robust algorithm that elects a leader for a synchronous distributed system. The algorithm chooses a leader, even when there are some link or node failures in the system. We consider the number of non-faulty links and the subsisting nodes’ failure rate to elect a reliable leader. We introduce new patterns for sending messages that help reduce the number of exchanged messages and the execution time of the election process. The proposed algorithm (Lea-TN) enables a node to identify its link failures during the election also. Further, we simulate the Lea-TN algorithm and compare its performance with that of the well-known existing algorithms.