Showing papers on "Comparator applications published in 1973"

Charge control means for motive power battery charger

Abstract: A battery charger is equipped with a current adjusting device. A current sensor continuously measures the current output from the charger and feeds the readings to a current comparator. The terminal voltage of the battery is also continuously read and the readings are fed to a voltage comparator. A voltage reference feeds a constant reference voltage to the voltage comparator. The voltage comparator compares the battery voltage with the reference voltage and feeds a signal dependent upon the voltage difference and in accordance with a preselected program to a current reference. The current reference delivers a signal dependent on the output of the voltage comparator and in accordance with a preselected program to the current comparator. The current comparator to the the signal received from the current sensor tothe signal received from the current reference and provides an output signal to cause the current adjusting device to adjust the charging current to the values called for by the preselected program. A typical charge program which can be selected is a first charging mode at the initial charge rate of the battery until the battery voltage rises to a preselected value slightly below the gassing voltage. This is followed by a second charging mode wherein the charging current is gradually diminished so as to hold the voltage constant at the preselected value. When the charging current drops down to the finishing rate of the battery, a third mode commences wherein the current is held at the finishing rate regardless of further increase of the battery voltage. The charge can be terminated by a timing device set for total charge time or alternately for a predetermined charge period at the finishing rate.

Microwave phase shifting apparatus

Abstract: Apparatus for phase shifting between radiating elements of an antenna array by utilizing the inherent phase difference existing between frequency locked oscillators. Power from a master oscillator is injected into a plurality of slave oscillators, each of which feeds a different radiating element. The slave output is also fed through a directional coupler into a phase comparator which receives a comparison output signal from the master oscillator. The comparator output and a DC phase reference voltage are applied to a differential amplifier whose output forces the free-running frequency of the slave oscillator to change until the comparator output equals phase reference voltage.

Zero crossover detector circuit

Abstract: First and second amplifiers amplify and invert the alternating current input signal. The output signal of one of the amplifiers is re-inverted by an inverter circuit which produces an output signal in phase with the input signal. The output signals of the other amplifier and the inverter are compared with respective direct current reference signals by respective comparator circuits which produce respective output signals of the same polarity when the magnitude of the amplifier and inverter output signals are greater than the corresponding reference signals. A flip-flop circuit is responsive to the output signal of one of the comparator circuits for producing an output signal of a selected polarity and to the output signal of the other comparator circuit for producing an output signal of another polarity. The flip-flop circuit and the inverter output signals are compared by another comparator circuit which produces an output signal when the input signal crosses zero from a negative to a positive polarity.

Presettable single-input voltage-time integrator

Abstract: A timing circuit capable of operation from a single-input waveform, comprising an integrator circuit which includes: (1) a series resistor-capacitor (R-C) combination, one end of the resistor of the R-C combination comprising the input to the timing, and integrator, circuit; (2) an operational amplifier connected across the capacitor of the R-C combination, the amplifier serving to integrate the single-input waveform; and (3) a metal-oxide, semiconductor, field-effect transistor (MOSFET), serving as a switch, connected across the operational amplifier, the source of the MOSFET switch being connected to the input of the operational amplifier, at the junction of the R-C combination, the drain of the MOSFET switch being connected to the output of the operational amplifier. The timing circuit further comprises a comparator circuit which includes (1) a voltage comparator, which compares the two voltages at its inputs, and can detect when the difference between its two inputs equals zero, the output of the comparator being connected to the gate of the MOSFET; (2) an isolation resistor connected between the output of the operational amplifier and one of the inputs of the voltage comparator; (3) a zener diode connected across the two inputs of the voltage comparator; and (4) a compensation resistor having one end connected to the other input of the voltage comparator, the other end of the resistor being grounded. The result being that, when the output of the amplifier reaches zero, the signal at the output lead of the comparator, and therefore at the gate of the MOSFET, causes the MOSFET to conduct, clamping the output of the operational amplifier at a zero voltage level, thus providing initialization of the timing cycle.

Comparator-keyed oscillator

Abstract: A dead-zone comparator includes first and second voltage comparators used respectively to compare an input signal to a high reference level and to a low reference level, which reference levels can be programmed. A bistable memory element is set by the output signal of one comparator and reset by the output signal of the other. These SET and RESET signals are opposite polarity currents, one of which is more severely constrained in value than the other, and are applied via a common SET-RESET buss to the memory element. When the memory element is in its SET condition, a relaxation oscillator is permitted to deliver output pulses of sufficient magnitude to trigger SCR''s or triacs directly. When the memory element is in its RESET condition, the relaxation oscillator is prevented from furnishing any output pulses.

Variable threshold flash encoder analog-to-digital converter

Abstract: An analog-to-digital converter for providing a binary word of n bits representative of an analog voltage input has n comparator circuits. Each comparator circuit has an input terminal for receiving the analog signal to be converted and each has a threshold terminal. When the analog input signal exceeds the voltage threshold on any of the threshold terminals, the associated comparator circuit provides an output.

Reference signal generator, particularly for the control of a direct-current motor

Abstract: A reference-signal generator, particularly for the control of a direct-current motor, comprising a regulated voltage source supplying one of the inputs of a fast and sensitive comparator whose output is connected by resistive means to an integrator-connected operational amplifier. the output of which is connected to the other input of said comparator.

Multichannel disc demodulation circuit

Abstract: A demodulation system employs a phase locked loop. A multichannel disc demodulation circuit has a phase comparator of a differential amplifier type having an input circuit the input AC impedance of which is set at a relatively high value. The DC impedance of a base-bias circuit of input transistors of the phase comparator is set at a relatively low value. This demodulation circuit is capable of accomplishing demodulation without the occurrence of a phase difference when an amplitude variation occurs in the envelope of an angle-modulated wave introduced as input into the phase comparator.

Analog signal comparator circuit

Abstract: An analog comparator circuit for comparing the levels of two analog signals and providing an output which depends upon the difference in the levels of the two signals. The comparison is made within the minimum resolution capability of the comparator. A clamping means is provided to limit the minimum analog level which will cause the comparator to switch from one output to another. The limit is set independently on the minimum resolution of the comparator.

Square wave oscillator for a data terminal

Abstract: A square wave oscillator for use with a data terminal, a data modulator and a buffer, for generating a signal which restrains the transmission of incoming data when the buffer is full. The square wave oscillator comprises a high gain differential comparator with a resistive feedback network connected to its non-inverting input and a series pair of resistors connected between its output and its inverting input. A capacitance is connected between the common node of the series pair and a dc supply. The oscillator is inhibited by a dc signal applied through a diode to the comparator's inverting input when the buffer is not full but is effectively freed to oscillate when the buffer is full to apply a modulating restraint signal input to the modem's modulator.

Filament quality monitor - with photoelectric pickup , fet and operational amplifier as comparator

Abstract: An electronic filament quality monitor has a photoelectric measuring pickup which controls via an amplifier a cutter knife. The measuring pickup is connected in parallel to a field-effect transistor which keeps, independent of any quasi-stationary changes by voltage fluctuations, the electric parameters of the pickup constant. The field effect transistor controls an operational amplifier with a desired value setter on its inverting input acts as a comparator.