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Showing papers on "Comparator applications published in 1977"


Patent
Masayuki Miki1, Nobuaki Miyakawa1
14 Feb 1977
TL;DR: In this paper, an improved comparator is provided for determining the number of the display segments to be energized and activated in accordance with an analogue input voltage, which is applied to one terminal of a resistance having plural resistors connected in series.
Abstract: In a display circuit for actuating a display having plural liquid crystal segments or luminescent diodes, an improved comparator is provided for determining the number of the display segments to be energized and activated in accordance with an analogue input voltage. The analogue input voltage is applied to one terminal of a resistance having plural resistors connected in series, the other terminal of which is grounded. The comparator is composed of an integrated circuit of MOS type which has plural logical circuits. Each of one input terminals of the logical circuits is connected to a corresponding one of junctions of the resistors connected in series. Each logical circuit of the comparator provides "1" output signal when the voltage at the corresponding junction exceeds a threshold value thereof. An actuator, which is constructed with exclusive OR gates or transistors, energizes the liquid crystal segments or the luminescent diodes in response to the "1" output signals from the comparator.

55 citations


Patent
Robert L. Payne1
27 Jun 1977
TL;DR: In this paper, a CMOS voltage comparator with internal positive current feedback is used to achieve a predetermined hysteresis voltage, such that when the set voltage level is exceeded, the output switches quickly and will remain in that state until the input voltage drops by a predetermined voltage.
Abstract: A CMOS voltage comparator with internal positive current feedback to achieve a predetermined hysteresis. The voltage level at which the switching occurs is precisely settable. Hysteresis is introduced such that when the set voltage level is exceeded, the output switches quickly and will remain in that state until the input voltage drops by a predetermined hysteresis voltage.

35 citations


Patent
24 Jan 1977
TL;DR: In this paper, a binary comparator is used to generate a signal of one binary sense or the other, which is then used to control the speed of a stepping motor at a rate substantially higher than the normal stepping rate of the stepping motor.
Abstract: A conventional stepping motor has an optical disk connected to its rotor. Optically generated pulses from the disk are used to generate a signal indicating the speed of the rotor. A code converter converts the speed signals into a binary-encoded power-required signal for feedback to control the power delivered to the coils of the stepping motor so as to maintain a constant stepping speed. The encoded power-required signal is delivered to a binary comparator which delivers an output pulse of one binary sense or the other. A clock driving a counter generates a binary count having the same number of binary levels as the encoded power-required signal fed to the comparator. The output of the counter is also fed to the comparator. The comparator delivers an output of one binary sense when the clock count is less than the binary-encoded power-required signal and an output of the other binary sense when the counter output is greater than the power-required signal. Therefore, the output of the comparator is essentially a square wave having a frequency equal to the frequency of the clock delivered to the counter divided by the count modulus of the counter. The output of the comparator is used to gate the drive signals of the stepping motor at a rate substantially higher than the normal stepping rate of the stepping motor and higher than the normal maximum audible frequency. Therefore, the stepping motor drive pulses are effectively chopped by the output of the comparator. The duty cycle of the chopped signal controls the ON versus OFF ratio and thus the power supplied to the stepping motor coils.

24 citations


Patent
Martin Zielinski1
13 Jun 1977
TL;DR: In this article, a variable reference signal generating circuit concurrently generates a high and a low reference signal and an analogue signal comparator having hysteresis is used to compare an input signal with the high and low reference signals to determine the relative level of the input signal.
Abstract: A variable reference signal generating circuit concurrently generating a high and a low reference signal and an analogue signal comparator having hysteresis are used to compare an input signal with the high and low reference signals to determine the relative level of the input signal with respect to the limits defined by the high and low reference signals. The signal comparators are switching comparators with hysteresis which switch their outputs between high and low levels in response to the detection of a change in a relative magnitude between the input signal and the reference signals. For an input close to the switching threshold of a comparator, the comparator may maintain an output level indicative of a prior relationship between the input signal and the reference signal while the input signal has actually changed to a magnitude which should be represented by a change in the comparator output level. This error is a result of the hysteresis loop defining the operation of the comparator near its threshold level whereby the output of the comparator may be on the incorrect side of the hysteresis loop to maintain an incorrect output. To correct the comparator output signal from such an erroneous indication, the reference signal generating circuit is momentarily modified to produce a new pair of high and low reference signals which are displaced above and below the steady state reference signals, respectively. Such a displacement of the reference signal levels will result in a correction of the comparator output signal level since the difference between the input signal and the reference signal is substantially increased beyond the resulting hysteresis loop of the comparator, i.e., the input signal is outside of the modified comparator hysteresis loop which is based on the displaced reference signals.

22 citations


Patent
02 Jul 1977
TL;DR: In this paper, the output of a detector comprising a photodiode and a wide-band amplifier is derived, and the output (PM) is used to adjust the bias voltage of the laser diode.
Abstract: From the output of a detector comprising a photodiode (1) and a wide-band amplifier (2) are derived a first signal (P1), corresponding to the level of maximum modulation, and a second signal (P0), corresponding to the minimum level of modulation. The second signal (P0) is subtracted from the first signal (P1) in a differential amplifier (9). The output (PM) represents the value of modulation. This output (PM) is fed to one input of a comparator (10), and a modulation reference signal (PMref) is fed to another input. The output of the comparator (10) is used to keep the laser to its predetermined output. The second signal (P0) is also compared in a second comparator (11), with a reference threshold value (P0 ref) representing the required emission threshold. The output of the second comparator (11) is a threshold error signal which is used to adjust the bias voltage of the laser diode.

17 citations


Patent
17 Jun 1977
TL;DR: In this paper, the analog-to-digital converter includes a first and a second comparator each of which receives an analog input, and the first comparator has a plurality of quantizing outputs, one at a logical one and the rest at logical zeros in order to indicate which of the voltage gaps encompasses the analog input voltage.
Abstract: An analog-to-digital converter includes a first and a second comparator each of which receives an analog input. The first comparator generates a plurality of reference voltages which establish a first continuous range of voltage gaps. The first comparator has a plurality of quantizing outputs, one of which will be at a logical one and the rest of which will be at logical zeros in order to indicate which of the voltage gaps encompasses the analog input voltage. The first comparator also has first and second reference current outputs whose magnitudes are representative of which voltage gap encompasses the analog input voltage and a third reference current output whose magnitude is representative of the voltage gap width. A first encoder receives the quantizing outputs of the first comparator and generates a binary number which represents which of the voltage gaps the analog input voltage is encompassed by and which constitutes the most significant bit group of the binary digital representation of the analog input voltage. The reference current outputs of the first comparator are input to a reference voltage level shifting circuit whose output voltage represents the voltage difference between a first boundary of the voltage gap which encompasses the analog input voltage and the maximum reference voltage value associated with the first comparator. The reference voltage level shifting output voltage is produced concurrently with the action of the first encoder, thereby providing overlapping operations for increased conversion speeds. This shifted reference voltage is provided as an input to a second comparator which compares the analog input with a plurality of internal reference voltages which form a second continuous range of voltage gaps. The second comparator has a plurality of outputs, one corresponding to each of the voltage gaps encompassed by the reference voltages in the second comparator. The second comparator produces a logical one on an output corresponding to the particular voltage gap defined by the shifted reference voltage. A second encoder receives as inputs the outputs of the second comparator and generates a binary output which represents the least significant bit group of the analog input voltage. In combination, the output of the first encoder and the output of the second encoder form a binary digital representation of the analog input voltage, including the most significant bits and the least significant bits thereof.

16 citations


Patent
14 Dec 1977
TL;DR: In this paper, a noise immune voltage comparator with controlled hysteresis characteristics is presented, which is realized with two amplifiers each provided with positive feedback and each supplied with a difference voltage which is the difference between the voltage subjected to comparison and a reference voltage.
Abstract: A noise immune voltage comparator with controlled hysteresis characteristics. The hysteresis gap thereof is adjustable from positive down to negative voltage values, zero volt included and in all cases a safe bistable function is maintained. The comparator is realized with two amplifiers each provided with positive feedback and each supplied with a difference voltage which is the difference between the voltage subjected to comparison and a reference voltage, the output signal from one of the amplifiers, after multiplication with a factor that may be greater than zero, zero or less than zero, being combined with the input voltage of the other amplifier.

14 citations


Patent
Steven E. Wetterling1
05 May 1977
TL;DR: In this paper, a pair of clock driven voltage comparators are arranged in a master-slave configuration so that voltage comparisons are made only on a clock edge and the output is held valid over the entire clock period.
Abstract: A pair of clock driven voltage comparators are arranged in a master-slave configuration so that voltage comparisons are made only on a clock edge and the output is held valid over the entire clock period. Each comparator stage includes a latch to lock the comparator output in the logical state it was in when the latch was enabled.

13 citations


Patent
17 Jun 1977
TL;DR: In this paper, an analog-to-digital converter includes a first comparator which receives an analog input, and a voltage subtractor circuit which produces an output voltage which represents the voltage difference between a first boundary of the voltage gap which encompasses the analog input voltage and the value of the analogue input voltage.
Abstract: An analog-to-digital converter includes a first comparator which receives an analog input. The first comparator generates a plurality of reference voltages which establish a first continuous range of voltage gaps. The first comparator has a plurality of quantizing outputs, one of which will be at a logical one and the rest of which will be at logical zeros in order to indicate which of the voltage gaps encompasses the analog input voltage. The first comparator also has a reference current output whose magnitude is representative of which voltage gap encompasses the analog input voltage. A first encoder receives the quantizing outputs of the first comparator and generates a binary number which represents which of the voltage gaps the analog input voltage is encompassed by and which constitutes the most significant bit group of the binary digital representation of the analog input voltage. A voltage subtractor circuit receives as inputs the reference current output of the first comparator and the analog input. The voltage subtractor produces an output voltage which represents the voltage difference between a first boundary of the voltage gap which encompasses the analog input voltage and the value of the analog input voltage. The voltage subtractor output voltage is produced concurrently with the action of the first encoder, thereby providing overlapping operations for increased conversion speeds. This voltage is provided as an input to a second comparator which compares the output voltage produced by the voltage subtractor with a plurality of internal reference voltages which form a second continuous range of voltage gaps. The second comparator has a plurality of outputs, one corresponding to each of the voltage gaps encompassed by the reference voltages in the second comparator. The second comparator produces a logical one on an output corresponding to the particular voltage gap which encompasses the difference voltage produced by the voltage subtractor. A second encoder receives as inputs the outputs of the second comparator and generates a binary output which represents the difference voltage produced by the voltage subtractor and which constitutes the least significant bit group of the analog input voltage. In combination, the output of the first encoder and the output of the second encoder form a binary digital representation of the analog input voltage, including the most significant bits and the least significant bits thereof.

10 citations


Patent
24 Mar 1977
TL;DR: In this paper, an operational amplifier with a feedback circuit connected between an output terminal and an input terminal is used to adjust the amplitude of a reference signal to a predetermined level so as to permit subsequent data signals to be interpreted correctly.
Abstract: A circuit for adjusting the amplitude of a reference signal to a predetermined level so as to permit subsequent data signals to be interpreted correctly. The circuit includes an operational amplifier having a feedback circuit connected between an output terminal and an input terminal; a bank of relays operably connected to a plurality of resistors; and a comparator comparing an output voltage of the amplifier with a reference voltage and generating a compared signal responsive thereto. Means is provided for selectively energizing the relays according to the compared signal from the comparator until the output signal from the amplifier equals to the reference signal. A second comparator is provided for comparing the output of the amplifier with a second voltage source so as to illuminate a lamp when the output signal from the amplifier exceeds the second voltage.

9 citations


Patent
James A. Boyer1
17 Jun 1977
TL;DR: In this paper, a source of alternating current signals is applied across the inverting and non-inverting input terminals of a voltage comparator circuit through a series bias resistor, which is used to direct current flow through the bias resistor in respective first and second opposite directions.
Abstract: A source of alternating current signals is applied across the inverting and non-inverting input terminals of a voltage comparator circuit through a series bias resistor. Electrical circuitry including a supply potential source and the comparator circuit output terminal is effective to direct current flow through the bias resistor in respective first and second opposite directions while the comparator circuit is in the first and in the second operating conditions whereby the polarity of the potential generated across the bias resistor reverses with each change of operating condition of the comparator circuit.

Patent
21 Mar 1977
TL;DR: In this paper, an improved comparator circuit is employed to respond to the charge on a capacitor which represents the integrated value of an input current, and when the charge exceeds the comparator trip point, an output is generated.
Abstract: An improved comparator circuit is employed to respond to the charge on a capacitor which represents the integrated value of an input current. When the charge exceeds the comparator trip point, an output is generated. The output is delayed in time from the onset of the input current by an amount that is almost exactly linearly proportional to the current magnitude. The improvement comprises a circuit that senses the onset of comparator conduction and supplies the current necessary to operate the comparator. At very low input current values a condition can be reached where the current drawn by the comparator input equals or exceeds the applied current. For this condition an ordinary comparator will never trip. The improved circuit prevents this and, since the current added is only to compensate, the timing function is not seriously perturbed.

Patent
Adel A. A. Ahmed1
13 Oct 1977
TL;DR: In this paper, an emitter-coupled differential comparator is proposed to compensate for a temperature-dependent differential-mode component of the signal sources, which is provided by a temperature responsive element coupled in the emitter circuit of one of the coupled transistors.
Abstract: An emitter-coupled differential comparator compares a horizontal rate ramp signal with a vertical-frequency parabola in a television context for producing horizontal rate pulses duration-modulated at the vertical rate. The comparator is arranged to compensate for a temperature-dependent differential-mode component of the signal sources. The compensation is provided by a temperature-responsive element coupled in the emitter circuit of one of the emitter coupled transistors.

Patent
Hiroshi Minakuchi1
25 Jul 1977
TL;DR: In this article, a rotary machine is controlled with higher accuracy by the system comprising a rotation speed detector for generating a signal having a repetition frequency dependent on the rotation speed of the rotary machines.
Abstract: Rotation of a rotary machine, e.g. a dc motor is controlled with higher accuracy by the system comprising a rotation speed detector for generating a signal having a repetition frequency dependent on the rotation speed of the rotary machine, a phase comparator having two input terminals one of which is applied with the output signal of the rotation speed detector, a voltage controlled oscillator applied with the output signal of the phase comparator, a frequency divider applied with the output of the voltage controlled oscillator and supplying the output to the other input terminal of said phase comparator, and a rotation speed controlling circuit having an input terminal applied with the output of the voltage controlled oscillator, i.e. a detection signal with a multiplied frequency.

Patent
01 Mar 1977
TL;DR: In this paper, an automotive burglar alarm system receives an input from a gasoline float responsive potentiometer, which is included in a voltage divider with a manually adjustable resistor, and the output of the window comparator operates an SCR coupled, via a selector switch, for controlling the energization of either a test light or the horn of the automotive vehicle.
Abstract: An automotive burglar alarm system receives an input from a gasoline float responsive potentiometer. The potentiometer is included in a voltage divider with a manually adjustable resistor. The divider has one output signal connected, without inversion, to one input of a window comparator formed by a pair of PUT's. The other comparator input terminal is fed via an inverter from another output of the voltage divider thus forming a bridge circuit with the window comparator as an unbalance defector. The output of the window comparator operates an SCR coupled, via a selector switch, for controlling the energization of either a test light or the horn of the automotive vehicle. The manually adjustable potentiometer is initially calibrated using the test light, to bring the comparator input signals into substantial equality. Then the horn is selected for energization to signal any change in the resistance of the float potentiometer.

Patent
13 Apr 1977
TL;DR: In this article, a gas analyzing system using sonic wave shift over tubular gas column is described. But the authors do not specify the type of known gas component that causes the phase shift.
Abstract: Gas analyzing system using sonic wave shift over tubular gas column. Reference gas passed through column calibrates system to zero reference level. Sample gas having unknown amount of known gas component causes shift of wavelength distance in column. Phase comparator looks at shifted signal over ±90° of phase shift. Integrator responds to comparator output to give dc output signal proportional to phase shift. Compensating circuits in final amplifier estimate probable final value based on rate of change of initial comparator output and use same to drive output meter.

Patent
26 May 1977
TL;DR: In this paper, a comparator and a D/A convertor are used for metal discs passing between transmitter and receiver coils, and the comparator is connected to the digital-to-analogue converter and enters the comparison values in a store and connecting circuit.
Abstract: A comparator and a D/A convertor are used for metal discs passing between transmitter and receiver coils has comparator. The enveloping voltage curve of the alternating field induced by the transmitter is passed after rectification and smoothing to a reference voltage store (7), a comparator (10) and a minimum circuit (12). The output of the reference voltage store (7) is connected to a D/A convertor (9) which receives digital nominal values from an ROM (8) via a control unit (13). The comparator (10) is connected to the digital-to-analogue converter (9) and enters the comparison values in a store and connecting circuit (11). The reference voltage system includes a pick-up coil and an operational amplifier.

Patent
14 Jan 1977
TL;DR: In this article, an all-channel PLL tuning system includes LOF counters, a comparator producing an equality pulse each time the LOF count matches a preselected channel number count and a digital phase-frequency comparator comparing the equality pulses with reference pulses.
Abstract: An all-channel PLL tuning system includes LOF counters, a comparator producing an equality pulse each time the LOF count matches a preselected channel number count and a digital phase-frequency comparator comparing the equality pulses with reference pulses. High speed tuning is accomplished with the phase-frequency comparator arranged to yield immediate correct directional information. A reset pulse is generated for every other equality pulse and forces the equality and reference pulses to have the same initial phase and the digital phase-frequency comparator into one of its stable states corresponding to the desired output condition. The output directional information from the phase comparator is stored and tuning proceeds at high speed until a change in directional information occurs, indicating that the correct tuning frequency has been passed. Normal PLL operation then ensues.

Patent
03 Nov 1977
TL;DR: In this article, the voltage of the main supply part is lowered periodically so that the emergency power battery takes over the supply to the consumer, and the comparator transmits a signal when the consumer is not being supplied sufficiently.
Abstract: The voltage of the main supply part is lowered periodically so that the emergency power battery (3) takes over the supply to the consumer. A comparator transmits a signal when the consumer is not being supplied sufficiently. The comparator compares the output voltage of the battery with a reference voltage. It can compare with a reference voltage a voltage drop occurring due to supply of the consumer by the emergency power battery. The periodic lowering can be such that the comparator output signal can be processed as an alternating-current signal.

Patent
Kiyoshi Otofuji1
09 Nov 1977
TL;DR: In this paper, a voltage comparator circuit is defined, in which an input voltage and a predetermined reference voltage are compared by a differential amplifier to produce a signal corresponding to the difference between both the voltages.
Abstract: Disclosed is a voltage comparator circuit in which an input voltage and a predetermined reference voltage are compared by a differential amplifier to produce a signal corresponding to the difference between both the voltages. The width of a dead zone of the comparator circuit is established by an emitter-grounded transistor connected to the output of the differential amplifier, a polarity inverting IC gate connected to the collector of the emitter-grounded transistor, and a resistor which positive-feeds back the output of the IC gate to the base of the emitter-grounded transistor.

Patent
Gunnar S. Forsberg1
29 Aug 1977
TL;DR: In this paper, a sawtooth phase comparator comprising a bistable flip-flop is provided with a controlled 180° phase-shifter on one input so that a phase shift is carried out when the time between successive SET- and RESET pulses to the flip flop is less than a given time.
Abstract: A sawtooth phase comparator comprising a bistable flip-flop is provided with a controlled 180° phase-shifter on one input so that a phase shift is carried out when the time between successive SET- and RESET pulses to the flip-flop is less than a given time, thereby improving the linearity of the output characteristic of the comparator.

Patent
06 Dec 1977
TL;DR: In this article, an all-channel PLL tuning system includes LOF counters, a comparator producing an equality pulse each time the LOF count matches a preselected channel number count and a digital phase-frequency comparator comparing the equality pulses with reference pulses.
Abstract: An all-channel PLL tuning system includes LOF counters, a comparator producing an equality pulse each time the LOF count matches a preselected channel number count and a digital phase-frequency comparator comparing the equality pulses with reference pulses. High speed tuning is accomplished with the phase-frequency comparator arranged to yield immediate correct directional information. A reset pulse is generated for every other equality pulse and forces the equality and reference pulses to have the same initial phase and the digital phase-frequency comparator into one of its stable states corresponding to the desired output condition. The output directional information from the phase comparator is stored and tuning proceeds at high speed until a change in directional information occurs, indicating that the correct tuning frequency has been passed. Normal PLL operation then ensues.

Patent
Helmut Kosel1
31 Oct 1977
TL;DR: In this paper, a phase comparator is provided with output pulses of a pulse generator over a frequency divider and, for comparison therewith, the timing pulses derived from a displacement pick-up, with the output of the phase comparators being utilized for controlling the pulse generator to regulate the phase of the output thereof.
Abstract: A phase regulating circuit in which a phase comparator is supplied with output pulses of a pulse generator over a frequency divider and, for comparison therewith, the timing pulses derived from a displacement pick-up, with the output of the phase comparator being utilized for controlling the pulse generator to regulate the phase of the output thereof, means being provided for interrupting the supply of timing pulse from the frequency divider to the phase comparator in the event of an interruption in the displacement pick-up pulses, and which, upon recurrence of the displacement pick-up pulses, reconnects the frequency divider to the comparator for supplying divider output pulses to the comparator which have been matched in phase as close as possible to that of the displacement pick-up pulses.

Patent
14 Jul 1977
TL;DR: In this article, the static inverter for converting 12-60V dc into 220V 50 Hz ac has its output compared with a reference, and a drive stage follows the amplitude comparator so that even with large output currents the shape and amplitude of the output voltage can be held to the required values.
Abstract: The static inverter, for converting 12-60V dc into 220V 50 Hz ac. has its output compared with a reference. The control speed is a high multiple of the fundamental frequency. The comparator for the shape of the output is followed by an amplitude comparator that compares the output amplitude with a reference. A drive stage follows the amplitude comparator so that even with large output currents the shape and amplitude of the output voltage can be held to the required values.

Patent
17 May 1977
TL;DR: In this article, a digital phase comparator which is suitable to the high integration of LSI and high in sensitivity and generates no whisker, by composing the circuit of two FF circuits with a direct reset function (or direct set) and one NOR gate is presented.
Abstract: PURPOSE: To realize a digital phase comparator which is suitable to the high integration of LSI and high in sensitivity and generates no whisker, by composing the circuit of two FF circuits with a direct-reset function (or direct set) and one NOR gate. COPYRIGHT: (C)1978,JPO&Japio


Journal ArticleDOI
TL;DR: The accuracy of the comparator described here is substantially insensitive to nonlinearities in the RF detector(s), unlike traditional comparators.
Abstract: The linearity of an RF amplifier system employing envelope feedback depends crucially on the accuracy of the RF amplitude comparator. The accuracy of the comparator described here is substantially insensitive to nonlinearities in the RF detector(s), unlike traditional comparators. This is because the two RF signal amplitudes are compared prior to, rather than subsequent to, the potentially nonlinear detection process. The circuit is also substantially insensitive to the relative phase of the two RF signals.

Patent
11 Aug 1977
TL;DR: In this article, the precision modulator-demodulator is used to convert a LF measured voltage (U1) into voltage pulses and vice versa, and employs an integrator (I), with its supply potential controlled via the measured voltage, connected to a comparator (K1), the output of which is connected to the input of the integrator, to provide pulse symmetry modulation.
Abstract: The precision modulator-demodulator is used to convert a LF measured voltage (U1) into voltage pulses and vice versa. It employs an integrator (I), with its supply potential controlled via the measured voltage (U1), connected to a comparator (K1), the output of which is connected to the input of the integrator (I), to provide pulse symmetry modulation. The output of the comparator (K1) is supplied to a transmission path (S) connected at the other side to a second comparator (K2), which supplies a signal to a low-pass filter (T). The latter provides an output signal of similar configuration to the input signal (U1). Pref. the integrator (I) employs a difference amplifier (V1) with capacitive feedback, each of the comparators (K1, K2) employing a difference amplifier (V2, V3) with resistive feedback.