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Showing papers on "Comparator applications published in 1979"


Patent
19 Mar 1979
TL;DR: In this paper, a parallel analog-to-digital converter with high speed and high resolution, fabricated on a single integrated-circuit chip in such a manner as to avoid problems typically associated with high-speed parallel converters, is described.
Abstract: A parallel analog-to-digital converter having high speed and high resolution, fabricated on a single integrated-circuit chip in such a manner as to avoid problems typically associated with high speed parallel converters. The converter disclosed by way of example has an eight-bit output, 256 matched comparators for quantizing an analog input signal, and encoding and latching logic for deriving digital outputs from the comparators. Problems related to comparator mismatching, high comparator input capacitance and high comparator input bias current, are effectively minimized by the use of a triple diffusion fabrication process, which substantially reduces the number of defects in the circuit and provides a relatively high component packing density.

79 citations


Patent
07 Mar 1979
TL;DR: In this article, a comparator with first and second input terminals is proposed to eliminate errors in data reproduction due to the transitional response of low or high pass filters even if the data signal contains a D.C. component.
Abstract: Waveform converting circuits are disclosed which eliminate errors in data reproduction due to the transitional response of low or high pass filters even if the data signal contains a D.C. component. The converting circuits have a comparator with first and second input terminals. The comparator produces a "1" or "0" output depending on the comparison of the voltages of input signals fed to these first and second input terminals. In one type of converting circuit, a low pass filter is connected between the signal input terminal and the second input terminal of the comparator, while the signal input terminal is directly connected to the first input terminal of the comparator. A feedback circuit including a low pass filter is connected between the output and the second input terminals of the comparator. In another type of converting circuit, a high pass filter is connected between the signal input terminal and the first input terminal of the comparator, and a limiter is connected to the output of the high pass filter. A feedback circuit is provided between the output and either the first or second input terminals of the comparator.

49 citations


Patent
21 Feb 1979
TL;DR: In this paper, a dual threshold comparator circuit includes a comparator amplifier for comparing an analog input signal to a threshold waveform, which is generated in a circuit which includes positive and negative peak detector circuits and a slope detector circuit.
Abstract: A dual threshold comparator circuit includes a comparator amplifier for comparing an analog input signal to a threshold waveform. The threshold waveform is generated in a circuit which includes positive and negative peak detector circuits and a slope detector circuit, all of which are connected to the analog signal source. A voltage divider is connected across the output of the positive and negative peak detector circuits. The threshold input to the comparator amplifier is connected to the common junction of first and second serially-connected impedances in the voltage divider. At the beginning of a particular half cycle of the analog input signal, the voltage across the voltage divider is equal to the difference of the most recent positive and negative peak voltages. The slope detector alters the effective impedances in the voltage divider to cause the threshold voltage to be equal to 25 or 75% of the total difference voltage, depending upon the slope of the analog signal.

41 citations


Patent
13 Nov 1979
TL;DR: In this paper, a capacitance sensing circuit utilizes an operational amplifier connected in a comparator configuration to measure the capacitance of one input of the operational amplifier and is also connected to the output of the amplifier through a resistor to form a free-running multivibrator.
Abstract: A capacitance sensing circuit utilizes an operational amplifier connected in a comparator configuration. The capacitance to be measured is connected to one input of the operational amplifier and is also connected to the output of the operational amplifier through a resistor to form a free-running multivibrator. The period of the multivibrator output depends upon the value of capacitance being measured. A switching transistor is connected to the output of the operational amplifier to cause a changing current output signal. The output signal is obtained as a change of current in a current sensor connected to the collector of the transistor.

33 citations


Patent
03 Aug 1979
TL;DR: In this paper, a solenoid control circuit includes a first switching element which connects one side of the soleneoid load to earth via a current sensing resistor, which is biased to conduct but can be turned off by either of two comparators which are connected to compare the voltage across the resistor with two different reference voltages.
Abstract: A solenoid control circuit includes a first switching element which connects one side of the solenoid load to earth via a current sensing resistor. The other side of the solenoid load is connected by a second switching element to a supply rail. This second switching element is biased to conduct but can be turned off by either of two comparators which are connected to compare the voltage across the current sensing resistor with two different reference voltages. Each comparator has hysteresis and the circuit operates so that one comparator operates to switch off the second switching element when a predetermined current level is reached and the other comparator operates to switch the second switching elements on and off at lower current levels between said predetermined current level and the lower threshold level of the first comparator.

29 citations


Patent
Hiroshi Minakuchi1
23 Oct 1979
TL;DR: In this article, a digital frequency-phase comparator includes a bistable element responsive to first and second frequency input pulse signals for generating a phase error signal, and a circuit which combines the phase and frequency error signals to provide a triple state output.
Abstract: A digital frequency-phase comparator includes a bistable element responsive to first and second frequency input pulse signals for generating a phase error signal, a circuit which includes second and third bistable elements responsive only to the leading edge transition of the input pulse signals in the presence of the outputs from the first bistable element to generate frequency error signals, and a circuit which combines the phase and frequency error signals to provide a triple state output.

23 citations


Patent
Patrick D. Harper1
28 Jun 1979
TL;DR: In this article, a flip-flop comparator is used to respond to the current levels through an inductive load to generate high and low level outputs to connect and disconnect power to the load.
Abstract: Comparator means respond to the current levels through an inductive load to generate HIGH and LOW level outputs causing first switch means to connect and disconnect power to the load. When the load current initially exceeds a peak load actuation level, flip-flop means responsive to the corresponding change in comparator output levels change the current through an auxilliary sense resistor coupled to the sense input of the comparator means. In one embodiment, a one-shot multivibrator prevents a change in the current to the auxilliary sense resistor for a fixed period after the commencement of a load actuation signal. The subsequent HIGH and LOW comparator output levels are fed back to the comparator reference input to switch the reference voltage thereat so as to represent first and second levels of the current sufficient to maintain actuation of the load.

19 citations


Patent
27 Dec 1979
TL;DR: In this article, a carrier recovery scheme for phase modulated waves including phase-locked loops is presented, which includes a clock recovery circuit which generates a signal in response to a modulated carrier.
Abstract: A carrier recovery apparatus for phase modulated waves including phase-locked loops is operable to prevent false locks. The apparatus includes a clock recovery circuit which generates a signal in response to a modulated carrier, a first phase comparator responsive to the modulated carrier and the output of a VCO, a second phase comparator responsive to the first phase comparator and the clock signal, and a control device for superimposing the low frequency component of the output of the second phase comparator on the output of the first phase comparator or a loop filter which controls the VCO.

15 citations


Patent
Sheng T. Hsu1
26 Feb 1979
TL;DR: In this paper, a voltage comparator utilizing complementary MOS techniques is presented. The comparator includes a pair of complementary field effect transistors with serial connected channels, and the output of the transistor pair is subsequently amplified by a cross-coupled latch.
Abstract: A voltage comparator utilizing complementary MOS techniques. The comparator includes a pair of complementary field effect transistors with serial connected channels. A first signal to be compared is applied to the gate of one of the pair of transistors. A second signal is applied to the gate of the pair of transistors such that the transistor pair operates as a quasi-differential amplifier. The output of the transistor pair is subsequently amplified by a cross-coupled latch.

14 citations


Patent
22 Oct 1979
TL;DR: In this article, a voltage comparator for comparing a modulated light intensity signal with a reference voltage, and a bias controlling device which feeds a differential signal between mean value signal of the output of the voltage comparators and mean value signals of the inverted output of an optical modulator as a bias voltage, to an electro optical modulation system.
Abstract: An electro optical modulation system utilizes electro optical effect of a crystal. The electro optical modulation system comprises a voltage comparator for comparing a modulated light intensity signal with a reference voltage; and a bias controlling device which feeds a differential signal between mean value signal of the output of the voltage comparator and mean value signal of the inverted output of the voltage comparator, to an optical modulator as a bias voltage.

14 citations


Patent
03 Apr 1979
TL;DR: In this paper, an upper limit value for a work feeding speed is set to enable stable working without hunting or the like, by applying an LPF to the working voltage between a wire electrode and a workpiece.
Abstract: PURPOSE:To enable stable working without hunting or the like, by setting an upper limit value for a work feeding speed. CONSTITUTION:The working voltage between a wire electrode 1 and a workpiece 2 is averaged by an LPF 4. The averaged voltage is applied to a differential amplifier 5 so that the difference between the averaged voltage and a reference voltage is determined. The differential voltage detected by a linear detector 6 is applied to an input terminal of an analogue switch 13 and a comparator 12. A work feeding speed is previously applied as an initial input to a numerical controller 10. The output of the controller corresponding to the input is supplied to the comparator 12 through a D/A converter 11. The output of the comparator 12 is applied to an operational amplifier 14 to generate driving signals for a motor 8 for an X-axis and another motor 9 for a Y-axis. If an actual work feeding speed reaches an upper limit value, the speed is maintained at the value.

Patent
Lewis M. Terman1, Yee Yen Sung1
31 Dec 1979
TL;DR: In this paper, a digital-to-analog conversion (DAC) circuit and trigger comparator combination is described for encoding and decoding charge packets in a common-well multi-level signal charge-coupled memory device (CCD).
Abstract: A digital-to-analog conversion (DAC) circuit and trigger comparator combination is described for encoding and decoding charge packets in a common-well multi-level signal charge-coupled memory device (CCD). The DAC circuit, which may be of the weighted capacitor type, is used to generate a staircase waveform and to create the common-well under a first gate in the CCD. The trigger comparator adjacent to a second gate in the CCD is a detection circuit which stays in one binary state until an input charge signal is received, whereupon it switches state. In particular, the weighted capacitor DAC contains an extra offset bit which is used in the analog-to-digital or regeneration operation such that when the trigger comparator switches state, the digital input to the DAC at that time correctly represents the signal charge being converted. In one embodiment a circular serial-parallel-serial memory structure is employed as the multi-level CCD memory system.

Patent
Cornelius Dipl Ing Peter1
04 Dec 1979
TL;DR: In this article, a start-up signal circuit is provided to supply a minimum signal to the comparator before the system is operative so that the comparators will initially provide an output to control the current source for the sensing resistor to heat the resistor to its desired level.
Abstract: To effect reliable start-up of electronic systems in which a comparator compares a measured value with a reference, particularly in which a comparator senses current flow through a temperature sensitive resistor exposed to airflow to maintain the resistance value of the resistor at a predetermined level, with respect to the reference, a start-up signal circuit is provided to supply a minimum signal to the comparator before the system is operative so that the comparator will initially provide an output to control the current source for the sensing resistor to heat the sensing resistor to its desired level. The minimum signal is derived, for example, from a voltage divider and connected over a diode to the comparator which, typically, is an operational amplifier, the diode being so poled that, when the signal from the sensing resistor exceeds the minimum signal, it will block, thus cutting off application of the minimum start-up signal from affecting further operation of the circuit.

Patent
Robert N. Allgood1
16 Jul 1979
TL;DR: In this article, an MOS oscillator is provided which has reduced sensitivity to power supply voltage variations and to threshold processing variations, and a plurality of field effect transistors are connected in series to provide reference voltages to establish two trip points for a comparator.
Abstract: An MOS oscillator is provided which has reduced sensitivity to power supply voltage variations and to threshold processing variations. A plurality of field effect transistors are connected in series to provide reference voltages to establish two trip points for a comparator. A second input of the comparator is connected to a capacitor whose charging and discharging is controlled by the output of the comparator. The plurality of series connected transistors form unsymmetrical active device dividers. The unsymmetrical configuration is chosen such that power supply variations and threshold variations cancel much of the charge current variation due to these variations. Matched current sources are used throughout the oscillator circuit.

Patent
Charles R. Crue1
02 Feb 1979
TL;DR: In this article, the phase comparator is a dual section tristate gate (300), which produces an error signal which synchronizes the oscillator to the PCM frequency, which is used to control the phase-locked loop.
Abstract: A phase-locked loop for PCM transmission systems has a phase comparator (20) which provides continuous regulation of the loop oscillator (30). When a PCM pulse signal is present, the phase comparator selectively compares the PCM and oscillator clock signal and generates an error signal which synchronizes the oscillator to the PCM frequency. During the absence of a PCM pulse, the phase comparator provides a high impedance output and oscillator synchronization is maintained by a loop filter (23). In the disclosed embodiment, the phase comparator is a dual section tristate gate (300).

Patent
16 Feb 1979
TL;DR: In this paper, an improved metal detecting device of the beat frequency oscillator type is provided, which incorporates a method for determining the side of the zero beat frequency at which a search oscillator is operating.
Abstract: An improved metal detecting device of the beat frequency oscillator type is provided which incorporates a method for determining the side of the zero beat frequency at which a search oscillator is operating. The device includes a search coil conveniently mounted which is part of a search oscillator. A reference oscillator is also provided, the output of which is digitally compared to that of the search oscillator by a digital phase comparator. The digital phase comparator output is applied through a low pass filter to a slope detector circuit. The slope detector output signal is supplied to both an audio output circuit and a filter/comparator. The audio output is sufficient to facilitate location of permeable and conductive substances. The output of the slope detector also contains information which is extracted by the filter/comparator and translated to an audible signal by an oscillator and the audio output circuit. This audible signal serves to facilitate the determination of whether a permeable or a conductive substance is being detected.

Patent
16 Nov 1979
TL;DR: In this article, the offset voltage generated within the comparator circuit can be considered as being present at the first input, and the offsets generated at the second input are added to the capacitance.
Abstract: A comparator circuit having offset correction circuitry for use in an analog-to-digital converter. The first input of the comparator circuit is periodically connected to ground. The second input of the comparator circuit is connected through a capacitance to ground. The offset voltage generated within the comparator circuit can be considered as being present at the first input. When the offset voltage at the first input is greater than the voltage at the second input a fixed increment of electrical charge is added to the capacitance. When it is less, a fixed increment of electrical charge is subtracted from the capacitance. Thus, increments of electrical charge are accumulated in the capacitance producing a compensating voltage thereacross to correct for the offset voltage.

Patent
04 Jan 1979
TL;DR: In this article, a voltage comparator with a hysteresis responds to the magnitude of the capacitor voltage level for tripping the comparator's output between a HIGH and LOW state which directs capacitor discharge to cycle the comparators output in a pulsating manner.
Abstract: Circuitry for digitizing received light into a digital pulsating signal, including a photodiode operable in response to light intensity for passing current to a capacitor for developing a voltage level thereacross. A voltage comparator with a hysteresis responds to the magnitude of the capacitor voltage level for tripping the comparator's output between a HIGH and LOW state which directs capacitor discharge to cycle the comparator output in a pulsating manner. In a preferred embodiment, the circuitry is powered by a flash storage capacitor along a pair of conductors which serve both to power the circuitry and to receive pulsating current levels indicating voltage comparator switching. The current levels are sensed and counted for producing a binary count output of received light energy. In another embodiment, the conductors also serve to carry a trigger signal for directing flash initiation.

Patent
21 Dec 1979
TL;DR: In this paper, a bistable latch is used to increase the comparison speed, the feedback nodes of the latch being isolated from the output nodes of a charge refresher comparator so that substantially none of the output charge is diverted to furnish feedback.
Abstract: Charge refreshment in a charge transfer device is accomplished by a charge comparator in which charge is ejected over the lower one of two potential barriers, one of the potential barriers having a height controlled by input charge packets to be refreshed, the other potential barrier establishing a reference level for the comparison. The device includes a bistable latch to increase the comparison speed, the feedback nodes of the latch being isolated from the output nodes of the charge refresher comparator so that substantially none of the output charge is diverted to furnish feedback for the latch.

Patent
Rupin J. Javeri1
12 Apr 1979
TL;DR: In this paper, an ignition spark timing circuit with switchable hysteresis for an internal combustion engine is described. But the comparator output is used to determine the time occurrence of spark ignitions, and a switchable feedback path is provided between the output of a comparator and its switching threshold input, such that the threshold input is provided during critical portions (T C ) of the time period of the crankshaft position sensor signal.
Abstract: An ignition spark timing circuit with switchable hysteresis for an internal combustion engine is disclosed. A crankshaft sensor produces a periodic input sensor signal, having a predetermined period, which initiates the action of a programmable voltage slope generator that produces a predeterminedly varying signal. This varying signal serves as an input to a comparator which also receives a switching threshold input, and the comparator output is utilized to determine the time occurrence of spark ignitions. A switchable feedback path is provided between the output of the comparator and its switching threshold input such that hysteresis for the comparator threshold input is provided during critical portions (T C ) of the time period of the crankshaft position sensor signal when the comparator is expected to produce output signal transitions that determine the occurrence of spark ignitions. At other portions (T N ) of the time period of the crankshaft position sensor signal, the comparator output cannot affect the threshold input of the comparator.

Patent
13 Jun 1979
TL;DR: In this paper, the authors proposed a method to detect abnormality in a speed feedback signal system in a simple and purely electrical way by a method wherein a level detection of a speed signal is combined with that of a main circuit motor terminal voltage or semiconductor power converter output voltage.
Abstract: PURPOSE:To make it possible to detect abnormality in a speed feedback signal system in a simple and purely electrical way by a method wherein a level detection of a speed feedback signal is combined with that of a main circuit motor terminal voltage or semiconductor power converter output voltage. CONSTITUTION:Abnormality in a speed feedback signal system is detected by an AND condition of an output of a voltage comparator 10 detecting that a motor terminal voltage is at a certain value or above and that of a speed comparator 11 sending a signal when a speed signal from a speed detector PG becomes a certain value or below, and also by an overspeed detecting signal of a speed comparator 14 to excite a main circuit breaking relay 13 to stop a main circuit. It is not possible for outputs A, B to be both 1 in the 4 sector operation, however, may be so in a mode change transition, and to prevent malfunction caused by it, a detecting sensitivity level of the speed comparator 11 is made sharper than that of the voltage comparator 10.

Patent
24 Apr 1979
TL;DR: In this paper, the authors propose a switch-controlled device for monitoring the performance of a transmitter, comprising a first input connected to receive a signal representative of transmitter output current, a second input connected with a comparator connected to the output of the multiplier, and a switch controllable either to connect the first and second inputs to the multiplier such that the multiplier output is representative of the transmitter output power, or to connect one of the two inputs to either the multiplier and the comparator and the other to the comparators and to connect them separately.
Abstract: A device for monitoring the performance of a transmitter, comprising a first input connected to receive a signal representative of transmitter output current, a second input connected to receive a signal representative of transmitter output voltage, a multiplier, a comparator connected to the output of the multiplier, and a switch controllable either to connect the first and second inputs to the multiplier such that the multiplier output is representative of the transmitter output power, or to connect one of the two inputs to the multiplier and the other to the comparator and to connect the comparator output to the multiplier such that the comparator remains in balance and the comparator output is representative of the transmitter output impedance. The first input may be connected directly to the multiplier and the second input can be selectively connected to either the multiplier or the comparator by the switching means.

Patent
Bert H Dann1
20 Sep 1979
TL;DR: In this article, four matched transistors grouped in two comparator pairs are used to demodulate a time modulated carrier, where one of the transistors switches off the other transistors without the use of a capacitive element between transistor pairs.
Abstract: Methods and apparatus for demodulating time modulated carriers employ four matched transistors grouped in two comparator pairs. A single constant current source is provided for all four transistors. Emitters of the four transistors are metallically interconnected with each other and with an output of the single constant current source, whereby one of the transistors switches off the other transistors without the use of a capacitive element between transistor pairs. A common threshold reference voltage is applied to one transistor in one comparator pair and to one transistor in the other comparator pair. First and second repetitive pulses, preferably in the form of negative-going ramps, are generated in response to alternate successive zero crossings of the time modulated carrier. The other transistor in the one comparator pair is controlled with the first pulses and the other transistor in the other comparator pair with the second pulses to generate a train of constant area pulses corresponding to zero crossings of the time modulated carrier. The information in the modulated carrier is reproduced by averaging constant area pulses in that train.

Patent
31 Dec 1979
TL;DR: In this article, an electronic ignition device for use with an internal combustion engine is coupled between an ignition coil switch and a magnetic pick-up, which produces a cyclical signal A which is integrated and applied to a first comparator, the other input of which receives a threshold.
Abstract: An electronic ignition device for use with an internal combustion engine is coupled between an ignition coil switch and a magnetic pick-up. The pick-up produces a cyclical signal A which is integrated and applied to a first comparator, the other input of which receives a threshold. The comparator output actuates the ignition coil switch. A logic circuit combines the output Z of a zero detector receiving the cyclical signal A with the output of the first comparator. The logic circuit output is integrated to provide a signal R indicative of actual ignition displacement, and which is compared with a signal RS representing the required ignition displacement. In a first embodiment this comparison takes place in a second comparator the output of which is fed back to constitute the threshold input of the first comparator. In a second embodiment the threshold for the first comparator is defined by RS, the signals R and I being combined before application to the first comparator. By means of such control loop variations due to manufacturing tolerances, etc, will not adversely affect spark retardation.

Patent
21 Feb 1979
TL;DR: In this paper, a driving circuit consisting of a comparator supplied with an analogue control signal proportional to the running speed of the motor car, a power amplifier including an output transistor which supplies exciting current to the solenoid coil in response to the output of the comparator is provided.
Abstract: In a solenoid actuated device for controlling the oil supplied to a power steering unit of a motor car, a driving circuit is provided to pass current through the solenoid. The driving circuit comprises a comparator supplied with an analogue control signal proportional to the running speed of the motor car, a power amplifier including an output transistor which supplies exciting current to the solenoid coil in response to the output of the comparator. A positive feedback resistor is connected between the output of the comparator and the input thereof to which the analogue signal is applied, and a negative feedback resistor is connected between the output of the power amplifier another input of the comparator thereby ON-OFF controlling the output transistor to pass pulse current through the solenoid coil.

Patent
14 Dec 1979
TL;DR: In this article, the authors proposed a converter consisting of a controlled switch at the input of a power circuit and an integrator forming a control loop, where a comparator is connected to the integrator's output and controls the switch.
Abstract: The converter comprises a controlled switch at the input of a power circuit and an integrator forming a control loop A comparator is connected to the integrator's output and controls the switch A compensating amplifier is located between the integrator and the comparator and has a high positive phase in the frequency range critical for control purposes The compensating amplifier has a feedback path containing a double-T network designed to a specified transfer function The converter is fast and stable, thereby smoothing out input disturbances

Patent
20 Jul 1979
TL;DR: A position measurement circuit is a stator of a rotor with a contactless magnetic mounting as mentioned in this paper, it contains a position sensor signal source and a phase sensitive rectifier and enables simple position signal adjustment.
Abstract: A position measurement circuit is esp. for determining the position w.r.t. a stator of a rotor with a contactless magnetic mounting. It contains a position sensor signal source and a phase sensitive rectifier and enables simple position signal adjustment. The signal source is connected to a comparator which provides the phase sensitive rectifier with a scanning pulse phase shifted in a selected manner w.r.t. the signal source output. This is achieved by also providing the comparator with a direct voltage continuously varying between positive and negative values. The signal source contains an oscillator driving a rectangular-to-sinusoid converter whose output is provided both to the sensor and to the comparator. The sensor contains two coils variably coupled by a rotor element.

Patent
07 Aug 1979
TL;DR: In this article, the carrier wave supply has its microwave oscillator, its programmable frequency divider, and its phase or frequency comparator forming a carrier wave stage that forms the supply with a comparator unit.
Abstract: The carrier wave supply has its microwave oscillator (3), its programmable frequency divider (4)(coupled to the oscillator) and its phase or frequency comparator (5) forming a carrier wave stage (1) that forms the supply with a comparator unit (2). The microwave oscillator's first output (19) is connected to the carrier stage's output (29) and its second output (20) is connected to the input of the divider. The frequency comparator (5) compares the output of the divider with a reference received at the reference input (31) of the carrier stage and produces a control signal for applying to the control input (21) of the microwave oscillator.

Patent
07 Jun 1979
TL;DR: In this paper, the junction between a two-wire and a four-wire line at the interface between transmission and switching systems is considered, where a transformer isolates the twowire terminals, and four wires inputs and outputs are connected through an amplifier and a balancing network.
Abstract: The circuit is provided at the junction between a two-wire and a four-wire line at the interface between transmission and switching systems. The circuit has a transformer isolating the two-wire terminals, and four-wire inputs and outputs. Input voltage (Ue) at the circuit (1) four-wire input (10) is connected through an amplifier (11) to the two-wire line (2) terminal (21), and to the input (31) of a comparator (3). This input voltage (Ue) is also applied through a balancing network (12) and an amplifier (13) to the comparator (3) other input (32). The comparator output (33) voltage (Ua) is the four-wire line output voltage.

Patent
05 Jul 1979
TL;DR: In this paper, a test signal generator is intermittently coupled to a comparator to simulate the signal from each signal generating device, with a test circuit indicating when the comparator fails to respond.
Abstract: The required value signal supplying circuit may be used as aprt of a control circuit for positioning a work piece feeder in dependence on the operating cycle of a machine press At least two similar signal generating devices supplied with variable values are coupled to respective inputs of a comparator which responds to a difference between the two inputs to inhibit the evaluation of the signal, eg by opening a switch Pref a test signal generator is intermittently coupled to the comparator to simulate the signal from each signal generating device, with a test circuit indicating when the comparator fails to respond