Showing papers on "Comparator applications published in 1986"

Tamper-resistant packaging for protection of information stored in electronic circuitry

Abstract: A tamper-resistant package for protection of information stored in electronic circuitry includes apparatus for distributing electro-magnetic energy within a region occupied by the circuit to be protected. A sensing arrangement senses the distribution of the energy. In a preferred embodiment, electrical current is distributed through a coil or coils within which the circuit to be protected resides. The sensor includes an integrating circuit, and the output of the integrating circuit is presented to both a sample and hold circuit and to a comparator. The comparator has high and low reference input terminals which are fed from a voltage divider to which is also applied an output from the sample and hold circuit. The high and low reference inputs to the comparator are, by reason of the sample and hold circuit, adaptive. The comparator produces an output if its input is outside the limits established by the high and low reference inputs; that output of the comparator is taken as evidence of tampering. An impairing device responds to the comparator output to obliterate, destroy or otherwise impair the information stored in the electronic circuit which is being protected.

Apparatus for controlling output power of transmitter

Abstract: An apparatus for controlling the output power of a transmitter that is installed in a vehicle or used in a mobile radio communication equipment has a power amplifier, a coupler for delivering an output corresponding to the output power from the power amplifier, a detector disposed after the coupler, a comparator for delivering an output proportional to the difference between the output voltage from the demodulator and a reference voltage, and a voltage control circuit for controlling the output power of the power amplifier in response to the output from the comparator. An RF variable attenuator is disposed before the comparator to compress the dynamic range of the signal applied to the voltage control circuit.

Extended range radiation dose-rate monitor

Abstract: An extended range dose-rate monitor is provided which utilizes the pulse pileup phenomenon that occurs in conventional counting systems to alter the dynamic response of the system to extend the dose-rate counting range. The current pulses from a solid-state detector generated by radiation events are amplified and shaped prior to applying the pulses to the input of a comparator. The comparator generates one logic pulse for each input pulse which exceeds the comparator reference threshold. These pulses are integrated and applied to a meter calibrated to indicate the measured dose-rate in response to the integrator output. A portion of the output signal from the integrator is fed back to vary the comparator reference threshold in proportion to the output count rate to extend the sensitive dynamic detection range by delaying the asymptotic approach of the integrator output toward full scale as measured by the meter.

Differential CMOS comparator for switched capacitor applications

Abstract: A differential input circuit for a switched capacitor CMOS voltage comparator is provided which minimizes offset voltages by configuring the load devices to utilize a single switched capacitor biasing network initialized from internally-generated bias voltages, while configuring the initialization switches for the differential input devices to also utilize internally-generated bias voltages such that the offset voltages are stored on the input capacitors. The power supply rejection performance of the voltage comparator is also optimized by connecting parallel load devices of opposite switching topology such that the same input impedance is seen at both load terminals.

High input impedance, high gain CMOS strobed comparator

Abstract: A CMOS high gain strobed comparator comprising a cascoded input differential stage with current mirror loads. The DC biasing for the input stage cascode devices is set by a replica biasing technique. The loads to the input differential stage are simple current mirrors which drive a set of cross-coupled devices that form a latch. The high gain of the comparator is realized in the second stage. The differential output of the comparator drives a second latch. This second cross-coupled latch stores and maintains the comparator data even after the strobe signal destroys the data of the differential output.

Double integral type A/D converter

Abstract: Herein disclosed is a double integral type A/D converter for converting an analog signal into a digital signal. The A/D converter (includes), as circuit elements an integrator having its one terminal made receptive of one of an unknown input voltage and a reference voltage; a comparator connected with the output of the integrator and including a transistor having its collector or drain opened; and an offset correction circuit connected between the output of the comparator and another terminal of the integrator for feeding back the output of the comparator. The offset correction circuit including a series circuit of a switch, a resistor R 0 and an auto-zero capacitor C 0 . The converter also includes a flip-flop made responsive to the output signal of the comparator for switching the operational mode of the integrator from an integration mode to an offset correction mode; and a counter for counting the inverse integration period of the reference voltage. These circuit elements, as recited, are packaged into a hybrid IC.

Phase comparator for use with a digital phase locked loop or other phase sensitive device

Abstract: A phase comparator circuit for use with a digital phase-locked loop which can be programmably altered to provide phase comparisons either on the leading edge or leading and trailing edges of the phase-locked loop output signal, to provide an increased operating bandwidth capability to the phase comparator circuit. The phase comparator circuit can be configured to cooperate with a multiple frequency digital phase-locked loop such that the results of a phase comparison will be delayed until a frequency adjustment has been completed.

High speed comparator having controlled hysteresis

Abstract: A high speed two micron CMOS comparator uses an input differential stage having feedback current mirror loads providing high speed current signals to an output cascode stage. Current mirror arrangement provide fast signal propagation through the comparator. Hysteresis is established by the output of the comparator positively fedback through a similar feedback differential stage superimposing controlled current signals into the cascode stage. Hysteresis of the output signal respecting a differential input signal is controlled by the ratio of bias currents of internal current sources which ratio is relatively insensitive to temperature changes.

Electronic float switch apparatus

Abstract: There is disclosed an electronic float switch circuit which employs simple immersion probes, one of which is associated with a high fluid level and the other with a low fluid level. Each of the immersion probes operates in conjunction with an oscillator, a detector and a comparator. Essentially, when the associated immersion probe is immersed in a fluid, the oscillator ceases oscillations which therefore provides a first low voltage level via the detector to the comparator to therefore change the state of the comparator. The comparator associated with the high and low level probes operate to set and reset a DC flip-flop which in turn controls an opto-isolator device to trigger a triac. The triac operates the pump. When the fluid level reaches below the level of the low probe, the circuit is disabled allowing the vessel again to be filled with water to allow the pump to operate between the high and low levels by means of the electronic circuit.

Quickly variable frequency generator

Abstract: 1. A quickly variable frequency generator of the fractional division type, comprising a phase comparator (1), a first input (E1) of which is coupled to the comparison signal (Fr) input (E) of the generator, and having a second input (E2), a variable oscillator (5) having a control input which is coupled to the comparator, and an output which constitutes the generator output, and comprising a variable-module divider (7-8-9) which is inserted between the oscillator and the second input (E2) of the phase comparator (1), characterized in that the frequency generator comprises in series between the comparator (1) and the control input of the oscillator (5) a window circuit (2) which truncates the duration of each output signal of the comparator (1) by a given value T which depends on the maximum duration (d phi) of the phase shift due to the fractional division in the operational frequency bandwidth of the generator, in such a way that the phase jitter due to the fractional division does not impair the spectrum of the generator output signal.

Digital receiver with dual references

Abstract: A pair of comparators is provided with attenuated input signals. Each comparator is provided with a different reference level so that two sets of complementary digital outputs may be obtained with different pulse widths. Hysteresis control is provided to the comparators to compensate for noise present at the comparator inputs.

Phase locked loop

Abstract: An oscillating circuit using a phase locked loop (PLL) which includes a voltage controlled oscillator (VCO), a phase comparator, a low pass filter (LPF) and a phase extractor has a small circuit scale. Every repeat period of a reference pulse signal being provided to one input terminal of the phase comparator and having a frequency of 1/N times of an oscillating frequency of the VCO, one of leading edges of the output pulses of the VCO near a leading edge of the reference pulse signal is selectively extracting by the phase extractor. The extracted leading edge of the output pulse of the VCO is provided to another input terminal of the phase comparator and phase-compared with the leading edge of the reference pulse signal by the phase comparator. A phase error signal generated from the phase comparator is supplied through the LPF to the VCO as a control voltage thereof in order to stabilize the oscillating frequency.

Transmitter/receiver device for high-frequency signals, which can be coupled up to a transmission network

Abstract: Transmitter/receiver device for high-frequency signals, which can be coupled up to a transmission network, in particular to a distribution network. The device comprises a demodulator equipped with a shaping stage which includes a voltage-variation detector 24 and a comparator 25 whose output changes logic state when a message is transmitted. At the input of the detector 24, a terminal A of voltage UA is connected, on the one hand, via a circuit with time constant R5, C5 to a first input 26 of the comparator, and on the other hand directly to a second input 27 of the comparator. The time constant R5, C5 is chosen so that the voltage at the first input of the comparator is set to the average value of the signal of voltage UA during transmission.

A clamping circuit for an analogue to digital converter

Abstract: The clamping circuit clamps a threshold of an ADC to a signal level just below the black level of a television signal. During the blanking period, a negative-going peak is superimposed on the input signal to produce the waveform 76. Each time this crosses the 0000,0001 threshold of the ADC, the polarity of the output of a comparator changes (see the middle waveform). The comparator compares the ADC output and a reference value. The input signal is biased according to the integral of the comparator output. When signal levels are stable, the comparator output is symmetrical, its integral is zero and no change occurs in the biassing. If signal levels drift, the negative going peak crosses the threshold for the second time relatively sooner or later. The comparator output becomes assymmetric and has a non-zero integral. Consequently, the biassing level changes to compensate for the drift.

Circuit for monitoring the current flow through n loads

Abstract: In the case of current monitoring systems which indicate that the current is above or below a specific threshold, voltage comparators are in widespread use which each have two inputs and one output and in the case of which the logic state of the output is dependent on which of the two input voltages is the larger. If these comparators are designed as integrated circuits, then their supply voltage Us should be considerably larger than the voltages which are to be compared. If the input voltages are larger than the available supply voltage Uv, then Us must be increased in comparison with Uv. For this purpose, it is proposed to use an integrated multiple comparator, which is composed of a plurality of individual comparators, and to produce the supply voltage for the other comparators (OP2, OPA1 to OPA4, OPB2 to OPB4) using a single comparator (OP1, OPB1). A value of Us which is approximately equal to 2Uv can be achieved using a simple comparator circuit (C1 to C3, R1 to R5, D1, D2), it being possible for one generator comparator to operate a plurality of sensor comparators. Main field of application: lamp monitoring in the case of motor vehicles.

Stabilizing constant-voltage circuit

Abstract: PURPOSE: To reduce the current consumption by connecting a current limiting circuit in parallel to a comparator current source, releasing the battery saving, and thereafter, increasing a current only for a prescribed time and shortening the rise time. CONSTITUTION: A comparator circuit consists of transistors Q1WQ4 and a resistance R1 being a comparator current source, and a stabilizing constant-voltage circuit is constituted of a two-stage constitution with an emitter ground amplifier consisting of a transistor Q5 and a resistance R2. Also, to the resistance R1 of the output source of the comparator circuit, a current control circuit consisting of an npn transistor Q6 to whose base a control signal CONT is inputted is connected in parallel. In this state, by varying a current IEE by the signal CONT, a current is increased only for a prescribed time after the battery saving has been released, a capacitive load is charged quickly and an output voltage is raised in a short time, and thereafter, the current is decreased. In this way, the power consumption can be reduced. COPYRIGHT: (C)1987,JPO&Japio

Clamping circuit for an analog to digital converter

Abstract: A clamping circuit clamps a threshold of an analog to digital converter (ADC) to a signal level just below the black level of a television signal. During the blanking period, a negative-going peak is superimposed on the input signal to produce the waveform. Each time this crosses the 0000,0001 threshold of the ADC, the polarity of the output of a comparator changes. The comparator compares the ADC output and a reference value. The input signal is biased according to the integral of the comparator output. When signal levels are stable, the comparator output is symmetrical, its integral is zero and no change occurs in the biasing. If signal levels drift, the negative going peak crosses the threshold for a second time relatively sooner or later. The comparator output becomes assymmetric and has a non-zero integral. Consequently, the biasing level changes to compensate for the drift.

Starlan coded data transceiver collision detection circuit

Abstract: A daisy chain collision detection circuit for use with a StarLAN coded data transceiver includes a voltage comparator having an inverting input, a non-inverting input and an output. The inverting input of the voltage comparator is responsive to differential output voltages from a differential line drive and transient spike voltages from the primary of an isolation transformer. A charging capacitor is connected to the non-inverting input of the voltage comparator. The capacitor is charged to a reference voltage which is directly proportional to the peak voltage of the differential output voltages. The output of the voltage comparator provides an internal collision detection signal which is switched from a high logic level to a low logic level upon the occurrence of a daisy chain collision.

Apparatus for detecting a start of an engine for a motor vehicle

Abstract: Apparatus for detecting the start and stop of an engine starter motor includes a sensor, an amplifier, a comparator, and a monostable multivibrator. When a starter motor starts and stops, magnetic flux around the starter motor varies greatly. The sensor senses this varying magnetic flux and produces a voltage signal corresponding to the magnetic flux variation. The voltage signal is amplified by the amplifier so that the amplified voltage signal is fed to the comparator. When the voltage signal fed to the comparator is greater than the reference voltage of the comparator, a pulse signal is fed to the multivibrator, and in turn the multivibrator is triggered to output detecting signals corresponding to the start or stop of the starter motor. A warning lamp or buzzer may be energized by the detecting signal from the multivibrator.

Linearized phase comparator and phase-locked loop comprising such a phase comparator

Abstract: A phase comparator for receiving an input signal and a signal to be compared with this input signal, comprising an auxiliary stage. The auxiliary or dynamic reducing stage includes a circuit for reducing a predetermined value of the phase difference between the two inputs of the comparator and a circuit for recovering said value at the output of the comparator via a circuit delaying the information expressing this value. The phase comparator may be used in a phase locked loop.

Fly-back converter

Abstract: PURPOSE: To suppress overcurrent, by integrating voltage induced to the tertiary winding of a main transformer, to find magnetic flux density, and by limiting the ON-period of a switching element so that the magnetic flux density may come to magnetic saturation or less. CONSTITUTION: A fly-back converter is composed of a main transformer 11, a transistor 12 as a switching element 2, a rectifying and smoothing circuit 13, and a control circuit 14. The control circuit 14 is composed of an integrating circuit 18, a comparator 19, an error amplifier 26. a saw-tooth-wave generator 28, a comparator 29, an AND circuit 30, and the like, and when the output signal of the integrating circuit 18 is greater than reference voltage 20 via the comparator 19, then the AND circuit 30 is closed. When DC output voltage is risen, then the pulse width of the output signal of the comparator 29 gets smaller, and the induced voltage of a secondary winding gets lower. Besides, an ON-period lengthened in a state that overcurrent flows is shortened to suppress storage energy. COPYRIGHT: (C)1988,JPO&Japio

Voltage level detector/holding circuit

Abstract: The voltage level detector/holding circuit exhibits a) a comparator having a first and a second input connection and an output connection, the first input connection responding directly to a continuously variable input voltage, b) an analog multiplexer, by means of which the input voltage is applied to the second input connection of the comparator, the analog multiplexer exhibiting a control connection which, in dependence on the voltage at the output connection of the comparator, creates a conducting path through the analog multiplexer when a predetermined ratio exists between the voltages at the first input connection and at the second input connection of the comparator, and c) a capacitor, one electrode of which is connected between the analog multiplexer and the second input connection of the comparator, and the other electrode of which is connected to earth.

Integrated digital circuit for logarithmic signal processing

Abstract: An integrated circuit for logarithmic signal processing has a logarithmic converter and a logarithmic computer, each with a comparator array logic (CAL circuit). The CAL circuit has a large number of comparators, which are connected to each other, and are arranged in an array. A digital value is stored in each of the comparators. The CAL circuit stores all digital values in monotonically ascending or descending sequence. Each of the comparators receives the input data signal and compares it with the digital values which are stored in the comparator. A comparison signal which depends on the comparison is generated. The comparison signal of every comparator is received by an end cell, which also receives the comparison signal of the immediately adjacent comparator. The end cell generates an output signal. An end cell is assigned to each comparator. The large number of output signals from the end cells gives the position of the comparator of which the stored digital value is next to the value of the input data signal.

Tracking apparatus for VCR

Abstract: A tracking apparatus for a VCR comprises an operational amplifier comparator for comparing a reference voltage with an integrated drum rotation pulse signal. First and second switches are provided to respectively increase and decrease the value of the reference voltage applied to the operational amplifier comparator to respectively decrease and increase the width of a pulse signal produced by the comparator and input to a monostable multivibrator which controls the positioning of a video head relative to an advancing track of a scanned video tape. In this way, tracking adjustment can be performed by remote control and does not depend on the use of variable resistors usually present for the purpose of volume control.

Circuit for a recording and/or reproducing apparatus with an optoelectronic device

Abstract: In a circuit for a video, audio or data recording and/or reproducing apparatus with an optoelectronic device for generating tacho-pulses and with a comparator connected to the optoelectronic device, the two inputs of the comparator are connected by a resistor and to one input of the comparator there is connected a memory, which can be loaded with the output signal of the optoelectronic device via the resistor. As a result, the switching threshold for the comparator is automatically adapted to the fluctuations in level and/or amplitude in the output signal of the optoelectronic device.

Setting method for modulation factor of transmitter

Abstract: PURPOSE: To eliminate the need for a controller until a demodulation output arrives at a reference value, and to reduce a processing time in a conventinal method almost by half, by adopting the reference value, and a comparator, and increasing continuously a level adjuster that sets a modulation factor until the demodulation output arrives at the reference value set in advance. CONSTITUTION: At a reference value 12, a digital signal corresponding to a desired set value is added on input terminals 12C and 12D, and a D/A converter 12A converts the signals to analog signals, and is taken out from an operational amplifier 12B. The demodulation output and a reference voltage are added on a comparator 13, then being compared. The output of the comparator represents a state of '1'. while the demodulation output is small, but when it exceeds a reference value (a), the output of the comparator 13 goes to a state of '0'. A level adjuster 6 is carried in order regardless of a controller 11 while the output of the comparator is at '1' and when the output of the comparator 13 goes to '0', the level adjuster 6 is returned to the state of one preceding stage by the controller 11. Hereinafter, the output of the level adjuster 6 is increased making the step width of the level adjuster 6 small. COPYRIGHT: (C)1987,JPO&Japio