Showing papers on "Comparator applications published in 1990"

Time dependent, variable amplitude threshold output circuit for frequency variant and frequency invariant signal discrimination

Abstract: A voice signal compression system (10) includes a variable gain amplifier (14) for amplifying a voice input signal (12) at a gain dependent on a variable control voltage (32). A driver (18) receives the amplified input signal and supplies a power-boosted output signal (20) to an acoustic output transducer, a peak detecting comparator (24), and to a thresold reset timer (26). The comparator (24) produces a digital output that triggers an attack/decay timer (30) which produces the control voltage (32). The comparator (24) initially is set to a high threshold state by the threshold reset timer (26). As the levels and peaks of the input signal (12) increase, the comparator (24) begins to trigger digital pulses to the attack/decay timer (30), and the threshold reset timer (26) begins measuring the duration of the signal which exceeds the threshold of the comparator (24). If the level of the power-boosted output signal (20) exceeds the threshold of the comparator (24) for a preselected time, then the compression threshold of the comparator (24) is switched to a lower level. The threshold remains low until the continuous signal is removed whereupon the comparator (24) is reset to its higher threshold.

An 8-bit 200-MHz BiCMOS comparator

Abstract: The design of a fully differential BiCMOS comparator suitable for application in data conversion, instrumentation, and communication systems operating at video frequencies and above is discussed. By exploiting the advantages presented by the integration of both bipolar and CMOS devices within the same technology, the comparator dissipates less power than conventional bipolar designs without sacrificing operating speed. The comparator includes an input stage that combines MOS sampling with a bipolar regenerative amplifier. This stage dissipates no static power and, because the amplification is provided by a bipolar differential pair, no offset cancellation is needed to achieve 8-b precision. Furthermore, the need for preamplification and the attendant power-delay penalty associated with preamplifier overdrive recovery are avoided. An experimental version of the comparator, consisting of the BiCMOS regenerative input stage followed by a current-switched latch, has been integrated in a 0.8- mu m BiCMOS technology with an area of 140*75 mu m. This circuit performs comparisons to a precision of 8 b at rates up to 200 MHz. The entire circuit dissipates only 1.6 mW at the maximum clock rate while operating from a single 5-V supply. >

Switched-capacitor circuit having a full-wave-rectifying and integrating function

Abstract: A switched-capacitor circuit is described, which performs the functions of a full-wave rectifier and of an integrator and has a single operational amplifier and a comparator. The circuit is insensitive to the stray capacitances and offsets of the comparator and the operational amplifier. In particular, the input signal is sampled during only one phase of the clock which pilots the operation of the switched-capacitance network.

Rf wideband high power amplifier

Abstract: A r.f. wideband high power amplifier (1) receives an input signal at its input via a coupler (7) whenever a signal for amplification is applied to an input port (15). The output of the amplifier (1) is tapped by a coupler (8) and fed to an input of a comparator (3). The input signal applied at the input port (15) is fed to a second input of the comparator (3) via a delay line (5), arranged to introduce a delay substantially equal to that of the power amplifier (1). The comparator (3) produces at its output an error signal representative of the difference between the input signal fed via the amplified and the delayed path. A combiner (16) serves to introduce the amplified error signal to the amplifier output signal such that the error signal is in anti-phase therewith. Thus, the resultant signal produced at an output port (4) has had feed forward distortion cancellation. In accordance with the present invention the arrangement further includes an amplitude compensating network (8) in the form of a PIN-diode attenuator, controlled by a signal from a comparator (14). The comparator (14) provides a control signal to the attenuator (8) in accordance with the respective levels of signal from a first detector (17) and a second detector (18). The feedback control loops are arranged to function with a fast response time with respect to the period of the highest frequency of the input signal.

Method for tone avoidance in delta-sigma converters

Abstract: The quantization noise in a delta-sigma converter can produce correlated noise when the converter is operating This correlated noise can produce tones in the frequency band of interest In a departure from conventional wisdom these tones are substantially eliminated by the degration of the signal-to-noise ratio at the input of the comparator in the delta-sigma converter In the preferred embodiment this degradation of the signal-to-noise ratio is accomplished by attenuating the input signal to the comparator such that the input signal becomes comparable to the noise generated in the input stage of the comparator

Hysteresis insensitive analog to digital converter system using a coarse comparator and a fine comparator

Abstract: An analog to digital converter system (10) is disclosed which comprises an SAR logic circuit (12) which controls capacitor array control switches (14) which themselves control a capacitor array (16). A top plate (18) of the capacitor array (18) is selectively coupled to a coarse comparator (24) and a fine comparator (26). The outputs of the coarse comparator (24) and the fine comparator (26) are input into an error correction circuit (28). In operation, the coarse comparator (24) is used to approximate a predetermined number of the most significant bits of the digital word to be output by the system (10) while the fine comparator (26) is used to approximate the remaining bits of the digital word. In this manner, the coarse comparator (24) alone is subjected to the high voltages which might cause errors as a results of the hysteresis effect in the threshold voltages of the MOSFETs used to construct the comparators. The voltage shift as a result of this hysteresis is not a significant factor for the bits generated by the coarse comparator and as such the system (10) may accomplish high resolution analog to digital conversions.

Electronic control system for an oven

Abstract: An electronic oven temperature regulator employing a comparator (U1B) to control energization of a relay (56,58) for cycling the oven heating unit (gas or electric) in response to comparison of an oven temperature sensor (23) output and a user selected reference temperature about which regulation is desired. A reversible polarity voltage regulator (R5, CR6) provides feedback from the comparator output to the input to provide a positive and negative hysteresis dead band about the selected regulation temperature for minimizing cycling or "hunting" of the heating unit. A fault comparator (6A) tracks the selected reference temperature to disable the heating element relay in the event of a short in the temperature sensor.

Comparator circuit with variable hysteresis characteristic

Abstract: A comparator circuit including a reference-voltage generating unit for generating a variable reference voltage, and a comparator having a first input terminal to which an input signal is supplied and a second input terminal to which the variable reference voltage from the reference-voltage generating unit is supplied. The comparator circuit also includes additional-voltage generating unit for generating an additional voltage that varies in proportion to the variable reference voltage, and a switching unit that is connected to the additional-voltage generating unit and activated or deactivated in response to an output of the comparator. When the switching unit is deactivated, the input signal is supplied to the first input terminal of the comparator and the variable reference voltage from the reference-voltage generating unit is supplied to the second input terminal of the comparator. When the switching unit is activated, the additional voltage from the additional-voltage generating unit is added to the input signal, and the sum of the input signal and the additional voltage is supplied to the first input terminal of the comparator so that an interpretation processing of the comparator is performed with a variable hysteresis characteristic corresponding to the additional voltage that varies in proportion to the variable reference voltage.

Triple comparator circuit

Abstract: A comparator which is used to compare two analog voltages and provide a single ended output comprises three CMOS differential amplifiers. The use of three differential amplifiers provides improved matching of input capacitance, and a reduction in propagation delay over prior art use of a single differential amplifier. The comparator may be adopted for use in certain CMOS processes to extend the maximum operating voltage by limiting the internal node voltages otherwise subject to damage from impact ionization. An alternative embodiment is disclosed for comparing two analog voltages that are outside the power supply voltage range.

Integrated comparator circuit

Abstract: There is disclosed a three-state buffer including a comparator circuit which comprises a plurality of bipolar transistors and which generates first and second control voltages which are dependent upon the forward biased base to emitter voltage drops of the transistors. The comparator circuit also includes a threshold circuit establishing a threshold voltage intermediate the first and second control voltages which is also dependent upon the forward biased base to emitter voltage drops of the transistors. As a result, the threshold voltage is always intermediate the first and second control voltages to assure reliable operation of the comparator circuit notwithstanding variations in integrated circuit processing parameters or integrated circuit operating temperatures.

Integrated semiconductor circuit for thermal measurements

Abstract: Integrated semiconductor circuit for thermal measurements, com­prising at least a temperature or a heat current sensor and a signal comparator (8), the comparator (8) being provided with a signal feed­back loop containing a DA signal converter (3), more specifically, the comparator (8) being a temperature or a heat current comparator, the DA signal-converter (3) comprising a power output and the signal feedback loop comprising components for the transfer of thermal signals.

Line interface for a data transmission network

Abstract: A line interface for a two wire bus for detecting defects of the bus. The interface includes a shaping circuit having three comparators. The first comparator having two inputs connected to the two wires of the bus, the second comparator having a first input connected to one of the bus wires and another input connected to a reference signal, and the third comparator having a first input connected to the other wire of the bus and the second input connected to a reference signal. A first counter is connected to the output of the first comparator and counts a number of transitions which occur on the bus during a predetermined period of time. If the number of transitions detected by the first comparator is counted to be less than a predetermined number of transitions, the bus is defective. The second and third counters are respectively connected to the second and third comparators. Each of the second and third counters have inputs connected to outputs of the respective comparators and count the number of transitions on the output of the respective comparators. Each time there is a transition on the output of the second or third comparator, the third or second counter is reset. The comparators and counters are connected to circuitry which analyzes signals from the comparators and counters to determine defects on the bus and allow the transmission of data on only one of the bus wires if the other is defective.

Compact planar microstrip-slotline symmetrical ring eight-port comparator circuits

Abstract: It is shown that the common eight-port comparator circuit may be constructed starting from a fully symmetrical eight-port device. The conditions for a lossless symmetrical eight-port circuit to be a symmetrical eight-port comparator are derived. These are used to design several versions of a planar ring microstrip-slotline comparator. Two experimental versions of such an eight-port circuit have been constructed using a planar microstrip-slotline technique. In the case of the second version, the ring circumference is only a wavelength at midband. This is the same circumference as the common 180 degrees magic T ring circuit, four of which are frequently used to build a conventional comparator. The bandwidth of these eight-port planar ring circuits can be as much as 30% for a return loss better than 20 dB. A quasi-optic eight-port symmetrical comparator circuit based on a single wire grid is discussed. It has no bandwidth limitation. >

Power supply voltage monitoring circuit

Abstract: A power supply voltage monitoring circuit for use in a semiconductor circuit which is used with a plurality of power supply systems and is operable by switching the high and low power supply voltages, includes at least two power supply lines, a reference voltage source, a first comparator, a second comparator and a switching transistor disposed between the first comparator and second comparator. The first comparator operates under a threshold value of a supply voltage which is an intermediate voltage between the high and low power supply voltages. The second comparator receives a voltage to be compared with a reference voltage supplied from the reference voltage source and the switching transistor changes, in response to an output from the first comparator, a voltage to be compared by the second comparator. An alarm signal indicating as to whether the supply voltage is normal or abnormal is obtained at an output of the second comparator.

Avalanche photodiode quenching circuit wtih resetting means having a second amplifier

Abstract: An avalanche photodiode quenching circuit (20) incorporates an avalanche photodiode (APD) (22) and a first comparator (C1) responsive to reduction in APD voltage. The comparator (C1) is arranged to activate an APD quench circuit (38) in response to APD avalanche initiation. The circuit (20) also includes a second comparator (C2) arranged to reset the first comparator input (N2) in response to a further reduction in APD voltage caused by initiation of quenching. The second comparator (C2) is also connected to a monostable circuit (48) arranged to latch the first comparator output response to resetting. The monostable circuit (48) maintains the first comparator output level constant until the APD (22) has recharged.

High speed power supply circuit with circuit with positive feedback

Abstract: A self-oscillating power supply circuit comprises a series arrangement of the primary winding (N 1 ) of a transformer (TR), the main current path of a first semiconductor switch (T 1 ) and a current measuring resistor (R 1 ). The first semiconductor switch is driven by a second semiconductor switch (T 2 ) which in turn is controlled by a comparator (CP). The voltage across the current measuring resistor is applied to the non-inverting input (6) of the comparator and, a reference voltage obtained from a reference voltage source (RS) is applied to the comparator inverting input (5). By arranging a capacitor (C 2 ) between the output of the second semiconductor switch and the inverting input (5) of the comparator, the first semiconductor switch rapidly turns-off at the end of the forward phase at an accurately determined current through the primary winding. By applying a lower reference voltage to the comparator at a higher mains voltage, an output current is obtained from the transformer secondary winding (N 2 ) for the load L, which is substantially independent of the mains voltage.

Adaptive referencing analog-to-digital converter

Abstract: To provide for a higher speed operation, lower cost and less complexity in terms of manufacturing, the present invention analog-to-digital converter has feedforwards, from the more significant comparators, to the less significant comparators. As the respective outputs of the comparators change state, the voltage representing that state, for that comparator, is fed to succeeding less significant comparators. With the exception of the most significant comparator whose reference bias voltage remains static, the respective bias voltages of the rest of the successive less significant comparators are shifted, either higher or lower, as the output states of their predecessor comparator(s) change. Consequently, the respective outputs of the comparators correspond, in a binary progressive manner, to a digital word that is representative of the voltage of an input analog signal.

Multistage offset-cancelled voltage comparator

Abstract: A multistage voltage comparator having plural transfer stages between successive comparator stages. Each transfer stage includes capacitors connected between the outputs of one stage and the inputs of the next stage. The capacitors are also connected to a reference voltage line via MOS transistor switches. The switches are characterized by progressively slower turn-off times for each successive transfer stage so that turn off is sequential. The comparator is a differential amplifier with two complementary inputs and outputs. The complementary outputs of the final stage are loaded into a latch and then transferred to an RS flip-flop providing a digital logic output representative of at least a quantization step difference in the inputs to the first comparator stage.

Low-jitter oscillator

Abstract: An oscillator, such as a crystal oscillator, is presented for low jitter (low phase noise) applications, such as in frequency synthesizers or digital repeaters. The two terminals of a resonator are coupled to the input and output of an amplifier, the amplifier together with other components effecting a negative impedance. The inputs of a comparator are connected to the terminals of the resonator. The output of the comparator, preferably differential, is a signal having a frequency substantially determined by the resonator.

Digital phase-locked loop

Abstract: A digital phase-locked loop comprises a phase comparator, a controllable oscillator whose output signal is compared with an input signal in the phase comparator, and a loop filter preceding the oscillator. The filter comprises a clocked input register for storing the last phase-measuring value of the phase comparator, and an integrator which comprises a clocked register whose output signal is fed back to the register input. When the input signal of the phase comparator is absent or disturbed, a switching signal is generated which immediately erases the input register in the loop filter and after whose appearance the register in the integrator of the loop filter is reset to zero within a limited number of clock cycles.

Analog-to-digital converting unit for successive approximation

Abstract: For preventing an analog-to-digital converting unit for a successive approximation from error in operation, the analog-to-digital converting unit has not only a first comparator circuit but also second and third comparator circuits for comparing an analog input signal with first and second critical signals indicative of a responsible voltage range, and the second or third comparator circuit produces a first or second warning signal in the presence of the analog input signal output the responsible voltage range, then a sequential approximation controlling circuit restricts a bit signal of an digital output signal thereof which allows a digital-to-analog converting circuit to produce a comparison voltage signal within a predetermined range, thereby preventing the first comparator circuit from a error in operation.

A CMOS current comparator with well-controlled hysteresis

Abstract: A CMOS current comparator with well-controlled hysteresis is described. The current comparator allows bidirectional input currents. Experimental results show that the current comparator takes approximately 300 ns to resolve a 2 mu A difference of input and threshold currents. >

Circuit for monitoring the switching state of a power transistor

Abstract: The circuit is constructed in such a manner that both the voltage across the power transistor (1) is monitored by means of one voltage comparator (7) and the voltage across the load (3) is monitored by means of a further voltage comparator (8). The input signal (UIN) of the power transistor (1) activates the comparator (7) in the switched-on state and the comparator (8) in the switched-off state. The output signals of the two comparators (7, 8) are combined to form a status signal (UStat). The proposed circuit makes it possible to detect both a shortcircuit or shunt on the load and a leakage current of the power transistor (1) and an interruption in the load or its feed line. … …

A/D converter utilizing successive approximation

Abstract: The invention provides an A/D converter which comprises reference voltage generator means for generating a plurality of reference input voltages from a power supply, a comparator composed of switching means for inputting into the A/D converter an external analog input voltage and the reference input voltages and of an amplifier for amplifying the respective input voltages, and control means for controlling the reference voltage generator means and the comparator on the basis of an output from the comparator; the amplifier circuit of the comparator sharing its power supply with the reference voltage generator means.

Current controlled solenoid driver

Abstract: An electronic contactor controller circuit able to handle high currents and voltages includes an integrated circuit power circuit switch which provides a measuring output signal representative of the load current to an operational amplifier current to voltage convertor. The output voltage of the operational amplifier is provided to an input of a comparator, and at least one reference voltage, from reference voltage generating circuitry, is provided to the other input of the comparator. The comparator outputs a signal to control a timer circuit, which in turn controls the current switch.

A new power standard for audio-frequency measurements

Abstract: A thermal power comparator for audio-frequency measurements is presented. It is essentially a double-bridge-type multiplier that consists of two multijunction thermal converters that contain two heaters. Together with a precision inductive voltage divider and current transformer for extending the voltage and current range, the comparator ensured a high-precision power standard with an AC/DC transfer error of less than 15 p.p.m. in the audio-frequency range. >

Circuitry for surveillance of switching state of a power transistor

Abstract: A circuit for the surveillance of the switching state of a power transistor is constructed such that both, the voltage applied to the power transistor (1) is surveyed by way of a voltage comparator (7), as well as the voltage applied to the load (3) is surveyed by way of a further voltage comparator (8). The comparator (7) in the switched-on state and the comparator (8) in the switched-off state are activated by the input signal (UIN) of the power transistor (1). The output signals of the two comparators (7, 8) are combined to a status signal (UStat). It is possible by way of the proposed circuit to recognize both a short circuit or, respectively, a shunt circuit of the load as well as a leakage current of the power transistor (1) and thus an interruption of the load occurs.

Threshold comparator immunized against noise

Abstract: A threshold comparator counts the instances when an alternating periodic signal crosses a level. To prevent false counts due to fluctuations in supply and ground potentials, a dual threshold comparator is constituted by a first inverter and a second inverter receiving the signal to be detected through a capacitor. The connected inputs of these inverters are biased by a source of bias voltage (Vbias) provided by a third inverter, the output of which is looped to the input. The geometries of the transistors of these three inverters are chosen as follows: the ratio between the geometries of the two transistors of the first inverter is slightly different from the corresponding ratio for the second inverter, and the ratio for the third inverter is in between the first two ratios. This makes it possible to have two change-over thresholds which are close to each other and make the comparator immune to noise.

Microprocessor-controlled high-voltage capacitance bridge

Abstract: A current comparator bridge for measuring the value of an unknown capacitor includes a current comparator having a first comparator winding with an adjustable tap which is connected to one side of a standard capacitor and a second comparator winding connected to one side of an unknown capacitor, a high voltage source being connected to the other side of the capacitors. The current comparator is provided with a detection winding for detecting when the ampere-turns in the first and second comparator windings are equal and opposed to each other. In addition to the current through the standard capacitor being applied to the first comparator winding, the bridge includes a circuit to add a current through a standard conductance to the first comparator winding as well as circuits to compensate for errors. The detection winding is connected to a current-to-voltage converter with an adjustable gain which provides a signal to a phase sensitive detector. A reduced replica of the high voltage source is also applied to the phase sensitive detector which provides output signals Eo and E90 to indicate when the bridge is balanced for both in phase and quadrature components respectively. The values of the capacitance and dissipation factor for the unknown capacitor can then be determined from the balanced condition of the bridge which is designed so that it can be automatically controlled by a microprocessor and switch controller.

Voltage comparator with sample hold circuit

Abstract: A chopper type voltage comparator, as used in analog-to-digital converters, includes an inverter with a switch coupled between the output and an input node and a capacitor coupling the input node to a comparator input node. A signal input terminal and at least one reference voltage input terminal are connected to the comparator input terminal by alternately operated switches. A sample hold circuit is connected to the comparator input node to overcome the effects of the switches on the reference voltage.