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Showing papers on "Comparator applications published in 1991"


Patent
Kinoshita Osamu1
04 Oct 1991
TL;DR: In this article, the output of a phase comparator is applied to one of the input terminals of a differential amplifier through a low-pass filter, and an error detecting section detects a change in the output due to the change in source voltage and temperature and applies that output change to the other input terminal of the differential amplifier to cancel it out, so that the control voltage of a voltage controlled oscillator is accurately expressed only by a phase difference output acquired by the phase comparators.
Abstract: The present invention designs that the output of a phase comparator (102) is applied to one of the input terminals of a differential amplifier (106) through a low-pass filter (104), and an error detecting section (105) detects a change in the output of the phase comparator (102) due to a change in source voltage and temperature and applies that output change to the other input terminal of the differential amplifier (106) to cancel it out, so that the control voltage of a voltage controlled oscillator (107) is accurately expressed only by a phase difference output acquired by the phase comparator (102).

37 citations


Patent
05 Jun 1991
TL;DR: In this paper, a stabilized power supply (6) is provided for supplying a constant voltage to an audio amplifier (1), and two comparators, a first comparator (2) of which compares an output voltage of the amplifier with a reference value, and a second comparator signal when the output voltage coincides with the reference value.
Abstract: A stabilized power supply (6) is provided for supplying a constant voltage to an audio amplifier (1). There are provided two comparators, a first comparator (2) of which compares an output voltage of the stabilized power supply (6) with a reference value to provide a first comparator signal when the output voltage coincides with the reference value. A second comparator (2a) is provided for comparing an output bias voltage of the amplifier (1) with the output voltage of the stabilized power supply (6) and for producing a second comparator signal when the output bias voltage coincides with the output voltage. A NAND gate (3a) is provided to be operated by the first and second comparator signals and a mute release signal so as to stop muting operation of the cicuit.

29 citations


Patent
Kenneth T. Deevy1
24 May 1991
TL;DR: A comparator for use in an A/D converter such as an algorithmic type is presented in this article, where a push-pull inverter gain stage having two series-connected MOSFETs is driven by a signal from a preceding current-comparison stage where an input current is compared to a reference current to set the signal level on the inverter.
Abstract: A comparator for use in an A/D converter such as an algorithmic type The circuit includes a push-pull inverter gain stage having two series-connected MOSFETs The input of this inverter is driven by a signal from a preceding current-comparison stage where an input current is compared to a reference current to set the signal level on an input node of the inverter The trigger point of the inverter is altered by an additional MOSFET, connected in parallel with one of the inverter MOSFETs, and having its gate controlled by the output of a bias voltage control circuit This circuit includes a control inverter stage matched to the comparator inverter and driven by a control current-comparison circuit matched to the corresponding comparator current-comparison circuit The input and output nodes of the control inverter are connected to the inputs of an op-amp the output of which controls the gate voltage of an additional MOSFET in parallel with one of the control inverter MOSFETs so as to force the input and output nodes to be of equal voltage The resulting op-amp output signal serves as the bias signal for the additional MOSFET in parallel with one of the comparator inverter MOSFETs, and sets the trigger point of the comparator inverter at a level equal to the balance point of the preceding current-comparison stage, thereby assuring fast transition times

25 citations


Patent
Behrooz Abdi1
03 Jun 1991
TL;DR: In this paper, a comparator having programmable hysteresis is provided, where the signal supplied to an inverting input of the comparator is determined by the logic state of the output of comparator and is a programmable factor of one of two predetermined signals (V this paper1 or V this paper2 ).
Abstract: A comparator having programmable hysteresis is provided. The signal supplied to an inverting input of the comparator (18) is determined by the logic state of the output of comparator and is a programmable factor of one of two predetermined signals (V REF1 or V REF2 ). The programmable factor is determined by the logic states of a plurality of control signals and can be adjusted by varying the logic states of the plurality of control signals.

24 citations


Patent
29 Jan 1991
TL;DR: In this paper, a comparator having a differential sense amplifier connected to the output of an input comparator and decoding logic connected between the sense amplifier and the output latch is designed for a flash A/D converter.
Abstract: A comparator having a differential sense amplifier connected to the output of an input comparator, and the decoding logic connected between the sense amplifier and the output latch. The comparator is designed for a flash A/D converter having a reference signal generator for one or more of the sense amplifiers.

22 citations


Patent
27 Sep 1991
TL;DR: In this article, the gate of a P-channel transistor of a first comparator is supplied with an input signal, and the second comparator outputs a voltage equal to a stand-by time output voltage of the first comparators, which is then sent to the non-inversion input terminal of a third comparator which is connected to a voltage generating circuit.
Abstract: The gate of a first P-channel transistor of a first comparator is supplied with an input signal, and the gate of a second P-channel transistor of the first comparator is supplied with a reference voltage. An output terminal of the first comparator is connected to an output circuit and the gates of first and second P-channel transistors of a second comparator are supplied with the reference voltage. The second comparator outputs a voltage equal to a stand-by time output voltage of the first comparator and the output voltage from the second comparator is supplied to the non-inversion input terminal of a third comparator which is connected to a voltage generating circuit. The voltage generating circuit has substantially the same dimension ratio as the output circuit and generates a voltage equal to the threshold voltage of the output circuit. A third comparator controls the first P-channel transistors of the first and second comparators in accordance with a difference voltage between the output voltage of the second comparator and the output voltage of the voltage generating circuit to thereby automatically set a stand-by time output voltage of the first comparator at a value close to the threshold of the output circuit.

21 citations


Patent
27 Nov 1991
TL;DR: Differential chopper type comparators as discussed by the authors include a switching circuit which switches between a reference signal and an input signal according to a connected first period and second period, first and second comparator circuits, and a differential comparator circuit differentially comparing the outputs of the inputs and outputs.
Abstract: Differential chopper type comparator including a switching circuit which switches between a reference signal and an input signal according to a connected first period and second period, first and second comparator circuits, and a differential comparator circuit differentially comparing the outputs of the first and second comparator circuits. Each of the first and second comparator circuits comprises a capacitor, an inverter serially connected to the capacitor, and a switch that short-circuits the input/output terminal of the inverter during the first period. The first and second comparator circuits operate in tandem such that the reference signal is input to the firs comparator circuit during the first period when the inverter is short-circuited, while conversely the input signal is input to the second comparator circuit during the first period when its inverter is short-circuited, with the reverse occurring with respect to the first and second comparator circuits during the second period. A comparison as between the size of the input and reference signals is accomplished by the first comparator circuit, and a comparison as between the size of the reference and input signals is accomplished by the second comparator circuit. The outputs of the first and second comparator circuits are then provided to the differential comparator circuit which produces a resultant comparative output effectively free of noise even when the environment is of a high noise level.

20 citations


Proceedings ArticleDOI
11 Jun 1991
TL;DR: In this paper, a current comparator with a fully differential current amplifier and a current domain auto-zero technique was developed to realize offset-free current comparators, which can receive a 0.5 mu A input current in 1.3 mu s even if the current amplifiers and the 1-V converter have offset currents of 20 mu A.
Abstract: A current-domain auto-zero technique and a fully differential current amplifier are developed to realize a offset-free current comparator. Simulation results show that the current comparator can receive a 0.5 mu A input current in 1.3 mu s even if the current amplifiers and the 1-V converter have offset currents of 20 mu A. Its push-pull structure overcomes the slew-rate limiting problem and the fully differential configuration offers a high immunity to clock feedthrough noise and power supply variations. >

19 citations


Patent
18 Sep 1991
TL;DR: In this paper, a comparator with switching hysteresis is used for converting an analog sensor signal into a digital switching signal, and an apparatus is provided at the input side of the comparator in order to alternately supply each comparator inputs, as a function of the switching signal at the output side, symmetrically with a given hystresis signal as a switching threshold.
Abstract: A processing circuit for a magnetoresistive rotary speed sensor (13) or the like having a comparator (11) with switching hysteresis for converting an analog sensor signal into a digital switching signal. An apparatus is provided at the input side of the comparator in order to alternately supply each of the comparator inputs, as a function of the switching signal at the output side of the comparator, symmetrically with a given hysteresis signal as a switching threshold. This apparatus also includes a preamplifier (15) which precedes the comparator non-inverting input and which amplifies the sensor signal, and an offset amplifier (18) of the same construction which precedes the comparator inverting input and which amplifiers an offset signal of a preceding offset network (21). The processing circuit provides a simple, integrable circuit which suppresses offsets and compensates for temperature and supply voltage fluctuations and any spread in tolerances of the circuit components.

19 citations


Journal ArticleDOI
M. Sitkowski1
TL;DR: In this paper, a modeling approach that uses no semiconductor junctions and no regenerative feedback is described, where the comparator characteristics are obtained by means of an odd-order polynomial transfer function.
Abstract: A modeling approach that uses no semiconductor junctions and no regenerative feedback is described. The voltage-controlled oscillator is implemented by means of a circuit producing essentially infinite ringing, and the comparator characteristics are obtained by means of an odd-order polynomial transfer function. The design of the comparator, phase detector, low-pass filter, and error amplifier are also discussed. Performance of the complete macro-model is such that 8000-point simulations, corresponding to some 150 cycles of local oscillator, can be performed in about 15 min on a platform such as the Sun 3/60, or Apollo DN4500. >

17 citations


Journal ArticleDOI
TL;DR: A mixed analogue-digital window comparator is presented whose boundaries can be programmed independently, with untrimmed matching accuracy as good as 0.1%.
Abstract: A mixed analogue-digital window comparator is presented whose boundaries can be programmed independently, with untrimmed matching accuracy as good as 0.1%. Only one voltage reference is needed and its accuracy does not affect the precision with which the width of the comparison window is defined.

Patent
09 Oct 1991
TL;DR: In this article, the hysteresis width of the hystresis comparator can be adjusted to avoid hair peaks in the output signal of the comparator, and the generation of an output signal having a pulse width which is shorter than a prescribed pulse width can be avoided.
Abstract: An infrared ray receiving circuit includes a band pass filter including two variable trans-conductance amplifiers, a detector including a differential switch, and a wave-form shaping circuit including a hysteresis comparator. In the infrared ray receiving circuit, the hysteresis width of the hysteresis comparator can be adjusted, so that generation of hair peaks in the output signal of the hysteresis comparator can be avoided. In addition, the generation of an output signal having a pulse width which is shorter than a prescribed pulse width can be avoided.

Patent
Mika Niemiö1
04 Apr 1991
TL;DR: In this paper, a phase-locked loop circuit in the form of an integrated circuit (IC) including in sequential connection a digital phase comparator, to the input of which is supplied a reference frequency (fref); a loop filter; and a voltage-controlled oscillator.
Abstract: The object of the description is a phase-locked loop circuit in the form of an integrated circuit (IC) including in sequential connection a digital phase comparator, to the input of which is supplied a reference frequency (fref); a loop filter; and a voltage-controlled oscillator, from which a feedback branch is fed to the second input of the phase comparator. The voltage (φV; φR) of the pulses obtained from the digital phase comparator is disposed so as to be adjusted by limiting means so as to modify the bandwidth and rate of the loop. The adjustment of the voltage of the pulses can be carried out, e.g., by limiting the supply voltage of the phase comparator or by means of an exterior diode or transistor limiter (Q2, Q3). The circuit is usable e.g. in radiotelephone applications, in which loop rate is increased during channel switching.

Patent
08 Nov 1991
TL;DR: In this paper, a current compensation circuit for a comparator includes a pair of switching transistors which supply input bias current to their corresponding comparator input transistors, and a current mirror which is programmed by the replica of the uncompensated input bias currents.
Abstract: A current compensation circuit for a comparator includes a pair of switching transistors which supply input bias current to their corresponding comparator input transistors, a pair of current to voltage conversion means which use collector current from the comparator input transistors to turn on and off the appropriate switching transistor when its corresponding comparator input transistor is on, a transistor to generate a negative replica of the input bias current flowing in the comparator input, and a current mirror which is programmed by the replica of the uncompensated input bias current to produce a compensated input bias current to the switching transistors.

Patent
Philip S. Crosby1
09 Apr 1991
TL;DR: An analog-to-digital converter comparator circuit as mentioned in this paper includes a pair of differential amplifiers having their outputs normally intercoupled in a subtractive sense, at a sampling strobe time, the output of one differential amplifier is reversed such that outputs of the two different amplifiers are additive.
Abstract: An analog-to-digital converter comparator circuit includes a pair of differential amplifiers having their outputs normally intercoupled in a subtractive sense. At a sampling strobe time, the output of one differential amplifier is reversed such that outputs of the two differential amplifiers are additive. The period of time during which the output signals add can be made as short as desired, for example by successively operating differential coupling circuits at the amplifier outputs through an intervening delay line. A very small aperture time is secured which is substantially shorter than the time constant of subsequent circuitry. A latch circuit receives the output of the comparator for assuming one of two different states in accordance with the comparator sampled output.

Patent
17 Jul 1991
TL;DR: In this article, a Digital Phase Comparator (DPC) is proposed, which is a simplified logic circuit in which Nand Circuits provide UP and DOWN signals containing phase information about E and F signals.
Abstract: A Digital Phase Comparator has a simplified logic circuit in which Nand Circuits provide UP and DOWN signals containing phase information about E and F signals.

Patent
11 Jun 1991
TL;DR: In this paper, a broad operational range, automatic device for the change of frequency in the horizontal deflection of multi-synchronization monitors comprises an integrated circuit incorporating, a frequency meter being input and analog synchronization signal a phase comparator having two inputs and in turn receiving said synchronization signal on one input, a voltage-controlled oscillator adapted to output a signal whose frequency is depending on said voltage and operatively linked to an output of said phase comparators, and a counter connected with its input, on the one side, to the oscillator output, and on the other
Abstract: A broad operational range, automatic device for the change of frequency in the horizontal deflection of multi-synchronization monitors comprises an integrated circuit incorporating, a frequency meter being input and analog synchronization signal a phase comparator having two inputs and in turn receiving said synchronization signal on one input, a voltage-controlled oscillator adapted to output a signal whose frequency is depending on said voltage and operatively linked to an output of said phase comparator, and a counter connected with its input, on the one side, to the oscillator output, and on the other side, to the meter output, said counter having an output connected to the other input of the phase comparator also forming the integrated circuit output

Patent
09 Oct 1991
TL;DR: In this paper, a comparator is used to determine whether an oscillator is operating normally or not through comparison of an output from the comparator, for comparing a feedback signal from an oscillators with a reference signal and oscillating the oscillator automatically, with another reference signal.
Abstract: PURPOSE:To enhance reliability by making a decision whether an oscillatory gyroscope is operating normally or not through comparison of an output from a comparator, for comparing a feedback signal from an oscillator with a reference signal and oscillating the oscillator automatically, with another reference signal. CONSTITUTION:AC voltage from a multiplier 5 in a driver 4 is applied through impedance element Z1, Z2 onto piezoelectric elements 2a, 2b thus driving an oscillator 3 while AC voltage from the multiplier 5 is applied through other impedance elements Z3, Z4 onto capacitive elements C1, C2. Output from a comparator 10 in the driver 4 is fed to one input terminal of a comparator 19 having the other input terminal for receiving a reference signal from a reference voltage source 20. The comparator 19 compares output from the comparator 10 with a predetermined range defined by the reference signal from the reference voltage source 20 thus diagnoses operation of an oscillatory gyroscope.

Patent
Ikeda Masaharu1
30 Dec 1991
TL;DR: In this article, a comparator device is designed for comparing the signal levels of first and second input signals to provide respective of resultant comparator outputs independently, which comparator devices are featured in avoidance of occurrence of simultaneous low levels of the comparator signals at all possible conditions of the outputs.
Abstract: A comparator device is designed for comparing the signal levels of first and second input signals to provide respective of resultant comparator outputs independently, which comparator device is featured in avoidance of occurrence of simultaneous low levels of the comparator signals at all possible conditions of the comparator outputs. The comparator device includes first and second comparator which independently output resultant comparator outputs either of H level and L level as results of comparison of the signal levels of the first and second input signals with taking one of the input signals as reference, and have offset characteristics and hysteresis characteristics so that the comparator outputs, either H level or L level can be fixedly determined when the first and second input signal levels are equal to each other. The first input signal is applied to one of the input terminal of the first comparator and the other input terminal of the second comparator with different polarity, and the second input signal is applied to the other input terminal of the first comparator and one of the input terminal of the second comparator with different polarity.

Patent
12 Oct 1991
TL;DR: In this article, a sensor arrangement for detecting the movement of a machine part has a row of ferromagnetic teeth and a Hall generator responding to the presence or absence of teeth.
Abstract: A sensor arrangement for detecting the movement of a machine part has a row of ferromagnetic teeth and a Hall generator responding to the presence or absence of teeth. The Hall generator is connected to an evaluation circuit contg. an operational amplifier (IV1), a comparator (IV2) and an end stage generating at least one control signal. The output of the operational amplifier is connected directly to one comparator input. The other comparator input is connected via a low-pass RC element (R14, C5) influenced transiently by a charge circuit (R9-11, C4, T2) each time the sensor is activated. USE/ADVANTAGE - sensor is rapidly activated and noise influences such as temp. variations and component tolerances are automatically compensated.

Patent
Ruediger Graf1, Harald Schmidt1
26 Sep 1991
TL;DR: In this article, the switching point of a sensor oscillator can be automatically set without use of expensive mechanical adjustment of rail contacts on railway by using a comparator that prevents the input of further clock pulses to the counter when the resistor network voltage reaches a particular value.
Abstract: The sensor equipment includes an oscillator (OSZ) whose output is fed through a network (R4,C4) to a comparator (SK). The other comparator input is provided with a reference voltage (UR) derived from the output resistor network (RN) of a counter (Z). The comparator outputs the sensor signal. The output voltage from the resistor network (UR) is also conveyed to a further comparator (AK) whose other input is connected to the output of the R,C network from the oscillator. This comparator prevents the input of further clock pulses to the counter when the resistor network voltage reaches a particular value, to set the switching sensitivity of the sensor. ADVANTAGE - Switching point of sensor oscillator can be automatically set without use of expensive mechanical adjustment of rail contacts on railway.

Patent
08 Jan 1991
TL;DR: In this paper, a test circuit for testing lamps in a system monitor for a hot water heater is presented, where a timer is connected in the circuit to the control input to provide a timed drive signal to a power switch unit connected to the comparator amplifier for energizing all of the lamps.
Abstract: A test circuit for testing all lamps in a system monitor for a hot water heater. The comparator includes a amplifier having a reference input connected to a reference voltage and a second control input connected to power through a plurality of different circuit elements in a voltage coupling network. A timer is connected in the circuit to the control input to provide a timed drive signal to a power switch unit connected to the comparator amplifier for energizing all of the lamps. The timer is a simple resistor-capacitor network with the comparator connected to the signal control input. The signal branch circuit includes components selectively inserted to produce a test signal to the timer and comparator amplifier. A thermostat monitor is connected by a diode to the comparator amplifier and a demand for hot water creates a turn-on signal to the comparator for the period of the timer to energize all lamps for a short period at the initiation of the demand. A diode selectively connects the power line to the comparator amplifier and turns on all the lamps for the period of the timer. A direct manual control is connected to the power switch for manufal testing of the lamps.

Journal ArticleDOI
TL;DR: In this article, a nonlinear transformer that can be used to isolate a source from the measuring device is presented, and a simple RL oscillator constructed with this transformer and a comparator is discussed.
Abstract: A nonlinear transformer that can be used to isolate a source from the measuring device is presented. A simple RL oscillator constructed with this transformer and a comparator is discussed. The oscillator uses a 220 Hammond pulse transformer and a LF356 operational amplifier with +or-12 V power supply voltage. Using a fast comparator and a small ferrite core transformer will yield a more versatile circuit. Ultimately, the multivibrator can work at frequencies to 30-40 kHz, and an electromagnetically-coupled isolation amplifier can be developed. >

Patent
Ruediger Graf1, Harald Schmidt1
26 Sep 1991
TL;DR: In this article, a remote processor is used to determine at which count position (Z1) the comparator has switched from the output signal of a comparator, from which the remote processor can deduce at which position the counter has switched.
Abstract: The sensor equipment includes an oscillator (OSZ) connected to a comparator (SK) whose output (USK) is conveyed to a remote processor. The processor supplies the clock pulse for switching a counter (Z). The counter has a resistor network (RN) at its output whose output is converted to a voltage (UR). A reference voltage (URX) is derived from the resistor network voltage (UR) and is compared with the output of the oscillator. From the output signal of the comparator the remote processor can deduce at which count position (Z1) the comparator has switched. ADVANTAGE - Operated without mechanical parts on rail.

Patent
13 May 1991
TL;DR: In this article, the authors present a circuit arrangement for ignition and operation of a high pressure gas discharge lamp (GEL) for motor vehicles, which includes a desired power value determining device (LS) coupled to a first input of an integrating comparator (K) whose second input is coupled to an output of a multiplier.
Abstract: In a circuit arrangement for ignition and operation of a high pressure gas discharge lamp (GEL) for motor vehicles include: a desired power value determining device (LS) coupled to a first input of an integrating comparator (K) whose second input is coupled to an output of a multiplier; a switching device (S) which couples either a phase comparator or the integrating comparator (K) with a voltage control oscillator; and a status recognition device (ST), coupled with a current measuring device, for controlling the switching device which when the high pressure gas discharge lamp is not ignited couples the oscillator with the phase comparator and which when the high pressure gas discharge lamp is ignited couples the oscillator with the integrating comparator.

Book ChapterDOI
01 Jan 1991
TL;DR: In this article, it is shown that the resolution of a latched comparator is a function of the clock feed-through and the transistor mismatches, and the advantages of the OTA-latch structure are analyzed.
Abstract: In this chapter, CMOS comparator structures have been discussed. It is shown that an OTA can only be used for low frequency applications. If a fast response time is required, latched comparators must be employed. It is shown that the resolution of a latched comparator is a function of the clock feed-through and the transistor mismatches. To overcome those problems the advantages of the OTA-latch structure are analyzed. The effect of clock feed-through and transistor mismatch can now be reduced by increasing Gm. This can best be achieved by designing the input stage at the boundary of strong inversion (Vgs-Vt ≈ 200mV). As a result the accuracy of the comparator is reduced approximately to the offset voltage of a differential pair. The speed of this comparator is approximately equal to a loaded inverter. Hence accurate high speed comparators can be obtained.

Patent
10 Jan 1991
TL;DR: In this article, a trigger input (E1) coupled via a capacitor (C3), resistor (R11, R12), and diode (D1) to one input of a comparator (S2) is presented.
Abstract: The circuit has a trigger input (E1) coupled via a capacitor (C3), resistor (R11, R12) and diode (D1) to one input of a comparator (S2). A second input receives a request signal (E2) that is coupled to a similar arrangement (S3). The positive supply voltage (UST) connects with the positive inputs of both comparators. Outputs of the comparators connect with a third comparator (9). The comparator generates an output that is a reset for a processor whenever there is not a trigger signal or if fault triggering occurs. USE/ADVANTAGE - Esp. in vehicle for airbag system or for seatbelts. Provides reset when fault occurs in processor.

Patent
13 Aug 1991
TL;DR: In this article, a circuit for monitoring the potential level on electrical conductors contains a comparator with controllable switching hysteresis and a delay element connected after the comparator.
Abstract: A circuit for monitoring the potential level on electrical conductors contains a comparator with controllable switching hysteresis and a delay element connected after the comparator. The comparator's switching threshold is shifted according to the output of the delay element. Alternatively, the circuit can contain at least two comparators (ST1a-ST1n) whose outputs are each connected to an input of a logical combination circuit (AND1) which drives a delay element (VG). Each comparator's threshold is shifted according to the output signals of the comparator and of the delay element. ADVANTAGE - Can respond to potential changes.

Journal ArticleDOI
TL;DR: In this paper, the design of a new type of latching voltage comparator ZJ03 is described, which contains a controlled positive feedback amplifler and is capable of realizing high speed and high precision.
Abstract: The design of a new type of latching voltage comparator ZJ03 is described. The common voltage comparators consist of multistage DC ampliflers, for which it is difficult to realize high speed and high precision. The ZJ03 comparator contains a controlled positive feedback amplifler. Therefore, it is capable of realizing high speed and high precision. For improving the performance and producibility, the tolerance extension, design centering and potential adapting techniques are used in the design of comparator ZJ03.

Patent
06 Jun 1991
TL;DR: In this article, four comparators (K1,K2,K3,K4,K5,K6,K7,K8) and four low pass filters (TP1,TP8) are used to suppress l.f. noise.
Abstract: Four comparators (K1,K2,K3,K4) are used to monitor positive working voltages (+U1,+U2,+U3,+U4) and a further four comparators (K5,K6,K7,K8) monitor negative working voltages (-U5,-U6,-U7,-U8). The comparators (K1...K8) compare all working voltages with reference voltages (Ur1,Ur3) that have been derived from a single reference source (REF). Comparator outputs are commoned together and trigger an alarm in the output unit (A) should an over or under voltage condition occur. Low pass filters (TP1...TP8) ar eused on all working voltage inputs to suppress l.f. noise. A coupling network (MKW) is used to maintain a constant comparator hysteresis switching level, independent of the working and supply voltages, when response threshold of the comparators (K1...K8) are set up using the input resistors (R1...R8). USE/ADVANTAGE - Circuit can be easily formed as modules. Comparator response threshold level determined by single input resistor.