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Comparator applications

About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.


Papers
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Patent
Chia-Liang Tai1, Alan Roth1, Eric Soenen1
30 Nov 2010
TL;DR: In this article, a hysteretic power converter includes a comparator, a calibration circuit, and an output node having an output voltage, and the calibration circuit is configured to supply a calibrated voltage to the comparator.
Abstract: A hysteretic power converter includes a comparator, a calibration circuit, and an output node having an output voltage. The calibration circuit is configured to supply a calibrated voltage to the comparator. The comparator controls the output voltage based on the calibrated voltage and a feedback voltage representing at least a portion of the output voltage.

14 citations

Journal ArticleDOI
TL;DR: In this article, an offset cancellation technique for a SAR (successive approximation register) ADC switched-capacitor comparator is described, with a pre-amplifying and regenerative latching structure and realized in 0.18 μm CMOS.
Abstract: An offset cancellation technique for a SAR (successive approximation register) ADC switched-capacitor comparator is described. The comparator is designed with a pre-amplifying and regenerative latching structure and realized in 0.18 μm CMOS. With the first stage preamplifier offset cancellation and low offset regenerative latching approach, the equivalent offset of the comparator is reduced to < 0.55 mV. By using the pre-amplifying and regenerative latching comparison mode the comparator exhibits low power dissipation. Under a 1.8 V power supply, with a 200 kS/s ADC sampling rate and 3 MHz clock frequency, a 13-bit comparison resolution is reached and less than 0.09 mW power dissipation is consumed. The superiority of this comparator is discussed and proved by the post-simulation and application to a 10 bit 200 kS/s touch screen SAR A/D converter.

14 citations

Patent
30 Jan 1978
TL;DR: In this article, a multi-input signal comparator and indicator circuit for comparing a plurality of signal levels with a reference level and an indicator circuit arranged to respond to a comparator output signal for indicating an error in any of the comparator input signals.
Abstract: A multi-input signal comparator and indicator circuit for comparing a plurality of signal levels with a reference level and an indicator circuit arranged to respond to a comparator output signal for indicating an error in any of the comparator input signals. A high and a low comparator is used for each input signal to provide a "window" comparison while separate indicators provide a readout of high and low errors.

14 citations

Patent
22 Oct 1979
TL;DR: In this article, a voltage comparator for comparing a modulated light intensity signal with a reference voltage, and a bias controlling device which feeds a differential signal between mean value signal of the output of the voltage comparators and mean value signals of the inverted output of an optical modulator as a bias voltage, to an electro optical modulation system.
Abstract: An electro optical modulation system utilizes electro optical effect of a crystal. The electro optical modulation system comprises a voltage comparator for comparing a modulated light intensity signal with a reference voltage; and a bias controlling device which feeds a differential signal between mean value signal of the output of the voltage comparator and mean value signal of the inverted output of the voltage comparator, to an optical modulator as a bias voltage.

14 citations

Patent
Tsung Dai Mok1
04 Oct 1990
TL;DR: In this paper, a multistage voltage comparator with multiplicative transfer stages between successive comparator stages is described, where each transfer stage includes capacitors connected between the outputs of one stage and the inputs of the next stage.
Abstract: A multistage voltage comparator having plural transfer stages between successive comparator stages. Each transfer stage includes capacitors connected between the outputs of one stage and the inputs of the next stage. The capacitors are also connected to a reference voltage line via MOS transistor switches. The switches are characterized by progressively slower turn-off times for each successive transfer stage so that turn off is sequential. The comparator is a differential amplifier with two complementary inputs and outputs. The complementary outputs of the final stage are loaded into a latch and then transferred to an RS flip-flop providing a digital logic output representative of at least a quantization step difference in the inputs to the first comparator stage.

14 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202319
202269
20185
201747
201687
2015100