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Comparator applications

About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.


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Patent
Jong-Haeng Lee1
08 Dec 2006
TL;DR: A modulation system and method having a high linearity as discussed by the authors is a PWM modulator or a class D amplifier and includes an integrator, a low pass filter (LPF), a comparator, and an output circuit.
Abstract: A modulation system and method having a high linearity. The system is a PWM modulator or a class D amplifier and includes an integrator, a low pass filter (LPF), a comparator, and an output circuit. The LPF is located before the comparator. Jitter noise produced by the comparator and/or switching noise of the output circuit are removed by feedback to the input. Thus, the linearity of the modulation system is provided.

13 citations

Patent
Kwang-Hyun Lee1
04 Jan 2007
TL;DR: In this article, an analog-to-digital converter in an image sensor is implemented with a plurality of comparator units, each comparator unit has a respective capacitor array and respective switches integrated therein.
Abstract: An analog-to-digital converter in an image sensor is implemented with a plurality of comparator units. Each comparator unit has a respective capacitor array and respective switches integrated therein. Such capacitors and switches across the comparator units are operated for generating ramp voltages for such comparator units for performing analog-to-digital conversion with correlated double sampling. Thus, circuit area and power consumption of the CMOS image sensor may be minimized.

13 citations

Patent
Walter J. Pohl1
12 Jul 1978
TL;DR: In this article, a circuit for protecting single phase induction motors of the type having a start winding connected in series with a start/run capacitor is presented. But it does not specify the operation of a motor-protecting relay to disengage the motor from its driving source when the bridge becomes balanced.
Abstract: A circuit for protecting single phase induction motors of the type having a start winding connected in series with a start/run capacitor. The circuit contains a resistance bridge wherein the motor start winding forms one leg thereof. A d.c. signal is applied to the input terminals of the bridge. A filter is connected to the output terminals of the bridge so that a relatively ripple free d.c. output signal from the bridge can be applied to the positive input terminal of a d.c. comparator, the negative terminal of which is connected to d.c. reference ground. A reference resistor in a leg of the bridge adjacent the start winding is selected so that the bridge is unbalanced to present a positive d.c. signal to a terminal of the comparator so long as the resistance value of the start winding is less than the value of the reference resistor. An excessive temperature increase of the start winding raises its resistance to equal that of the reference resistor to cause the bridge to balance when the temperature of the start winding reaches a predetermined maximum value, whereupon the comparator switches from a conductive to a non-conductive state. An SCR connected to the comparator output controls the operation of a motor-protecting relay to disengage the motor from its driving source when the bridge becomes balanced and when the comparator switches from one output state to another. A re-start button connected across the SCR permits re-start of the motor after it has been disengaged from its driving source by operation of the comparator.

13 citations

Patent
16 Jan 1976
TL;DR: In this paper, a variable thresholding circuit for converting an analog signal to a binary signal comprises a comparator to which signals to be converted are applied and a threshold circuit coupled with the comparator in order to provide the threshold level, so that the signals applied to the comparators are converted into binary signals in accordance with the threshold levels.
Abstract: A variable thresholding circuit for converting an analog signal to a binary signal comprises a comparator to which signals to be converted are applied and a threshold circuit coupled with the comparator in order to provide the threshold level of the comparator, so that the signals applied to the comparator are converted into binary signals in accordance with the threshold level. The threshold level corresponding to the output of the threshold circuit is compensated in accordance with the variations of the levels of the signals applied to the comparator. The threshold level of the comparator is changed to a compensated level when the result calculated from the threshold level and the signals applied to the comparator is smaller than a predetermined value, whereas the threshold level of the comparator is not changed to the compensated one when the result calculated from the threshold level and the signals applied to the comparator is larger than that and the compensation is repeated until the calculated result becomes smaller than the predetermined value.

13 citations

Patent
15 Mar 2005
TL;DR: In this paper, a switch mode power converter is provided, which includes a switching cell with a supply input, an output and a control input, and the output is connected to the control input of the switching cell.
Abstract: A switch mode power converter is provided which includes a switching cell with a supply input, an output and a control input. A summing comparator has first and second differential input pairs and an output. The output is connected to the control input of the switching cell. An oscillator provides a periodic waveform that is applied to a first one of the inputs of the first differential input pair of the summing comparator. An adjustable reference voltage source provides an adjustable reference voltage a predetermined fraction of which is applied to a second one of the inputs of the first differential input pair of the summing comparator. An error amplifier has differential outputs coupled to the second pair of differential inputs of the summing comparator and a differential input pair. A first input of the differential input pair is coupled to the output of the switching cell, and the adjustable reference voltage from the adjustable reference voltage source is applied to a second input of the differential input pair. Thus, the desired DC voltage is scaled to produce a DC reference for the comparator which generates the desired duty cycle for the pulse signal that drives the switching cell, and thus the desired regulated output voltage, with only minor corrections required across the error terminals to correct small parasitic terms.

13 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202319
202269
20185
201747
201687
2015100