Comparator applications

About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.

DC-to-DC converter operating in a discontinuous mode

Abstract: A converter employs a comparator sensing the current through an output diode, for generating a confirmation signal of an OFF state of the switch until the discharge current of the inductor toward the user circuit and the external filter capacitance has become null, thus ensuring the operation in a discontinuous mode under any condition. A turn-off signal of the switch is provided by another comparator which, instead of the voltage on a sensing resistance connected in series with the switch, may sense the voltage across the switch itself. This latter embodiment is particularly suited in case of an output MOS transistor and the circuit comprises means for masking for a preset period of time the turn-off signal produced by said comparator, in order to allow a predefined turn-on phase of the switch. Enabling of the turn-on of the switch is conventionally provided by a dedicated (third) comparator of the output voltage. The circuit does not require the use of an error amplifier, for the compensation of which special complex integratable circuits or alternatively access to the output node of the error amplifier through a dedicated pin may be needed. Neither a local oscillator for turning off the switch is needed. The circuit is simple and suited for integration in large complex system chips, where there is a limited availability of pins and silicon area. Different embodiments are described.

Random binary number generator

Abstract: A random number generator includes a plurality of fully differential amplifiers (30) configured as a ring oscillator (22). The output of the ring oscillator (22) is input to a comparator/latch circuit (32) for determining the zero crossing for the ring oscillator. The ring oscillator is a self-oscillating structure that has an oscillation frequency with jitter superimposed thereon. This jitter is a result of the internal thermal noise associated with the integrated circuits that are utilized to realize the amplifiers (30). Each of the amplifiers (30) that make up the ring oscillator operate on a substantially constant current and are subsequently isolated from changes in the power supply. As such, the variations in the frequency thereof are caused solely by thermal noise. The comparator/latch circuit (32) is operable to compare the difference on the output of the last stage of the ring oscillator (22) and the output of the comparator/latch (32) is then sampled by a CPU (12) that is operated on a separate master clock (18). This allows the master clock (18), upon which the sample operation is based, to be completely separate from the ring oscillator (22).

A 5.8 nW CMOS Wake-Up Timer for Ultra-Low-Power Wireless Applications

Abstract: This work presents an ultra-low-power oscillator designed for wake-up timers in compact wireless sensors. In a conventional relaxation oscillator, a capacitor periodically resets to a fixed voltage using a continuous comparator, thereby generating an output clock. The reset is triggered by a continuous comparator and thus the clock period is dependent on the delay of the continuous comparator which therefore needs to be fast compared to the period, making this approach power hungry. To avoid the power penalty of a fast continuous comparator, a constant charge subtraction scheme is proposed in this paper. As a constant amount of charge is subtracted for each cycle, rather than discharging/charging the capacitor to a fixed voltage, the clock period becomes independent of comparator delay. Therefore, the high power continuous comparator can be replaced with a coarse clocked comparator, facilitating low-power time tracking. For precise wake-up signal generation, an accurate continuous comparator is only enabled for one clock period at the end of the specified wakeup time. A wake-up timer using the proposed scheme is fabricated in a 0.18 µm CMOS process. The timer consumes 5.8 nW at room temperature with temperature stability of 45 ppm/°C (-10 °C to 90 °C) and line sensitivity of 1%/V (1.2 V to 2.2 V) .

Data clock recovery PLL circuit using a windowed phase comparator

Abstract: A data and clock recovery phase locked loop circuit comprises a data transition detector block to detect transitions of random input data and to produce a window signal. A delay block delays the random input data to produce delayed random input data. A phase comparator block is connected to the delay block and compares phase of the delayed random input data with phase of a feedback signal to produce a phase compared signal. A charge pump block is connected to the phase comparator block and produces output voltage in response to the phase compared signal. A filter block is connected to the charge pump block to filter the output voltage into DC voltage. A voltage controlled oscillator is connected to the filter block to generate the clock signal which has a frequency depending on the DC voltage. A multiplexer block is connected to the voltage controlled oscillator, the data transition detector block, and the phase comparator block and selects one from a predetermined logical level and the clock signal to supply a selected signal to the phase comparator block as the feedback signal.

Circuit for actuating a display with an improved comparator

Abstract: In a display circuit for actuating a display having plural liquid crystal segments or luminescent diodes, an improved comparator is provided for determining the number of the display segments to be energized and activated in accordance with an analogue input voltage. The analogue input voltage is applied to one terminal of a resistance having plural resistors connected in series, the other terminal of which is grounded. The comparator is composed of an integrated circuit of MOS type which has plural logical circuits. Each of one input terminals of the logical circuits is connected to a corresponding one of junctions of the resistors connected in series. Each logical circuit of the comparator provides "1" output signal when the voltage at the corresponding junction exceeds a threshold value thereof. An actuator, which is constructed with exclusive OR gates or transistors, energizes the liquid crystal segments or the luminescent diodes in response to the "1" output signals from the comparator.