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Comparator applications

About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.


Papers
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Patent
Jose L. Cordoba1
12 Oct 2001
TL;DR: In this paper, a phase-locked loop with a voltage-controlled oscillator and a power amplifier was proposed to restore the amplitude information contained in the feedback signal provided by the down-converter.
Abstract: A transmitter has a quadrature modulator that provides a modulated signal at a first frequency. The transmitter has a phase locked loop, of which a voltage controlled oscillator is coupled after the phase comparator of the phase locked loop, and further has a power amplifier in the transmit signal path of the transmitter. The phase locked loop further has a down-converter in the feedback path, from the output of the power amplifier, and a feedback input to the phase comparator. The transmitter further has an amplitude restoration arrangement, that restores amplitude information contained in the feedback signal provided by the down-converter. In operation, the phase locked loop replicates, at the carrier frequency, angle information contained in the quadrature modulated signal, and the amplitude restoration arrangement controls the gain of the transmit power amplifier such that input signals at the phase comparator substantially are equal.

12 citations

Patent
30 Dec 2010
TL;DR: In this paper, a comparison system including a dynamic comparator, a background offset calibration circuit, and an asynchronous reset timing control circuit is presented, where calibration signals are used to calibrate the input refer offset of the dynamic comparators.
Abstract: A comparison system including a dynamic comparator, a background offset calibration circuit, and an asynchronous reset timing control circuit is presented. The background offset calibration circuit is coupled to the dynamic comparator, and generates calibration signals in response to reference switching control signals. Where calibration signals are used to calibrate the input refer offset of the dynamic comparator. The asynchronous reset timing control circuit is coupled to the dynamic comparator and the background offset calibration circuit, and generates a control clock signal and the reference switching control signals in response to the output signals of the dynamic comparator and a plurality of basic clock signals. During each clock cycle of the first basic clock signal, the control clock signal is used to control the dynamic comparator to perform two data comparison, one for the input refer offset and the other for a differential input signal.

12 citations

Patent
Yoshiyuki Hojo1
20 Jan 2005
TL;DR: In this paper, a voltage source 20 is provided at the inverting input terminal of the comparator 4 so that an offset voltage is added to the voltage value to be inputted to the input terminal.
Abstract: After a current value flowing through a coil L is detected, it is converted into a voltage value, is then inputted to an inverting input terminal of a comparator 4 , and is then compared with a voltage indicating the difference between the value of a fed back output voltage and a reference voltage. A voltage source 20 is provided at the inverting input terminal of the comparator 4 so that an offset voltage is added to the voltage value to be inputted to the inverting input terminal of the comparator 4.

12 citations

Patent
16 Apr 2004
TL;DR: In this article, a process variation compensation circuit and method including a threshold voltage detector circuit, a comparator network, and a circuit block is presented, where the comparator receives the output signal and generates responsive logic signals that are indicative of the output.
Abstract: A process variation compensation circuit and method including a threshold voltage detector circuit, a comparator network, and a circuit block. The threshold voltage detector circuit is configured with at least one transistor that is manufactured during a process. The threshold voltage detector generates an output signal dependant on variations in the process. The comparator network is coupled to the threshold voltage detector. The comparator network receives the output signal and generates responsive logic signals that are indicative of the output signal. The circuit block is coupled to the comparator network and includes at least one transistor manufactured from the process. The circuit block is configured to receive the logic signals and to adjust the circuit block according to the received logic signals.

12 citations

Patent
Kazuo Hasegawa1
12 Sep 1989
TL;DR: An encoder has a positive feedback means for feeding back a polarity-inverted output signal to a comparator or an MR sensor circuit thereby to stabilize output waveform duty ratio against deviation between the sensor circuit and comparator in source voltage.
Abstract: An encoder has a positive feedback means for feeding back a polarity-inverted output signal to a comparator or an MR sensor circuit thereby to stabilize output waveform duty ratio against deviation between the sensor circuit and comparator in source voltage.

12 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202319
202269
20185
201747
201687
2015100