Comparator applications

About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.

Magnetic sensor signal detection circuit using a counter

Abstract: A signal detection circuit of a magnetic sensor includes a differential amplifier to which an output voltage of a detecting coil of the magnetic sensor is applied; a comparator to which the output of the differential amplifier is input, the comparator outputting a digital signal having one logical value during a time period between two adjacent spike voltages included in the output voltage; and a counter that counts the number of pulses of a clock in a period when the output of the comparator has one logical value.

Comparator using differential amplifier with reduced current consumption

Abstract: A comparator circuit with reduced current consumption, and other circuits utilizing the same, are provided. The comparator circuit may achieve reduced current consumption by preventing current flow via a switching transistors responsive to the voltage level of the input signal.

Sense amplifier/comparator circuit and data comparison method

Abstract: A comparator circuit (40) includes a comparator network and a comparator enabling device (80) and may be integrated with a sense amplifier circuit (41). The comparator network is adapted to receive a complementary pair of reference data signals (B, B13) and a complementary pair of analog data signals (d1, d1b). An output of the comparator circuit (40) represents a comparison of the data represented by the reference data signals and the data represented by the analog data signals. The comparator output is generated in response to a comparator enable signal (SE) applied to the comparator enabling device (80) while the input data is applied to the comparator network. The comparator enable signal (SE) is applied at a time when the analog data signals (d1, d1b) have developed a minimum differential level.

Power factor improvement connection

Abstract: PROBLEM TO BE SOLVED: To provide a power factor improving circuit which can achieve higher efficiency in full load range, without enlarging the circuit scale, in a switching power source. SOLUTION: A multiplier 113 integrates voltage MULT which is obtained by dividing input voltage and voltage which is obtained via a comparator 117 from the voltage MO being obtained by dividing the output voltage. A comparator 112 compares the voltage CS geared to the current flowing to a MOS-FETQ1 with the multiplication results of the multiplier 113. An RS flip flop 115 takes a set reset action, based on the voltage which is obtained via a comparator 116 from the signal z/c signal outputted from the auxiliary winding Nc of the transformer T1 and the comparison results in the comparator 112, and performs the ON/OFF control of the MOS-FETQ1 via a driver 111. An OFF setting circuit 118 selects a current critical action or a current continuous action, based on the output voltage VGS and the z/c signal via an OSMV120. COPYRIGHT: (C)2007,JPO&INPIT

Background comparator offset calibration technique for flash analog-to-digital converters

Abstract: A background-calibrated comparator and a background-calibrated flash analog-to-digital converter are disclosed for using in mixed-signal integrated circuit design in particular on the high-speed analog-to-digital converter circuit. Without affecting the operation of the comparator, the disclosure is directed at reducing the unpredictable input offset voltage originated from the variation of process parameters and environmental factors. The background-calibrated comparator includes a random chopping comparator, a calibration processor, and a random sequence generator. The background-calibrated flash analog-to-digital converter (ADC) includes a background-calibrated comparator array together with a reference voltage generator, a thermometer code edge detector, and a set of digital encoders.