Topic
Comparator applications
About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.
Papers published on a yearly basis
Papers
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27 Jul 2000TL;DR: In this paper, a control circuit for a ring oscillator using an integrator and a comparator is presented, where the comparator generates a second square wave signal by comparing the triangular wave signal and a reference voltage.
Abstract: A control circuit for a ring oscillator uses an integrator and a comparator. The integrator receives a square wave signal as an input and provides a triangular wave signal as an output. The comparator generates a second square wave signal by comparing the triangular wave signal and a reference voltage. Duty cycle for the ring oscillator can be modulated by varying the reference voltage. For one embodiment of the control circuit, signal frequency of the ring oscillator can be modulated by varying biasing current for the comparator to set slew rate of the comparator. For one embodiment of the control circuit, a resistor and a capacitor form a simple RC circuit for the integrator. For an alternative embodiment of the control circuit, a resistor and an amplifier with a capacitor in a negative feedback loop form an active RC circuit for the integrator. For one embodiment of the control circuit, the comparator is an inverting comparator. A ring oscillator employing the control circuit can be formed using a plurality of inverters coupled in series with the control circuit. A test system can be formed by coupling an output buffer and the ring oscillator to a device-under-test and monitoring the ring oscillator frequency and device characteristics.
8 citations
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15 Dec 2006TL;DR: In this paper, a clock distribution circuit consisting of a comparator, a filter, a scaling unit, and an oscillator is described. And the scaling factor is less than 1.
Abstract: A clock distribution circuit and a method thereof. The clock distribution circuit comprises a comparator, a filter, a scaling unit, and an oscillator. The comparator compares a reference signal and a feedback signal to generate an error signal. The filter is coupled to the comparator and outputs a filtered signal based on the error signal. The scaling unit is coupled to the comparator, and scales down the filtered signal by a scaling factor to form a control signal. The oscillator is coupled to the scaling unit, and produces the feedback signal based on the control signal. And the scaling factor is less than 1.
8 citations
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07 Aug 2009TL;DR: In this paper, a comparator circuit includes a first comparator comparing an input signal to a first comparison value and generating a first determination signal, and an output selecting circuit selecting a signal generated first from the first determination signals and then outputting the selected signal as a determination signal.
Abstract: A comparator circuit includes a first comparator comparing an input signal to a first comparison value and generating a first determination signal, a second comparator comparing the input signal to a second comparison value different from the first comparison value and generating a second determination signal, and an output selecting circuit selecting a signal generated first from the first determination signal and the second determination signal, and outputting the selected signal as a determination signal.
8 citations
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01 Mar 2017
TL;DR: The main objective of this paper is to design and implement of magnitude comparator using different logic techniques and compared in terms of power consumption, propagation delay and transistor count.
Abstract: In the advanced technology low power, speed and size play a significant role specifically in the field of magnitude VLSI circuits. In this paper small power dissipation and less area over conventional 2-bit comparator is proposed and using this comparator a new style 12-bit comparator is proposed. The main objective of this paper is to design and implement of magnitude comparator using different logic techniques and compared in terms of power consumption, propagation delay and transistor count. The results of this paper are simulated on the EDA tanner tool realized in 45-nanometer technology at 0.7v supply voltage.
8 citations
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09 Nov 1967
8 citations