Topic
Comparator applications
About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.
Papers published on a yearly basis
Papers
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TL;DR: A high-speed low-power latched CMOS comparator circuit is presented and a mathematical model representing the noise in the device is developed and the comparator achieved 10-bit resolution on a 1 V differential input at 500 MHz speed and had a noise figure of 4.747 dB at this frequency.
Abstract: A high-speed low-power latched CMOS comparator circuit is presented Demonstrated is a circuit optimisation technique to obtain minimum offset error at 500 MHz sampling speed Also, a mathematical model representing the noise in the device is developed After optimisation, the comparator achieved 10-bit resolution on a 1 V differential input at 500 MHz speed and had a noise figure of 4747 dB at this frequency
30 citations
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01 Jul 1971-Journal of Research of the National Bureau of Standards, Section C: Engineering and Instrumentation
29 citations
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27 Jul 2006
TL;DR: In this paper, an offset signal is derived from a subtraction between the inputs of the PWM comparator, and the offset signals are injected into the comparator to cancel the output offset of the voltage regulator.
Abstract: In a low-gain current-mode voltage regulator having a PWM comparator in response to the varying output voltage and inductor current of the voltage regulator to produce a PWM signal to regulate the output voltage, an offset signal is derived from a subtraction between the inputs of the PWM comparator, and the offset signal is injected into the PWM comparator to cancel the output offset of the voltage regulator.
29 citations
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07 Apr 1995TL;DR: In this article, a comparator with a built-in hysteresis is described, which has a differential input stage, an output stage, and a bias circuit with a hystresis circuit.
Abstract: A comparator with a built-in hysteresis is disclosed The comparator has a differential input stage, an output stage, and a bias circuit with a hysteresis circuit The hysteresis circuit selectively applies a bias voltage to the differential input stage to achieve the hysteresis
29 citations
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24 Mar 1995TL;DR: In this article, a threshold comparator with an input terminal and an output terminal, and a voltage divider connected between a first supply voltage reference and a second voltage reference, is proposed to detect a drop in a supply voltage.
Abstract: A circuit for generating a reference voltage and detecting a drop in a supply voltage, comprising at least one threshold comparator having an input terminal and an output terminal, and a voltage divider connected between a first supply voltage reference and a second voltage reference and connected to the input terminal of the comparator, further provides for the output terminal of said comparator to be connected to the input terminal through at least one feedback network comprising at least one current generator. The feedback network further comprises a buffer block having an input terminal connected to said comparator and a first output terminal connected to a switch which is connected between a circuit node of said voltage divider and the second voltage reference.
29 citations