Comparator applications

About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.

Phase error processor circuit with a comparator input swapping technique

Abstract: A phase-locked loop having a phase error processor (PEP) circuit in which a phase error is provided to the PEP circuit in the form of a first pulse stream comprising pulses of a width dictated by the phase error between the incoming data and a local clock and a second pulse stream comprising pulses of a reference width. The circuit includes two integrators having outputs coupled to first and second inputs of a comparator, respectively. Switches couple the first pulse stream to the input of one integrator and the second pulse stream to the input of the other integrator during a first time window and reverse the connections during a second time window. The switches are controlled by a SWAP signal which alternates state at regular intervals. The output of the comparator is exclusive-ORed with the SWAP signal in order to invert the comparator output signal every other window so as to average any input offset error of the comparator or offset due to mismatch of the integrators evenly between the two pulse streams. The output of the exclusive-OR gate is coupled to the input of a D flip flop which is latched once per window. The output of the D flip flop is an UP/DOWN signal which controls an oscillator, which generates the local clock signal, to advance or retard the phase of the local clock in response to the condition of the UP/DOWN signal.

Hysteresis insensitive analog to digital converter system using a coarse comparator and a fine comparator

Abstract: An analog to digital converter system (10) is disclosed which comprises an SAR logic circuit (12) which controls capacitor array control switches (14) which themselves control a capacitor array (16). A top plate (18) of the capacitor array (18) is selectively coupled to a coarse comparator (24) and a fine comparator (26). The outputs of the coarse comparator (24) and the fine comparator (26) are input into an error correction circuit (28). In operation, the coarse comparator (24) is used to approximate a predetermined number of the most significant bits of the digital word to be output by the system (10) while the fine comparator (26) is used to approximate the remaining bits of the digital word. In this manner, the coarse comparator (24) alone is subjected to the high voltages which might cause errors as a results of the hysteresis effect in the threshold voltages of the MOSFETs used to construct the comparators. The voltage shift as a result of this hysteresis is not a significant factor for the bits generated by the coarse comparator and as such the system (10) may accomplish high resolution analog to digital conversions.

Electronic control system for an oven

Abstract: An electronic oven temperature regulator employing a comparator (U1B) to control energization of a relay (56,58) for cycling the oven heating unit (gas or electric) in response to comparison of an oven temperature sensor (23) output and a user selected reference temperature about which regulation is desired. A reversible polarity voltage regulator (R5, CR6) provides feedback from the comparator output to the input to provide a positive and negative hysteresis dead band about the selected regulation temperature for minimizing cycling or "hunting" of the heating unit. A fault comparator (6A) tracks the selected reference temperature to disable the heating element relay in the event of a short in the temperature sensor.

Buck Converter with Internal Ripple Compensation

Abstract: A buck converter with internal ripple compensation includes a comparator for generating a comparison result, a constant-on-time trigger coupled to the comparator for generating a trigger control signal according to the comparison result, a pre-driver coupled to the constant-on-time trigger for controlling a high side switch and a low side switch, an output module coupled to a first node and a signal output end, and a ripple compensation circuit coupled to the high side switch, the low side switch, the first node, and the comparator for generating a compensation signal outputted to the comparator.

Equalization of a transmission line signal using a variable offset comparator

Abstract: According to an embodiment, an equalization loop has a comparator with an input to receive a transmission line analog signal level. The comparator has a substantially variable offset that is controllable to represent a variable reference level. An output of the comparator provides a value that represents a comparison between the transmission line analog signal level and the variable reference level.