Comparator applications

About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.

Differential current conveyor based current comparator

Abstract: A New differential current conveyor based current comparator is presented in this paper. Differential current conveyor II (DCCII) is designed, modified, and exploited as a comparator with reduced propagation delay and power consumption. New DCCII decreases propagation delay and increases comparator accuracy considerably. Simulation results using Hspice and 0.18 μm CMOS technology with 1.8V supply voltage confirms a less than 0.63 ns propagation delay at ±1 μA input current. Average power dissipation in ±1 μA input current has a value of 300 μW.

Comparator circuit with variable hysteresis characteristic

Abstract: A comparator circuit including a reference-voltage generating unit for generating a variable reference voltage, and a comparator having a first input terminal to which an input signal is supplied and a second input terminal to which the variable reference voltage from the reference-voltage generating unit is supplied. The comparator circuit also includes additional-voltage generating unit for generating an additional voltage that varies in proportion to the variable reference voltage, and a switching unit that is connected to the additional-voltage generating unit and activated or deactivated in response to an output of the comparator. When the switching unit is deactivated, the input signal is supplied to the first input terminal of the comparator and the variable reference voltage from the reference-voltage generating unit is supplied to the second input terminal of the comparator. When the switching unit is activated, the additional voltage from the additional-voltage generating unit is added to the input signal, and the sum of the input signal and the additional voltage is supplied to the first input terminal of the comparator so that an interpretation processing of the comparator is performed with a variable hysteresis characteristic corresponding to the additional voltage that varies in proportion to the variable reference voltage.

Differential CMOS comparator for switched capacitor applications

Abstract: A differential input circuit for a switched capacitor CMOS voltage comparator is provided which minimizes offset voltages by configuring the load devices to utilize a single switched capacitor biasing network initialized from internally-generated bias voltages, while configuring the initialization switches for the differential input devices to also utilize internally-generated bias voltages such that the offset voltages are stored on the input capacitors. The power supply rejection performance of the voltage comparator is also optimized by connecting parallel load devices of opposite switching topology such that the same input impedance is seen at both load terminals.

A new offset cancelled latch comparator for high-speed, low-power ADCs

Abstract: A new high speed, low power and high resolution comparator architecture is presented. Offset voltage cancellation on latch stage and eliminating the preamplifier stages before regeneration latch in conventional architectures is the key idea proposed in this paper. Equivalent input referred offset voltage is dramatically reduced by controlled negative feedback loop and negative resistance of regeneration latch. The Monte-Carlo simulation results for the designed comparator in 0.18µm CMOS process show that equivalent input referred offset voltage is 0.2mV at 1 sigma while it was 26mV at 1 sigma before offset cancellation. The comparator operates in 500MHz clock frequency while dissipates 600µW from a 1.8V supply.

A mixed-signal organic 1kHz comparator with low V T sensitivity on flexible plastic substrate

Abstract: This paper presents a comparator that is designed in an organic electronics technology on a flexible plastic substrate with p-type organic thin-film transistors (p-OTFT) only. The comparator has a gain of 12dB and works at a supply voltage of 20V consuming 9µA. At a clock frequency of 1kHz the input sensitivity is 200mV. The comparator is designed following a threshold-voltage V T insensitive strategy for analog and mixed-signal design in a way to get round V T variations of the pentacene based organic electronics technology. Measurements have been done in ambient environment. The circuits still function well after several weeks of exposure to ambient environment. This comparator can serve in organic smart sensor systems as an interface between analog sensor signals and digital circuitry or as a building block for more complex A-to-D converters.