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Comparator applications

About: Comparator applications is a research topic. Over the lifetime, 2518 publications have been published within this topic receiving 26639 citations.


Papers
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Journal ArticleDOI
TL;DR: In this article, a comparator that adjusts its own offset either at power-up or in response to a control input is presented, and the nature of the offset adjustment is such that the comparator is capable of continuous-time operation.
Abstract: Methods for reducing the input offset voltage of comparators and amplifiers are reviewed A comparator that adjusts its own offset either at power-up or in response to a control input is presented The nature of the offset adjustment is such that the comparator is capable of continuous-time operation Room-temperature offset in the range of -100 to +100 mu V are achievable Adjusted offsets exhibit a temperature coefficient on the order of -1 mu V/ degrees C >

78 citations

Patent
30 Mar 2000
TL;DR: In this article, a step-down switched-mode power supply circuit includes a transformer having at least one primary winding and at least two secondary winding, a current sensing device for sensing a current through a primary winding of the transformer, a first switch and a second switch, a comparator for determining if the current through the current sensing devices exceeds a threshold, a voltage regulator coupled to the secondary winding to produce a regulated voltage, a second comparator to determine if the regulated voltage has drooped below an acceptable level, and control circuitry for generating a signal having a fixed number of
Abstract: A step-down switched-mode power supply circuit includes a transformer having at least one primary winding and at least one secondary winding, a current sensing device for sensing a current through a primary winding of the transformer, a first switch and a second switch, a first comparator for determining if the current through the current sensing device exceeds a threshold, a voltage regulator coupled to the secondary winding to produce a regulated voltage, a second comparator for determining if the regulated voltage has drooped below an acceptable level, a counter coupled to the second comparator for generating a signal having a fixed number of switch cycles, and control circuitry for generating signals controlling the first switch and the second switch and responsive to the first comparator to enter a power saving mode disabling the signals, and to the second comparator to temporarily exit the power saving mode for a fixed number of cycles when the regulated voltage has drooped below an acceptable level.

76 citations

Patent
12 Feb 1996
TL;DR: In this paper, the comparator is transformed into a Schmitt trigger circuit having hysteresis memory, making it possible to chop the Hall element to substantially reduce the detector power consumption without loosing the hystresis feature.
Abstract: A low power magnetic-field detector, of the kind for detecting an ambient magnetic field that is greater than a predetermined field strength, is comprised of a Hail element, a transducer-voltage amplifier, and a zero-crossing comparator, all connected in tandem. A clock and switch are used to chop the energizing current to the Hall element. Alternatively, the amplifier and comparator are also chopped to further reduce power consumption. A clockable flip flop is synchronously enabled for an instant at the end of each period of energizing the Hall element. The comparator output signal is transferred to the flip flop Q output and held there during each period of not energizing the Hall element. A Positive-feedback hysteresis circuit adds a bias voltage to the amplified Hall voltage and is applied to the comparator input to effect comparator hysteresis with memory covering clock-period portions when the Hall element is not energized. The comparator is thus transformed into a Schmitt trigger circuit having hysteresis memory, making it possible to chop the Hall element to substantially reduce the detector power consumption without loosing the hysteresis feature.

74 citations

Patent
14 Sep 1993
TL;DR: In this article, an analog switch (4) connects a negative input of a comparator (3) to a reference voltage (Vthis article1 or another reference voltage Vthis article2) depending on a control signal (S5) from a timer (5).
Abstract: In an overcurrent protection circuit of a power device, an analog switch (4) connects a negative input of a comparator (3) to a reference voltage VREF1 or another reference voltage VREF2 depending on a control signal (S5) from a timer (5). A positive input of the comparator (3) receives voltage drop value (VS). The timer (5) is triggered by a leading edge of an input signal (IN) to output the control signal (S5) to the analog switch (4). The control signal (S5) directs the analog switch (4) to connect the reference voltage VREF2 to the negative input of the comparator (3) only during a transient state estimated period (T) and to connect the reference voltage VREF1 to the negative input of the comparator (3) out of the transient state estimated period (T).

73 citations

Journal ArticleDOI
TL;DR: In this paper, a fully differential BiCMOS comparator for data conversion, instrumentation, and communication systems operating at video frequencies and above is proposed. But the comparator is not suitable for application in data conversion.
Abstract: The design of a fully differential BiCMOS comparator suitable for application in data conversion, instrumentation, and communication systems operating at video frequencies and above is discussed. By exploiting the advantages presented by the integration of both bipolar and CMOS devices within the same technology, the comparator dissipates less power than conventional bipolar designs without sacrificing operating speed. The comparator includes an input stage that combines MOS sampling with a bipolar regenerative amplifier. This stage dissipates no static power and, because the amplification is provided by a bipolar differential pair, no offset cancellation is needed to achieve 8-b precision. Furthermore, the need for preamplification and the attendant power-delay penalty associated with preamplifier overdrive recovery are avoided. An experimental version of the comparator, consisting of the BiCMOS regenerative input stage followed by a current-switched latch, has been integrated in a 0.8- mu m BiCMOS technology with an area of 140*75 mu m. This circuit performs comparisons to a precision of 8 b at rates up to 200 MHz. The entire circuit dissipates only 1.6 mW at the maximum clock rate while operating from a single 5-V supply. >

70 citations


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Performance
Metrics
No. of papers in the topic in previous years
YearPapers
202319
202269
20185
201747
201687
2015100