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Showing papers on "Contact resistance published in 1996"


Journal ArticleDOI
TL;DR: In this article, W was found to produce low specific contact resistance (ρc∼8.0×10−5 Ω cm2) ohmic contacts to n+−GaN (n=1.5×1019 cm−3) with limited reaction between the metal and semiconductor up to 1000°C.
Abstract: W was found to produce low specific contact resistance (ρc∼8.0×10−5 Ω cm2) ohmic contacts to n+‐GaN (n=1.5×1019 cm−3) with limited reaction between the metal and semiconductor up to 1000 °C. The formation of the β–W2N and W–N interfacial phases were deemed responsible for the electrical integrity observed at these annealing temperatures. No Ga out‐diffusion was observed on the surface of thin (500 A) W contacts even after 1000 °C, 1 min anneals. Thus, W appears to be a stable contact to n+‐GaN for high temperature applications.

170 citations


Journal ArticleDOI
TL;DR: In this paper, a nonalloyed Ti/Al metallization has been found to form an Ohmic contact that has a specific contact resistance as low as 1.0×10−5 Ω cm2.
Abstract: On Si‐implanted n‐type GaN, a nonalloyed Ti/Al metallization has been found to form an Ohmic contact that has a specific contact resistance as low as 1.0×10−5 Ω cm2. The Ohmic character is believed to be caused by the 1120 °C implant activation anneal which generates nitrogen vacancies that leave the surface heavily n type. This theory is indirectly confirmed on unimplanted n‐type GaN by comparing the rc of nonalloyed Ti/Al on unannealed GaN with that of nonalloyed Ti/Al on 1120 °C annealed GaN. The former has rectifying electrical characteristics, while the latter forms an Ohmic contact with an rc=1.3×10−3 Ω cm2.

105 citations


Journal ArticleDOI
TL;DR: In this article, an analytical model is presented for the specific contact resistance and shown to be applicable for metal-semiconductor contacts consisting of titanium silicide (TiSi2) on n and p-type silicon.
Abstract: An analytical model is presented for the specific contact resistance and shown to be applicable for metal-semiconductor contacts consisting of titanium silicide (TiSi2) on n and p-type silicon. The model includes the influence of field emission and thermionic-field emission in a unified manner, requiring only one simple relation for determination of specific contact resistance when either of these conduction mechanisms dominates. Previously, depending on field emission or thermionic-field emission dominating, separate analytical models, consisting of different relations for the specific contact resistance, have been derived. Moreover, these derivations generally have resulted in rather complex expressions, with complicated terms that are not readily amenable for easy analysis and physical understanding. The present model, while simpler in form, captures the main elements affecting specific contact resistance as influenced by thermionic-field emission and field emission and compares well with experimental results for TiSi2Si contacts. The model is also applicable for other metal-semiconductor contacts, and has been used to generate theoretical curves for specific contact resistance doping concentration, for a range of barrier heights, for metal-silicon contacts. Moreover, due to its simpler form, this model may be conveniently used for extracting model parameters from experimental data, if necessary and it can be easily implemented and used in process and/or device simulation programs.

89 citations


Journal ArticleDOI
TL;DR: In this article, the authors report on doped AlGaN/GaN heterostructures with very high values of the sheet electron concentration (up to approximately 1.5×1013 cm−2), high Hall mobility (on the order of 800 cm2/Vs) and high sheet concentration•mobility product ( up to approximately 1016 1/Vs).
Abstract: We report on doped AlGaN/GaN heterostructures with very high values of the sheet electron concentration (up to approximately 1.5×1013 cm−2), high Hall mobility (on the order of 800 cm2/Vs) and high sheet concentration‐mobility product (up to approximately 1016 1/Vs). Transmission line model measurements of the contact resistance to these layers show that series resistance is considerably reduced by doping the GaN channel. A contact resistance of 2.3 Ω mm is demonstrated for the structure with the highest sheet carrier concentration, which corresponds to ≊8.8×10−5 Ω cm2 specific contact resistance.

84 citations


Journal ArticleDOI
28 May 1996
TL;DR: In this paper, a new formulation is proposed based on alternative Pb-free conducting filler powder and tailored polymer resins, which can be fused to achieve metallurgical bonding between adjacent particles as well as to a substrate.
Abstract: Electrically conducting adhesive technology is one of the alternatives being actively investigated for the possibility of replacing the solder interconnection technology used for microelectronics applications. An isotropically conducting adhesive consists of metallic filler particles dispersed in the matrix of a polymer resin. Silver-filled epoxy resin is commonly used for thermal conduction in die attach applications. Silver particles can provide electrical and/or thermal conduction, while epoxy provides adhesive bonding of the components to a substrate. This material has several limitations when it is-considered as a replacement for solder interconnections, such as low electrical conductivity, low joint strength, increase in contact resistance upon thermal cycling, lack of reworkability, and silver migration. In order to overcome these limitations, a new formulation is proposed based on alternative Pb-free conducting filler powder and tailored polymer resins. The conducting filler particles are coated with low melting point, non-toxic metals which can be fused to achieve metallurgical bonding between adjacent particles as well as to a substrate. This new conductive adhesive material has shown improved electrical and mechanical properties over the existing silver-filled epoxy materials.

77 citations


Journal ArticleDOI
01 Jan 1996-Analyst
TL;DR: In this paper, a method was described whereby the resistance of electrodeposited polymer films can be measured as they are grown, enabling films of pre-determined resistances to be produced.
Abstract: The sensitivity and response speed of the resistance changes of conducting polymer films when exposed to gases is increased if the film is thin and if the measurement of the response excludes the polymer-to-metal contact resistance at the electrodes of the sensor. A method is described whereby the resistance of electrodeposited films can be measured as they are grown, enabling films of pre-determined resistances to be produced. The principal cause of film resistance variation is differences in the time taken to bridge the gap between electrodes. The experiments reported here involve four-terminal measurements, which enable the effect of electrode contact resistance to be estimated and eliminated. The contact resistance between the polymer and metal electrodes is found to be up to 50% of the total resistance of the sensor, and less affected by exposure to a gas than is the polymer resistance. Four-terminal measurements of resistance therefore give the greatest sensitivity.

69 citations


Proceedings ArticleDOI
D.L. Smith1, A.S. Alimonda
28 May 1996
TL;DR: In this paper, the authors used sputterdeposition and standard lithography to fabricate arrays of cantilevered metal micro-springs on 80 /spl mu/m pitch, and obtained 100% electrical contact to 200-pad chips bonded face-down against them.
Abstract: We have used sputter-deposition and standard lithography to fabricate arrays of cantilevered metal micro-springs on 80 /spl mu/m pitch, and we have obtained 100% electrical contact to 200-pad chips bonded face-down against them. Four-point resistance is 0.38 /spl Omega/ for Mo-Cr springs on Al pads. Since the contacts themselves are not bonded and since the springs have high elastic compliance, this technology is very resistant to mechanical shock and stress, can accommodate large nonplanarity in mating surfaces, facilitates replacement of bad chips, and could be used for wafer-scale probing.

59 citations


Journal ArticleDOI
TL;DR: In this paper, the authors investigated the structural and electronic properties of thin films of Ni, Pd, and Cr/Au on p-GaN with a carrier concentration of 9.8 × 1016 cm−3 in terms of their as-deposited and following heat treatments up to 600°C (furnace anneals) and 900°c (RTA) in a flowing N2 ambient.
Abstract: Reactions between electron beam evaporated thin films of Ni/Au, Pd/Au, and Cr/Au on p-GaN with a carrier concentration of 9.8 × 1016 cm−3 were investigated in terms of their structural and electronic properties both as-deposited and following heat treatments up to 600°C (furnace anneals) and 900°C (RTA) in a flowing N2 ambient. Auger electron spectroscopy (AES) depth profiles were used to study the interfacial reactions between the contact metals and the p-GaN. The electrical properties were studied using room temperature current-voltage (1-V) measurements and the predominant conduction mechanisms in each contact scheme were determined from temperature dependent I-V measurements. The metallization schemes consisted of a 500 A interfacial layer of Ni, Pd, or Cr followed by a 1000 A capping layer of Au. All schemes were shown to be rectifying as-deposited with increased ohmic character upon heat treatment. The Cr/Au contacts became ohmic upon heating to 900°C for 15 seconds while the other schemes remained rectifying with lower breakdown voltages following heat treatment. The specific contact resistance of the Cr/Au contact was measured to be 4.3×10−1 Ωcm2. Both Ni and Cr have been shown to react with the underlying GaN above 400 °C while no evidence of a Pd:GaN reaction was seen. Pd forms a solid solution with the Au capping layer while both Ni and Cr tend to diffuse through the capping layer to the surface. All contacts were shown to have a combination of thermionic emission and thermionic field emission as their dominant conduction mechanism, depending on the magnitude of the applied reverse bias.

58 citations


Patent
19 Apr 1996
TL;DR: In this paper, a method and an apparatus for making low barrier height semiconductor devices with low barrier resistance is described. But the method is not suitable for high barrier height, and it requires the fabrication of an n-channel and p-channel device.
Abstract: Disclosed is a method and an apparatus for making devices with low barrier height. In fabricating an n-channel and p-channel devices, hemisphere grains, silicon crystal grains and metal silicide crystal grains are formed on a contact-hole or a gate electrode on an insulating film in each semiconductor element, so that it becomes possible to control the work function, to reduce the contact resistance, and to control the threshold voltage V th .

55 citations


Patent
01 May 1996
TL;DR: The test structures can include Kelvin structures, van der Pauw structures, resistors, capacitors, contact chains, via chains, serpentine test structures, and antenna test structures as mentioned in this paper.
Abstract: An interconnect for a semiconductor die includes integrally formed test structures for evaluating various electrical characteristics of the interconnect. The test structures can include Kelvin structures, van der Pauw structures, resistors, capacitors, contact chains, via chains, serpentine test structures, and antenna test structures. Among the electrical characteristics that can be evaluated are the resistivity of contact member, conductor and substrate components of the interconnect, contact resistance between the contact members and conductors and capacitance of the contact members and conductors with respect to the substrate.

53 citations


Patent
Douglas Chen-Hua Yu1, Pin-Nan Tseng1
28 May 1996
TL;DR: In this paper, a method for fabricating field effect transistors (FETs) with double silicide gate electrodes and interconnecting lines for CMOS circuits is described.
Abstract: A method is described for fabricating field effect transistors (FETs) having double silicide gate electrodes and interconnecting lines for CMOS circuits The method reduces the IR voltage drops and RC time delay constants, and thereby improves circuit performance The method consists of forming FETs having gate electrodes and interconnecting lines from a multilayer made up of a doped first polysilicon layer, a first silicide layer (WSi2), and a doped second polysilicon layer After patterning the multilayer to form the gate electrodes, a titanium (Ti) metal is deposited and annealed to form a second silicide layer on the gate electrodes, and simultaneously forms self-aligned Ti silicide contacts on the source/drain areas The latitude in overetching the contact openings in an insulating (PMD) layer to the gate electrodes extending over the field oxide area is increased, and the contact resistance (Rc) is reduced because of the presence of the WSi2 below the contact openings, even if the Ti silicide is completely removed during the contact etching

Journal ArticleDOI
TL;DR: In this paper, the effect of suicide materials and formation processes on suicide stability, junction consumption, the ability to accurately profile shallow junctions, and contact resistance in series with the channel is discussed.
Abstract: As device dimensions scale to the 0.1 urn regime, the self-aligned suicide (SALICIDE) contact technology increasingly becomes an integral part of both the ultra-shallow junction and the metal oxide semiconductor field-effect transistor device itself. This paper will discuss the effect of suicide materials and formation processes on suicide stability, junction consumption, the ability to accurately profile shallow junctions, and contact resistance in series with the channel. The use of suicides as diffusion sources (SADS) provides an important pathway toward optimization of suicide technology. Diffusion of boron and arsenic from nearly epitaxial layers of CoSi2, formed from bilayers of Ti and Co, offer good suicide stability, ultra-shallow, low-leakage junctions, and low contact resistance.

Journal ArticleDOI
TL;DR: In this article, a pressure-dependent model is developed to predict interparticle electric conduction by representing interbody contact resistance as the sum of constriction resistance and tunneling resistance, which is confirmed experimentally using 9-μm diameter spherical nickel particles under pressure.
Abstract: In order to understand and to be able to affect the efficiency of electrical conduction in particle-filled conductive adhesives, the mechanism of interparticle conduction is modeled theoretically and assessed experimentally. We predict and show that the electrical resistance of powders is dependent on the external pressure applied on them. A pressure-dependent model is developed to predict interparticle electric conduction by representing interparticle contact resistance as the sum of constriction resistance and tunneling resistance. The theoretical model developed is confirmed experimentally using 9-μm diameter spherical nickel particles under pressure.

Journal ArticleDOI
TL;DR: The most likely origin of the Ti on the diamond surface was determined to be lateral diffusion from beneath the contact pads, which would have produced a nonuniform concentration of Ti across the diamond surfaces which, in turn, would have affected the diamond sheet resistance in a complicated way.

Journal ArticleDOI
TL;DR: Ohmic contacts to n-type GaN grown by metalorganic chemical vapor deposition were formed using a Pd/Al-based metallization in this article, where a minimum contact resistance of 0.9 ohm-mm (specific contact resistance = 1.2 × 10−5 ohmcm2) was obtained upon annealing at 650°C for 30 s.
Abstract: Ohmic contacts to n-type GaN grown by metalorganic chemical vapor deposition were formed using a Pd/Al-based metallization. Ohmic contact resistances and specific contact resistances were investigated as a function of rapid thermal annealing temperature, Pd interlayer thickness, and annealing time. As-deposited Pd/AI was found to produce rectifying contacts while the metallization exhibited ohmic characteristics after annealing at temperatures as low as 400°C. A minimum contact resistance of 0.9 ohm-mm (specific contact resistance = 1.2 × 10−5 ohm-cm2) was obtained upon annealing at 650°C for 30 s. For comparison, Al and Ti/Al contacts were also investigated. Auger electron spectroscopy, secondary ion mass spectrometry, and x-ray diffraction were used to investigate metallurgical reactions.

Patent
03 Jun 1996
TL;DR: In this paper, a doping sequence that combines the use of patterned excimer laser annealing, dopant-saturated spin-on glass, and interference effects created by thin dielectric layers to produce source and drain junctions that are ultrashallow in depth but exhibit low sheet and contact resistance is presented.
Abstract: A doping sequence that reduces the cost and complexity of forming source/drain regions (11, 12) in complementary metal oxide silicon (CMOS) integrated circuit technologies. The process combines the use of patterned excimer laser annealing, dopant-saturated spin-on glass (21), silicide contact structures (18, 19), and interference effects created by thin dielectric layers to produce source and drain junctions (23, 24) that are ultrashallow in depth but exhibit low sheet and contact resistance. The process utilizes no photolithography and can be achieved without the use of expensive vacuum equipment. The process margins are wide, and yield loss due to contact of the ultrashallow dopants is eliminated.

Journal Article
TL;DR: In this article, the authors measured the contact resistance of several aluminum alloys with different surface conditions and under different applied loads, and concluded that the results of contact resistance tests may be influenced by the test procedure if large currents are used that develop a significant potential difference, > 0.2 V.
Abstract: The contact resistance of several aluminum alloys with different surface conditions was measured as a function of the applied current and under different applied loads. The magnitude of the contact resistance varied over a wide range of values, depending upon load and surface condition. Usually the contact resistance decreased with an increase in load, but if a surface lubricant was present, an increase in resistance was observed. Extensive plastic deformation occurred under the loading conditions imposed by the electrode tips. A cup and cone profile was found at the contact region of the faying surface after unloading. Under slowly varying currents, ∼1 Ms, electrical breakdown effects were observed when the potential across the surfaces was ∼0.2 V. The nature of the change was ascribed to metallic conduction and local fusion rather than oxide film breakdown. Under rapidly varying currents, ∼10 7 A/s, typical of a spot welding operation, the contact resistance was found to decrease to ∼20 pΩ within the first quarter cycle of weld current, irrespective of the initial surface condition of the aluminum alloy. Continued weld current inputs caused a further decrease in the contact resistance to ∼10 pΩ. It is concluded that the results of contact resistance tests may be influenced by the test procedure if large currents are used that develop a significant potential difference, >0.2 V, across the interface.

Journal ArticleDOI
TL;DR: In this article, the interface chemistry and electrical properties of annealed Ni 6H-SiC ohmic contacts have been compared using X-ray photoemission spectroscopy, current-voltage and resistance measurements by a four-point probe method.

Journal ArticleDOI
TL;DR: In this paper, the authors proposed a simple model to predict the effect of contact resistance on the thermal contact loss of an insulated pipe system, where spacers between the pipe and insulation, effectively producing a small air gap, were used to significantly alter the contact resistance.
Abstract: The thermal contact resistance is an important parameter in many heat loss problems. Determining the contact resistance for practical systems is quite complex due to the dependency of the relative geometry of the contacting surfaces. It is, therefore, difficult to make general contact resistance data available in the literature. In this paper, we first describe a simple model to predict the effect of contact resistance. This is followed by describing a simple device which can be used to measure thermal contact resistance for an insulated pipe system. The apparatus consists of a steel containment pipe exposed to saturated steam. The heat flux is determined by measuring steam condensate over a fixed period of time, while temperature measurements are obtained using standard type K thermocouples. The apparatus is calibrated using insulating materials with known thermal conductivities as they are necessary for the calibration and validation of the experimental setup. Once the device has been calibrated, the thermal contact resistance is determined for the insulating materials (standard fiberglass and calcium-silicate) using the electrical analog resistance method. It is shown also that the energy loss in a system may be affected by manipulating the contact resistance between the pipe and insulation. The effect of a small air gap to influence contact resistance is investigated. By placing spacers between the pipe and insulation, effectively producing a small air gap, we were able to significantly alter the contact resistance. A generalized optimization approach is also presented. The defined parameters are considered as a function of insulation cost and the cost due to the energy loss of the system.

Journal ArticleDOI
TL;DR: In this article, the electrical, structural and reaction characteristics of In-based ohmic contacts to n-GaAs were studied, and an attempt was made to form a lowband-gap interfacial phase of InGaAs to reduce the barrier height at the metal/semiconductor junction, thus yielding low-resistance, highly reliable contacts.

Journal Article
TL;DR: In this paper, a simple model was suggested and used for calculating the electrical and thermal response of the resistance spot welding process to investigate the influence of contacting forces on the formation of weld nuggets.
Abstract: The effect of contact resistance including constriction and contamination resistance has been a major hurdle for the thermoelectrical analysis of the resistance spot welding process. In this paper, a simple model was suggested and used for calculating the electrical and thermal response of the resistance spot welding process to investigate the influence of contacting forces on the formation of weld nuggets. The electrode surface of the contact interface was assumed to be axisymmetric and its microasperities to have a trapezoidal cross-section. These microasperities were considered as the one-dimensional contact resistance elements in the finite element formulation. The contamination film was assumed to be a nonconducting oxide layer, which is very brittle, so that it is broken to some number of pieces when a contacting pressure is being applied. The crushed films were assumed to be distributed at regular intervals and to conserve their size and number during the welding process. The simulation results revealed that the proposed model can be successfully used to predict the effect of the contact resistance on the electrical and thermal response of the resistance spot welding process.

Journal ArticleDOI
TL;DR: In this article, the authors investigated metallic point contacts between a tungsten tip and the superconducting heavy-fermion compounds and found that the contact resistance drops by δR with the inverse radius and specific resistivity in the normal state.
Abstract: The authors investigated metallic point contacts between a tungsten tip and the superconducting heavy-fermion compounds. On lowering the temperature to below T{sub c} the contact resistance drops by {delta}R. Usually this change in resistance is interpreted by the Andreev-reflection process at the normal-superconducting interface. However, the authors found that {delta}R does not scale with the inverse area of the orifice - as expected for Andreev reflection - but with the inverse radius and the specific resistivity in the normal state. Such a behaviour is characteristic for Maxwell`s resistance being suppressed in the superconducting heavy-fermion phase. Additionally, the residual contact resistance at zero-bias is strongly enhanced compared to the ballistic Sharvin contribution. They discuss the possible microscopic origin for the reduced or even absent Andreev-hole current and the enhanced residual resistance.

Patent
Tetsuya Taguwa1
21 Nov 1996
TL;DR: In this paper, a method of fabricating semiconductor devices which satisfactorily removes native oxide films and damaged layers which are formed on the surfaces of the conductor layers in the silicon substrates when contact holes are opened, and which tend to increase the contact resistances.
Abstract: A method of fabricating semiconductor devices which satisfactorily removes native oxide films and damaged layers which are formed on the surfaces of the conductor layers in the silicon substrates when contact holes are opened, and which tend to increase the contact resistances. A thin oxide film 5 is formed on the surface of a conductor region 3 in a silicon substrate 1 which is exposed at the bottom of the contact hole, and the oxide film 5 is then etched off with hydrogen-containing plasma. The native oxide film and/or damaged layer 3a, and the etching residue on the surface of the conduct layer 3 are satisfactorily removed, thus allowing provision of a contact structure with a low contact resistance regardless of whether the conductor type is P or N, without increasing the diameter of the contact hole.

Proceedings ArticleDOI
29 Jun 1996
TL;DR: In this paper, an InP-based resonant-tunneling high electron mobility transistor (RTHEMT) was proposed, which integrates a pseudomorphic In/sub 0.53/Ga/ sub 0.47/As-AlAs-InAs RTD into the source of a non-alloyed ohmic contact InAlAs/InGaAs HEMT.
Abstract: Resonant-tunneling transistors (RTTs) are emerging as promising functional devices for achieving high functionality and reduced circuit complexity in integrated circuits. Many RTTs have been proposed and demonstrated. Most of these concepts are based on integrating a resonant tunneling diode (RTD) structure into one or more terminals of conventional transistors. In this paper, we demonstrate an InP-based resonant-tunneling high electron mobility transistor (RTHEMT) which integrates a pseudomorphic In/sub 0.53/Ga/sub 0.47/As-AlAs-InAs RTD into the source of a non-alloyed ohmic contact InAlAs-InGaAs HEMT. Employing the non-alloyed ohmic contact cap layer structure in the HEMT significantly reduces the interconnection resistance between the RTDs and the HEMTs, and therefore, high P/V ratios and small hysteresis are maintained in the output characteristics. The device exhibits both pronounced negative differential resistance (NDR) and negative transconductance at room temperature. Most importantly, a near-flat valley current is obtained in the output I-V characteristics at certain gate voltages. This unique feature of flat valley current leads to the observation of pronounced negative transconductance throughout a wide bias range. As a result RTHEMTs can be used for many circuit applications.

Journal ArticleDOI
TL;DR: In this paper, the authors used the Rutherford backscattering spectroscopy (RBS) analysis of Al/Ti(N)/Ti/Si and Al/N/Si multilayer structures showed that Si does not diffuse out up to a sintering temperature of 550 °C.
Abstract: TiN layers prepared by reactive evaporation and rapid thermal annealing were tested as diffusion barrier between Al and Si. First, Rutherford backscattering spectroscopy (RBS) analysis of Al/Ti(N)/Ti/Si and Al/Ti(N)/Si multilayer structures showed that Si does not diffuse out up to a sintering temperature of 550 °C. However, as the temperature increases beyond 450 °C, Al starts to react with TiN. This reaction leaves less than half the TiN original thickness after a 30 min anneal at 550 °C. The RBS results indicate that TiN, crystallized at a temperature around 850 °C, forms a good barrier between Al and Si. Electrical measurements on various microelectronic devices were performed to verify this. Annealing of Ti(N) at 900 °C leads to a breakdown of p‐MOS (metal–oxide–semiconductor) devices while n‐MOS devices still work properly. Annealing at 800 °C gives good results on both MOS types except that the contact resistance of a p‐type resistor is higher than desired. The electrical circuit failure is mainly due to dopant loss from the active area of the device into the titanium silicide which forms during the rapid thermal annealing at 800 or 900 °C of the deposited Ti(N) layers.

Journal ArticleDOI
TL;DR: In this paper, the authors present results from SRM imaging of a metaloxide-semiconductor field effect transistor and silicon on insulator cross sections. And they also show that doped diamond tips can overcome some wear and resolution problems observed with metal tips.
Abstract: Scanning resistance microscopy (SRM) is a scanning probe microscopy technique that performs localized contact resistance profiling over a semiconductor surface. Experimental results show that this technique can localize p‐n junctions with a lateral spatial resolution of less than 35 nm. Here we present results from SRM imaging of a metal–oxide–semiconductor field‐effect transistor and silicon on insulator cross sections. These results were obtained with a constant current SRM imaging technique. We also show that doped diamond tips can overcome some wear and resolution problems observed with metal tips.

Patent
23 Feb 1996
TL;DR: In this paper, a novel contact structure comprising an underlying layer of titanium silicide, an intermediate layer of Titanium boride, and an overlying layer of polysilicon was proposed.
Abstract: Disclosed is a novel contact structure comprising an underlying layer of titanium silicide, an intermediate layer of titanium boride, and an overlying layer of polysilicon. Also disclosed is a method for forming the contact structure which comprises depositing a titanium layer in the bottom of a contact opening having oxide insulation sidewalls, forming an overlying layer of polysilicon above the titanium layer, and annealing the two layers together. The resulting contact structure is formed with fewer steps than contact structures of the prior art and without the need for additional steps to achieve uniform sidewall coverage, due to high adhesion of the overlying layer of polysilicon with oxide insulation sidewalls of the contact opening. The contact structure has low contact resistance, and provides a suitable diffusion barrier due to a high melting point.

Proceedings ArticleDOI
16 Sep 1996
TL;DR: Using electron beam evaporation, thin films of Au over Ni and Au over Pd/sub 80/Ni/sub 20/ have been deposited on stainless steel and copper alloy substrates for high temperature electrical contact studies as discussed by the authors.
Abstract: Using electron beam evaporation, thin films of Au over Ni and Au over Pd/sub 80/Ni/sub 20/ have been deposited on stainless steel and copper alloy substrates for high temperature electrical contact studies The structure and composition of the films were studied in detail using electron probe microanalysis (EPMA) and X-ray photoelectron spectroscopy (XPS) with sputter depth profiling The contact properties, such as contact resistance, fretting wear resistance, and thermal stability have been measured The Ni and Pd/sub 80/Ni/sub 20/ layers of about 200 to 300 nm thickness have been shown to be effective in maintaining high temperature stability up to 340/spl deg/C in air by blocking the diffusion of elements in the substrates to the Au surface These coatings also show good fretting wear resistance These desired properties have been achieved with the thickness of the Au, Ni, and Pd/sub 80/Ni/sub 20/ layers substantially less than that of the conventional electroplated coatings

Patent
Wen-Jui Fu1, Ho-Ku Lan1, Ying-Chen Chao1
02 Dec 1996
TL;DR: In this article, a method for reducing the surface leakage current between adjacent bonding pads on integrated circuit substrates after forming a patterned polyimide passivation layer was proposed to improve chip yield by using a thermal treatment step in either a nitrogen or air ambient after the plasma ashing.
Abstract: A method is achieved for reducing the surface leakage current between adjacent bonding pads on integrated circuit substrates after forming a patterned polyimide passivation layer. When the polyimide layer is patterned to open contacts areas over the bonding pads, plasma ashing in oxygen is used to remove residual polyimide that otherwise causes high contact resistance, and poor chip yield. This plasma ashing also modifies the insulating layer between bonding pads resulting in an unwanted increase in surface leakage currents between bonding pads. The passivation process is improved by using a thermal treatment step in either a nitrogen or air ambient after the plasma ashing to essentially eliminate the increased surface leakage current and improve chip yield.

Proceedings ArticleDOI
13 May 1996
TL;DR: In this paper, a novel device configuration is presented which allows the current-voltage characteristic of the Mo/CuInSe/sub 2/ junction to be analyzed separately from the rest of the operating solar cell.
Abstract: Many high efficiency CuInSe/sub 2/ based solar cells show blocking or nonohmic contact behavior in their current-voltage characteristic which has often been attributed to the Mo/CuInSe/sub 2/ back contact. A novel device configuration is presented which allows the current-voltage characteristic of the Mo/CuInSe/sub 2/ junction to be analyzed separately from the rest of the operating solar cell. Direct measurements of the back contact on operating CuInSe/sub 2/ based solar cells which demonstrate this blocking behavior show that the Mo/CuInSe/sub 2/ contact is ohmic with negligible contact resistance compared to the total series resistance of the device.