Showing papers on "Contact resistance published in 2016"
TL;DR: This work reports on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on, and disentangle the channel properties from the contact resistance by using impedance spectroscopy and shows that the current in such devices is governed by a gate bias dependence of theContact resistance.
Abstract: Parameters used to describe the electrical properties of organic field-effect transistors, such as mobility and threshold voltage, are commonly extracted from measured current-voltage characteristics and interpreted by using the classical metal oxide-semiconductor field-effect transistor model. However, in recent reports of devices with ultra-high mobility (>40 cm(2) V(-1) s(-1)), the device characteristics deviate from this idealized model and show an abrupt turn-on in the drain current when measured as a function of gate voltage. In order to investigate this phenomenon, here we report on single crystal rubrene transistors intentionally fabricated to exhibit an abrupt turn-on. We disentangle the channel properties from the contact resistance by using impedance spectroscopy and show that the current in such devices is governed by a gate bias dependence of the contact resistance. As a result, extracted mobility values from d.c. current-voltage characterization are overestimated by one order of magnitude or more.
411 citations
TL;DR: High-performance MoS2 transistors are developed using atomic hexagonal boron nitride as a tunneling layer to reduce the Schottky barrier and achieve low contact resistance between metal and MoS1.
Abstract: High-performance MoS2 transistors are developed using atomic hexagonal boron nitride as a tunneling layer to reduce the Schottky barrier and achieve low contact resistance between metal and MoS2 . Benefiting from the ultrathin tunneling layer within 0.6 nm, the Schottky barrier is significantly reduced from 158 to 31 meV with small tunneling resistance.
380 citations
TL;DR: The experimental results presented in this work, combined with device transport modeling, reveal the remarkable potential of 2D MoS2 for future sub-10 nm technology nodes.
Abstract: Atomically thin molybdenum disulfide (MoS2) is an ideal semiconductor material for field-effect transistors (FETs) with sub-10 nm channel lengths. The high effective mass and large bandgap of MoS2 minimize direct source–drain tunneling, while its atomically thin body maximizes the gate modulation efficiency in ultrashort-channel transistors. However, no experimental study to date has approached the sub-10 nm scale due to the multiple challenges related to nanofabrication at this length scale and the high contact resistance traditionally observed in MoS2 transistors. Here, using the semiconducting-to-metallic phase transition of MoS2, we demonstrate sub-10 nm channel-length transistor fabrication by directed self-assembly patterning of mono- and trilayer MoS2. This is done in a 7.5 nm half-pitch periodic chain of transistors where semiconducting (2H) MoS2 channel regions are seamlessly connected to metallic-phase (1T′) MoS2 access and contact regions. The resulting 7.5 nm channel-length MoS2 FET has a low ...
377 citations
TL;DR: A systematic study of scaling MoS2 devices and contacts with varying electrode metals and controlled deposition conditions, over a wide range of temperatures, carrier densities, and contact dimensions finds that Au deposited in ultra-high vacuum yields three times lower RC than under normal conditions.
Abstract: The scaling of transistors to sub-10 nm dimensions is strongly limited by their contact resistance (RC). Here we present a systematic study of scaling MoS2 devices and contacts with varying electrode metals and controlled deposition conditions, over a wide range of temperatures (80 to 500 K), carrier densities (1012 to 1013 cm–2), and contact dimensions (20 to 500 nm). We uncover that Au deposited in ultra-high vacuum (∼10–9 Torr) yields three times lower RC than under normal conditions, reaching 740 Ω·μm and specific contact resistivity 3 × 10–7 Ω·cm2, stable for over four months. Modeling reveals separate RC contributions from the Schottky barrier and the series access resistance, providing key insights on how to further improve scaling of MoS2 contacts and transistor dimensions. The contact transfer length is ∼35 nm at 300 K, which is verified experimentally using devices with 20 nm contacts and 70 nm contact pitch (CP), equivalent to the “14 nm” technology node.
369 citations
TL;DR: In this article, a review of the most commonly used measurement techniques for thermal conductivity and interfacial thermal conductance is presented, including the 3-omega method and transient plane source method.
Abstract: Thermal conductivity and interfacial thermal conductance play crucial roles in the design of engineering systems where temperature and thermal stress are of concerns. To date, a variety of measurement techniques are available for both bulk and thin film solid-state materials with a broad temperature range. For thermal characterization of bulk material, the steady-state absolute method, laser flash diffusivity method, and transient plane source method are most used. For thin film measurement, the 3{\omega} method and transient thermoreflectance technique including both frequency-domain and time-domain analysis are employed widely. This work reviews several most commonly used measurement techniques. In general, it is a very challenging task to determine thermal conductivity and interface contact resistance with less than 5% error. Selecting a specific measurement technique to characterize thermal properties need to be based on: 1) knowledge on the sample whose thermophysical properties is to be determined, including the sample geometry and size, and preparation method; 2) understanding of fundamentals and procedures of the testing technique and equipment, for example, some techniques are limited to samples with specific geometrics and some are limited to specific range of thermophysical properties; 3) understanding of the potential error sources which might affect the final results, for example, the convection and radiation heat losses.
306 citations
TL;DR: In this paper, a review of the most commonly used measurement techniques for thermal conductivity and interfacial thermal conductance is presented, including the 3-omega method and transient plane source method.
Abstract: Thermal conductivity and interfacial thermal conductance play crucial roles in the design of engineering systems where temperature and thermal stress are of concerns. To date, a variety of measurement techniques are available for both bulk and thin film solid-state materials with a broad temperature range. For thermal characterization of bulk material, the steady-state absolute method, laser flash diffusivity method, and transient plane source method are most used. For thin film measurement, the 3{\omega} method and transient thermoreflectance technique including both frequency-domain and time-domain analysis are employed widely. This work reviews several most commonly used measurement techniques. In general, it is a very challenging task to determine thermal conductivity and interface contact resistance with less than 5% error. Selecting a specific measurement technique to characterize thermal properties need to be based on: 1) knowledge on the sample whose thermophysical properties is to be determined, including the sample geometry and size, and preparation method; 2) understanding of fundamentals and procedures of the testing technique and equipment, for example, some techniques are limited to samples with specific geometrics and some are limited to specific range of thermophysical properties; 3) understanding of the potential error sources which might affect the final results, for example, the convection and radiation heat losses.
272 citations
TL;DR: The scaling of transistors to sub-10 nm dimensions is strongly limited by their contact resistance (Rc), as shown in this article, where the authors present a systematic study of scaling MoS2 devices and contacts with varying electrode metals and controlled deposition conditions.
Abstract: The scaling of transistors to sub-10 nm dimensions is strongly limited by their contact resistance (Rc). Here we present a systematic study of scaling MoS2 devices and contacts with varying electrode metals and controlled deposition conditions, over a wide range of temperatures (80 to 500 K), carrier densities (10^12 to 10^13 1/cm^2), and contact dimensions (20 to 500 nm). We uncover that Au deposited in ultra-high vacuum (~10^-9 Torr) yields three times lower Rc than under normal conditions, reaching 740 {\Omega}.{\mu}m and specific contact resistivity 3x10^-7 {\Omega}.cm2, stable for over four months. Modeling reveals separate Rc contributions from the Schottky barrier and the series access resistance, providing key insights on how to further improve scaling of MoS2 contacts and transistor dimensions. The contact transfer length is ~35 nm at 300 K, which is verified experimentally using devices with 20 nm contacts and 70 nm contact pitch (CP), equivalent to the "14 nm" technology node.
232 citations
TL;DR: A scalable method to fabricate ohmic graphene edge contacts to two representative monolayer TMDs, MoS2 and WS2, which show linear current-voltage characteristics at room temperature, with ohmic behavior maintained down to liquid helium temperatures.
Abstract: With the decrease of the dimensions of electronic devices, the role played by electrical contacts is ever increasing, eventually coming to dominate the overall device volume and total resistance. This is especially problematic for monolayers of semiconducting transition-metal dichalcogenides (TMDs), which are promising candidates for atomically thin electronics. Ideal electrical contacts to them would require the use of similarly thin electrode materials while maintaining low contact resistances. Here we report a scalable method to fabricate ohmic graphene edge contacts to two representative monolayer TMDs, MoS2 and WS2. The graphene and TMD layer are laterally connected with wafer-scale homogeneity, no observable overlap or gap, and a low average contact resistance of 30 kΩ·μm. The resulting graphene edge contacts show linear current–voltage (I–V) characteristics at room temperature, with ohmic behavior maintained down to liquid helium temperatures.
198 citations
TL;DR: This work demonstrates that defect engineering at the contact regions can be utilized as a reliable scheme to realize high-performance electronic and optoelectronic TMDC devices.
Abstract: Transition metal dichalcogenides (TMDCs) have been extensively explored for applications in electronic and optoelectronic devices due to their unique material properties. However, the presence of large contact resistances is still a fundamental challenge in the field. In this work, we study defect engineering by using a mild plasma treatment (He or H2) as an approach to reduce the contact resistance to WSe2. Material characterization by X-ray photoelectron spectroscopy, photoluminescence, and Kelvin probe force microscopy confirm defect-induced n-doping, up to degenerate level, which is attributed to the creation of anion (Se) vacancies. The plasma treatment is adopted in the fabrication process flow of WSe2 n-type metal-oxide–semiconductor field-effect transistors to selectively create anion vacancies at the metal contact regions. Due to lowering the metal contact resistance, improvements in the device performance metrics such as a 20× improvement in ON current and a nearly ideal subthreshold swing value...
182 citations
TL;DR: Transistor parameter extraction by the conventional transconductance method can lead to a mobility overestimate, but after annealing, a contact resistance below 200 Ω cm is achieved, which is stable over a wide V(G) range.
Abstract: Transistor parameter extraction by the conventional transconductance method can lead to a mobility overestimate. Organic transistors undergoing major contact resistance experience a significant drop in mobility upon mild annealing. Before annealing, strong field-dependent contact resistance yields nonlinear transfer curves with locally high transconductances, resulting in a mobility overestimate. After annealing, a contact resistance below 200 Ω cm is achieved, which is stable over a wide V(G) range.
170 citations
TL;DR: Schottky barrier heights of metal-MoS2 contacts to devices fabricated from CVD synthesized MoS2 films were reduced by inserting a thin tunneling Ta2O5 layer between MoS 2 and metal contacts to directly correlate with exponential reductions in contact resistance.
Abstract: Creating high-quality, low-resistance contacts is essential for the development of electronic applications using two-dimensional (2D) layered materials. Many previously reported methods for lowering the contact resistance rely on volatile chemistry that either oxidize or degrade in ambient air. Nearly all reported efforts have been conducted on only a few devices with mechanically exfoliated flakes which is not amenable to large scale manufacturing. In this work, Schottky barrier heights of metal-MoS2 contacts to devices fabricated from CVD synthesized MoS2 films were reduced by inserting a thin tunneling Ta2O5 layer between MoS2 and metal contacts. Schottky barrier height reductions directly correlate with exponential reductions in contact resistance. Over two hundred devices were tested and contact resistances extracted for large scale statistical analysis. As compared to metal-MoS2 Schottky contacts without an insulator layer, the specific contact resistivity has been lowered by up to 3 orders of magni...
TL;DR: In this paper, a modified hydrothermal method for the synthesis of very-long silver nanowires (AgNWs) and their use in a high quality transparent conducting electrode without post-processing has been developed.
Abstract: Solution-processed silver nanowire (AgNW) random mesh is a strong contender to commercial indium tin oxide (ITO); however, its performance is limited due to large contact resistance between nanowires and post-processing treatments. As an alternative, long nanowires can decrease the number of contact points and contact resistance. Here, a simple modified hydrothermal method for the synthesis of very-long silver nanowires (AgNWs) and their use in a high quality transparent conducting electrode without post-processing has been developed. Well dispersed very-long and thin silver nanowires are synthesized by using glucose as a reducing agent and silver chloride as a silver source. The lengths of the wires are in the range of 200 to 500 μm with an average diameter of 45–65 nm. To the best of our knowledge, this is the first report on long nanowires having a thin diameter with greater than 200 microns length. As compared to other transparent conductors and nanowire networks, this AgNW network shows a higher percolative figure of merit (FoM, Π) with low haze. A flexible touch screen using the AgNW network is also demonstrated which has shown good performance even on a bendable surface.
01 Dec 2016
TL;DR: In this paper, the authors demonstrate monolayer (1L) MoS2 grown by chemical vapor deposition (CVD) with transport properties comparable to those of the best exfoliated 1L devices over a wide range of carrier densities and temperatures.
Abstract: We demonstrate monolayer (1L) MoS2 grown by chemical vapor deposition (CVD) with transport properties comparable to those of the best exfoliated 1L devices over a wide range of carrier densities (up to ~1013 cm−2) and temperatures (80–500 K). Transfer length measurements decouple the intrinsic material mobility from the contact resistance, at practical carrier densities (>1012 cm−2). We demonstrate the highest current density reported to date (~270 μA μm−1 or 44 MA cm−2) at 300 K for an 80 nm long device from CVD-grown 1L MoS2. Using simulations, we discuss what improvements of 1L MoS2 are still required to meet technology roadmap requirements for low power and high performance applications. Such results are an important step towards large-area electronics based on 1L semiconductors.
22 Apr 2016
TL;DR: In this article, the authors demonstrate an effective method to establish low-temperature Ohmic contacts in boron nitride encapsulated TMDC devices based on selective etching and conventional electron-beam evaporation of metal electrodes.
Abstract: Low carrier mobility and high electrical contact resistance are two major obstacles prohibiting explorations of quantum transport in TMDCs. Here, we demonstrate an effective method to establish low-temperature Ohmic contacts in boron nitride encapsulated TMDC devices based on selective etching and conventional electron-beam evaporation of metal electrodes. This method works for most extensively studied TMDCs in recent years, including MoS2, MoSe2, WSe2, WS2, and 2H-MoTe2. Low electrical contact resistance is achieved at 2 K. All of the few-layer TMDC devices studied show excellent performance with remarkably improved field-effect mobilities ranging from 2300 to 16 000 cm2 V−1 s−1, as verified by the high carrier mobilities extracted from Hall effect measurements. Moreover, both high-mobility n-type and p-type TMDC channels can be realized by simply using appropriate contact metals. Prominent Shubnikov–de Haas oscillations have been observed and investigated in these high-quality TMDC devices.
TL;DR: A systematic comparison of the impact of selective doping with the TiO2 layer under the source-Drain metal relative to that on top of the MoS2 channel shows a larger benefit for transistor performance from the reduction in source-drain contact resistance.
Abstract: We demonstrate a low and constant effective Schottky barrier height (ΦB ∼ 40 meV) irrespective of the metal work function by introducing an ultrathin TiO2 ALD interfacial layer between various metals (Ti, Ni, Au, and Pd) and MoS2. Transmission line method devices with and without the contact TiO2 interfacial layer on the same MoS2 flake demonstrate reduced (24×) contact resistance (RC) in the presence of TiO2. The insertion of TiO2 at the source-drain contact interface results in significant improvement in the on-current and field effect mobility (up to 10×). The reduction in RC and ΦB has been explained through interfacial doping of MoS2 and validated by first-principles calculations, which indicate metallic behavior of the TiO2-MoS2 interface. Consistent with DFT results of interfacial doping, X-ray photoelectron spectroscopy (XPS) data also exhibit a 0.5 eV shift toward higher binding energies for Mo 3d and S 2p peaks in the presence of TiO2, indicating Fermi level movement toward the conduction band (...
TL;DR: In this article, highly doped GaN p-n tunnel junction (TJ) contacts on III-nitride heterostructures where the active region of the device and the top p-GaN layers were grown by metal organic chemical vapor deposition (MOCVD) and highly Doped nGaN was grown by NH3 molecular beam epitaxy to form the TJ.
Abstract: In this work, we demonstrate highly doped GaN p–n tunnel junction (TJ) contacts on III–nitride heterostructures where the active region of the device and the top p-GaN layers were grown by metal organic chemical vapor deposition and highly doped n-GaN was grown by NH3 molecular beam epitaxy to form the TJ. The regrowth interface in these hybrid devices was found to have a high concentration of oxygen, which likely enhanced tunneling through the diode. For optimized regrowth, the best tunnel junction device had a total differential resistivity of 1.5 × 10−4 Ω cm2, including contact resistance. As a demonstration, a blue-light-emitting diode on a () GaN substrate with a hybrid tunnel junction and an n-GaN current spreading layer was fabricated and compared with a reference sample with a transparent conducting oxide (TCO) layer. The tunnel junction LED showed a lower forward operating voltage and a higher efficiency at a low current density than the TCO LED.
TL;DR: For the first time, it is demonstrated that the 2DSC transistors can offer comparable performance to the 2017 target for silicon transistors in International Technology Roadmap for Semiconductors (ITRS), marking an important milestone in 2 DSC electronics.
Abstract: Two-dimensional semiconductors (2DSCs) such as molybdenum disulfide (MoS2) have attracted intense interest as an alternative electronic material in the postsilicon era. However, the ON-current density achieved in 2DSC transistors to date is considerably lower than that of silicon devices, and it remains an open question whether 2DSC transistors can offer competitive performance. A high current device requires simultaneous minimization of the contact resistance and channel length, which is a nontrivial challenge for atomically thin 2DSCs, since the typical low contact resistance approaches for 2DSCs either degrade the electronic properties of the channel or are incompatible with the fabrication process for short channel devices. Here, we report a new approach toward high-performance MoS2 transistors by using a physically assembled nanowire as a lift-off mask to create ultrashort channel devices with pristine MoS2 channel and self-aligned low resistance metal/graphene hybrid contact. With the optimized cont...
TL;DR: This work introduces a facile growth mechanism for semimetallic WTe2 crystals and fabricates few-layer test structures while carefully avoiding degradation from exposure to air, suggesting several pathways for air-stable technological viability of this layered semimetal.
Abstract: Two-dimensional (2D) semimetals beyond graphene have been relatively unexplored in the atomically thin limit. Here, we introduce a facile growth mechanism for semimetallic WTe2 crystals and then fabricate few-layer test structures while carefully avoiding degradation from exposure to air. Low-field electrical measurements of 80 nm to 2 μm long devices allow us to separate intrinsic and contact resistance, revealing metallic response in the thinnest encapsulated and stable WTe2 devices studied to date (3–20 layers thick). High-field electrical measurements and electrothermal modeling demonstrate that ultrathin WTe2 can carry remarkably high current density (approaching 50 MA/cm2, higher than most common interconnect metals) despite a very low thermal conductivity (of the order ∼3 Wm–1 K–1). These results suggest several pathways for air-stable technological viability of this layered semimetal.
TL;DR: In this article, a method of fabricating an organic field effect transistor (OFET), including forming a source contact, a drain contact, and a gate connection to a channel comprising semiconducting polymers, is described.
Abstract: A method of fabricating an organic field effect transistor (OFET), including forming a source contact, a drain contact, and a gate connection to a channel comprising semiconducting polymers, wherein the gate connection applies a field to the semiconductor polymers across a dielectric layer to modulate conduction along the semiconducting polymers between the source contact and the drain contact; and treating the semiconducting polymers, wherein the treating includes a chemical treatment that controls a carrier density, carrier mobility, threshold voltage, and/or contact resistance of the OFET.
TL;DR: These findings underscore the impact of printed contact materials and structures when interfacing with CNT thin films, providing key guidance for the further development of printed nanomaterial electronics.
Abstract: Single-walled carbon nanotubes (CNTs) printed into thin films have been shown to yield high mobility, thermal conductivity, mechanical flexibility, and chemical stability as semiconducting channels in field-effect, thin-film transistors (TFTs). Printed CNT-TFTs of many varieties have been studied; however, there has been limited effort toward improving overall CNT-TFT performance. In particular, contact resistance plays a dominant role in determining the performance and degree of variability in the TFTs, especially in fully printed devices where the contacts and channel are both printed. In this work, we have systematically investigated the contact resistance and overall performance of fully printed CNT-TFTs employing three different printed contact materials—Ag nanoparticles, Au nanoparticles, and metallic CNTs—each in the following distinct contact geometries: top, bottom, and double. The active channel for each device was printed from the dispersion of high-purity (>99%) semiconducting CNTs, and all pr...
TL;DR: In this paper, an electron tunneling mechanism was introduced to enhance the electron mobility in transition metal dichalcogenides (TMDs) phototransistor. But the electron injection from electrode to channel is strikingly enhanced.
Abstract: Transition metal dichalcogenides (TMDs) demonstrate great potential in electronic and optoelectronic applications. However, the device performance remains limited because of the poor metal contact. Herein, we fabricate a high-performance ultrathin MoTe2 phototransistor. By introducing an electron tunneling mechanism, electron injection from electrode to channel is strikingly enhanced. The electron mobility approaches 25.2 cm2 V−1 s−1, better than that of other back-gated MoTe2 FETs. Through electrical measurements at various temperatures, the electron tunneling mechanism is further confirmed. The MoTe2 phototransistor exhibits very high responsivity up to 2560 A/W which is higher than that of most other TMDs. This work may provide guidance to reduce the contact resistance at metal-semiconductor junction and pave a pathway to develop high-performance optoelectronic devices in the future.
TL;DR: The effects of graphene n-doping on a metal-graphene contact are studied in combination with 1D edge contacts, presenting a record contact resistance of 23 Ω μm at room temperature.
Abstract: The effects of graphene n-doping on a metal-graphene contact are studied in combination with 1D edge contacts, presenting a record contact resistance of 23 Ω μm at room temperature (19 Ω μm at 100 K). This contact scheme is applied to a graphene-perovskite hybrid photodetector, significantly improving its performance (0.6 → 1.8 A W(-1) in photoresponsivity and 3.3 × 10(4) → 5.4 × 10(4) Jones in detectivity).
TL;DR: In this article, the relationship between the oxygen transfer resistance of the actual porous components and their three-dimensional structure by direct measurement with FIB-SEM and X-ray CT was examined.
TL;DR: In this paper, multilayered chromium-carbon (Cr-C) film is deposited on SS316L sheet as BPPs using closed field unbalanced magnetron sputter ion plating (CFUBMSIP).
TL;DR: A single-material logical junction with negligible contact resistance is designed by exploiting quantum-confinement effects in 1T PdS2 using metallic bilayer as electrodes for the semiconducting channel monolayer, avoiding contact resistance.
Abstract: A single-material logical junction with negligible contact resistance is designed by exploiting quantum-confinement effects in 1T PdS2 . The metallic bilayer serves as electrodes for the semiconducting channel monolayer, avoiding contact resistance. Heat dissipation is then governed by tunnel loss, which becomes negligible at channel lengths larger than 2.45 nm. This value marks the integration limit for a conventional 2D transistor.
TL;DR: The origin of the decrease in contact resistance in terms of increase of the work function of the modified Au electrodes, Fermi-level pinning effects, and decrease of bulk resistance by electrically doping the organic semiconductor films in the vicinity of the source/drain electrodes are discussed.
Abstract: We report on the reduction of contact resistance in solution-processed TIPS-pentacene (6,13-bis(triisopropylsilylethynyl)pentacene) and PTAA (poly[bis(4-phenyl)(2,4,6-trimethylphenyl)amine]) top-gate bottom-contact organic field-effect transistors (OFETs) by using different contact-modification strategies. The study compares the contact resistance values in devices that comprise Au source/drain electrodes either treated with 2,3,4,5,6-pentafluorothiophenol (PFBT), or modified with an evaporated thin layer of the metal–organic molecular dopant molybdenum tris-[1,2-bis(trifluoromethyl)ethane-1,2-dithiolene] (Mo(tfd)3), or modified with a thin layer of the oxide MoO3. An improved performance is observed in devices modified with Mo(tfd)3 or MoO3 as compared to devices in which Au electrodes are modified with PFBT. We discuss the origin of the decrease in contact resistance in terms of increase of the work function of the modified Au electrodes, Fermi-level pinning effects, and decrease of bulk resistance by e...
TL;DR: In this article, the authors developed a PEM fuel cell model to study the contact pressure distribution over the membrane electrode assembly using finite element model, where a single cell was reduced to a two-dimensional model to decrease the calculation time.
TL;DR: In this paper, the use of nanocrystalline Ta/TaN multilayer coatings to improve the electrical and electrochemical performance of polished 316L SS bipolar plates was explored.
TL;DR: In this article, an improved representation of both electrical contact resistance and thermal contact resistance (TCR) in Al to zinc-coated steel RSW process is presented, which can be used to guide future welding schedule development or electrode geometry design for the RSW of Al to steel.
TL;DR: The phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four- probe configurations, and surprisingly, also in nearly noninvasive four-Probe (Hall bar) configuration in the high-mobility devices.
Abstract: The impact of the intrinsic time-dependent fluctuations in the electrical resistance at the graphene-metal interface or the contact noise, on the performance of graphene field-effect transistors, can be as adverse as the contact resistance itself, but remains largely unexplored. Here we have investigated the contact noise in graphene field-effect transistors of varying device geometry and contact configuration, with carrier mobility ranging from 5,000 to 80,000 cm(2)V(-1) s(-1). Our phenomenological model for contact noise because of current crowding in purely two-dimensional conductors confirms that the contacts dominate the measured resistance noise in all graphene field-effect transistors in the two-probe or invasive four-probe configurations, and surprisingly, also in nearly noninvasive four-probe (Hall bar) configuration in the high-mobility devices. The microscopic origin of contact noise is directly linked to the fluctuating electrostatic environment of the metal-channel interface, which could be generic to two-dimensional material-based electronic devices.