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Showing papers on "Control reconfiguration published in 1980"


Journal ArticleDOI
TL;DR: In this paper, the authors provide a mathematical framework for building reliable control using less reliable controllers, which is based upon the decentralized control schemes used so far for synthesizing reliable control systems subject to perturbations in the plant interconnection structure.
Abstract: The objective of this paper is to provide a mathematical framework for building reliable control using less reliable controllers The new ingredient in the design is the multiple control system which provides the necessary redundancy for reliability enhancement in control systems subject to controller failures The proposed reliability design is based upon the decentralized control schemes used so far for synthesizing reliable control systems subject to perturbations in the plant interconnection structure

286 citations


Patent
George A. Works1
11 Jul 1980
TL;DR: In this article, a distributed, fault-tolerant, self-repairable, reconfigurable signal processing system with redundant elements comprising signal processors, mass memories and input-output controllers interconnected by redundant busses is presented.
Abstract: A distributed, fault-tolerant, self-repairable, reconfigurable signal processing system with redundant elements comprising signal processors, mass memories and input-output controllers interconnected by redundant busses forming a high reliability system. The input-output controller element has redundant busses for interconnecting multiple fault-tolerant distributed signal processing systems into a network configuration. One signal processor element in a system is initially designated as the executive and assigns processing tasks from a mass memory to the other elements or other systems. When a failure is detected, the executive verifies the failure, isolates the faulty element and reassigns the task to another spare element. If another element is not available, the executive reconfigures the system to permit degraded operation using the available elements. The executive element, itself, is fault monitored by one of the other elements which is capable of assuming the role of executive as required. The fault-tolerant and reconfiguration capabilities of the system result from a virtual addressing technique for each element, a distributed bus arbitration method and a two-level distributed operating system.

143 citations


Journal ArticleDOI
TL;DR: Properties of the reverse-exchange interconnection network are used to develop a reconfiguration scheme and a two-pass structure for enhancing the efficiency of a class of multistage interconnection networks and it is proved that arbitrary permutations can be realized in two passes.
Abstract: Properties of the reverse-exchange interconnection network are used to develop a reconfiguration scheme and a two-pass structure for enhancing the efficiency of a class of multistage interconnection networks. Functional relationships among a class of multistage interconnection networks are first derived. According to the functional relationships, we propose a reconfiguration scheme which enables a network to accomplish various interconnection functions of other networks. Then the admissible permutations along with related recursive control algorithms of the reverse-exchange interconnection network are specified through a set of theorems. Using the reverse-exchange property, we also prove that the algorithms actually work. Finally, we prove that arbitrary permutations can be realized in two passes (or 2 · 1og2N switching steps where N is the network size). By taking advantage of Benes network control algorithms, a way to control the two-pass structure is also developed.

117 citations


Journal ArticleDOI
TL;DR: Modular systems employing building-block VLSI circuits may provide fault tolerance to a variety of applications.
Abstract: Modular systems employing building-block VLSI circuits may provide fault tolerance to a variety of applications.

61 citations


Journal ArticleDOI
TL;DR: A scheme and its realization are presented for automatically reconfiguring a 5MR into a triple modular redundancy (TMR) system under a single or double module failures.
Abstract: This paper deals with a method for designing a digital system which will remain operational in spite of the failure of some of its components. A scheme and its realization are presented for automatically reconfiguring a 5MR (five modular redundancy system or 5-input majority voting system) into a triple modular redundancy (TMR) system under a single or double module failures. The scheme can tolerate a double fault followed by a single fault which can neither be tolerated by a 5MR nor by a hybrid redundancy system with a TMR core. It uses no spare units and the circuit realization is relatively simple. The modular structure of the logic design for the proposed scheme should make the testing of the system easier. The scheme can be used in both binary and multivalued systems.

39 citations


Patent
Roland E. Genter1, Steven R. Cook1
19 Mar 1980
TL;DR: In this article, a digital switching matrix for use in telephone systems which provides nonblocking operation and is capable of non-blocking expansion without reconfiguration of the existing system is described.
Abstract: A digital switching matrix for use in telephone systems which provides non-blocking operation and is capable of non-blocking expansion without reconfiguration of the existing system. A provision for providing message tones such as dial tone, business line, etc., without requiring a map search of the switching matrix, and an integral testing provision are also described.

13 citations


Proceedings ArticleDOI
01 Dec 1980
TL;DR: In this paper, a simplified model of the level of the steam generator and analysis of the drawbacks of the classical controllers is presented, the problems involved in the implementation of different adaptive control methods are described and finally a simplified adaptive control method is set out which avoids the different problems encountered.
Abstract: Due to the problems of the automatic water level control from low load to full load, utilization of different adaptive control methods is presented in this paper after description of a simplified model of the level of the steam generator and analysis of the drawbacks of the classical controllers. The problems involved in the implementation of different adaptive control methods are described and finally a simplified adaptive control method is set out which avoids the different problems encountered.

7 citations


01 Feb 1980
TL;DR: In this paper, the development of new approaches to the planning of radial primary distribution systems is discussed, focusing on two problem areas: (1) planning the normal operating configuration of the system; and (2) optimization models for reconfiguration of a radial system of feeders during either emergencies or planned outages.
Abstract: The research project, Development of Advanced Methods for Planning Electric Energy Distribution Systems is summarized. The research has concerned the development of new approaches to the planning of radial primary distribution systems. In particular, the research has addressed two problem areas: the development of optimization models for arranging or rearranging the radial structure of a system of feeders - for planning the normal operating configuration of the system; and the development of optimization models for reconfiguration (made possible by manual or automatic switching) of a radial system of feeders during either emergencies or planned outages. Details of the method of approach and of the models' development and testing are included in this volume. A separate Volume II provides computer program listings and supporting documentation.

6 citations


Proceedings ArticleDOI
01 Dec 1980
TL;DR: An approach to designing stable and high performance control systems for large space structures is discussed and stability with robustness is achieved through the application of a technique based on the positivity of operators.
Abstract: An approach to designing stable and high performance control systems for large space structures is discussed. Stability with robustness is achieved through the application of a technique based on the positivity of operators. High performance is achieved through on-orbit control system tuning using either indirect or direct adaptive control.

5 citations


Proceedings ArticleDOI
18 Sep 1980
TL;DR: The design and applications of a memory coupled network of four 8080A microprocessors are discussed, which fully exploits all the inherent capabilities of a network namely, flexibility, dynamic reconfiguration, redundancy for fault-tolerance, higher throughput due to parallelism and pipelining and most effective utilisation of expensive resources.
Abstract: In the present paper, design and applications of a memory coupled network of four 8080A microprocessors are discussed. The architecture fully exploits all the inherent capabilities of a network namely, flexibility, dynamic reconfiguration, redundancy for fault-tolerance, higher throughput due to parallelism and pipelining and most effective utilisation of expensive resources. A simple and novel hardware protocole completely eliminates the communications software and provides a fast access to shared resources to each processor in the network. The network is extremely versatile and finds application in vast number of completely divergent areas.

4 citations


Journal ArticleDOI
Jr. C. Johnson1
01 Feb 1980
TL;DR: In this paper, an adjustable model reference adaptive control strategy is proposed where both the controller and reference model parameters are adapted, and adaptive control laws for this new structure implementing pole cancellation and replacement and avoiding the zero cancellation usually required by model-reference adaptive control are developed from self-tuning adaptive algorithm modification.
Abstract: An adjustable model reference adaptive control strategy is proposed where both the controller and reference model parameters are adapted. Adaptive control laws for this new structure implementing pole cancellation and replacement and avoiding the zero cancellation usually required by model reference adaptive control are developed from self-tuning adaptive algorithm modification.

01 Jun 1980
TL;DR: This thesis describes the detailed design of a distributed operating system for a real-time, microcomputer based multiprocessor system that supports applications where processing is partitioned into a set of multiple processes.
Abstract: : This thesis describes the detailed design of a distributed operating system for a real-time, microcomputer based multiprocessor system. Process structuring and segmented address spaces comprise the central concepts around which this system is built. The system particularly supports applications where processing is partitioned into a set of multiple processes. One such area is that of digital signal processing for which this system has been specifically developed. The operating system is hierarchically structured to logically distribute its functions in each process. This and loop-free properties of the design allow for the physical distribution of system code and data amongst the microcomputers. In a multiprocessor configuration, this physical distribution minimizes system bus contention and lays the foundation for dynamic reconfiguration. (Author)

Book ChapterDOI
01 Jan 1980
TL;DR: The control of a complex industrial robot today requires digital computers in a multicomputer arrangement, specially when the algorithms for decoupling the degrees of freedom, for the coordinate-transformation and for supervision and security are concerned.
Abstract: The control of a complex industrial robot today requires digital computers in a multicomputer arrangement, specially when the algorithms for decoupling the degrees of freedom, for the coordinate-transformation and for supervision and security are concerned. Programming such a multicomputer system by use of a higher level realtime language will reduce costs and increase the transparency and maintainability of the software system. After a discussion of the necessary language elements and a suited language structure the design of an appropriated language is shown. The design is implemented on the basis of the language PEARL (Process and Experiment Automation Realtime Language), extended by language divisions and elements for the description of the structure of hardware and software in multicomputer systems. A Dynamic Loader, carrying out the software configuration and reconfiguration in case of failures is explained.

Book ChapterDOI
01 Jan 1980
TL;DR: This paper discusses a general approach to coordination and communication between modules with specific examples concerning how interdependent control functions may activate and deactivate each other.
Abstract: While the flexibility of a process control system may be enhanced by modular design, the effectiveness of the system often depends upon coordination of the modules' actions. The conflict between designing clearly bounded modules and providing for coupling between them gives rise to important design tradeoffs in two major areas: the appropriate size and scope of modules for the application, and the amount of knowledge any one module must have about any other module for communication and coordination. This paper discusses a general approach to coordination and communication between modules with specific examples concerning how interdependent control functions may activate and deactivate each other. In addition, the paper describes methods for on-line reconfiguration of the relationships between modules.

Journal ArticleDOI
TL;DR: This chapter presents an efficient redundancy concept for a microcomputer-based failure tolerant controller station, structured as a decentralized modular system, composed of several microcomputer units performing control and supervisory functions, I/O-Modules, and a universal communication system enabling each computer module to reach every process signal.

Proceedings ArticleDOI
01 Apr 1980
TL;DR: A transformation system is presented, which uses computation graphs as a representation of both the algorithmic structure and the processor configuration, and is able to rewrite the computation graph automatically, dependent on the available hardware resources.
Abstract: To reduce computation time in a multiprocessor environment the efficient configuration and utilization of hardware components is necessary. It requires both a restructuring of the considered algorithms and a reconfiguration of the corresponding machine architectures. A transformation system is presented, which uses computation graphs as a representation of both the algorithmic structure and the processor configuration. The system is able to rewrite the computation graph automatically, dependent on the available hardware resources. In this paper the design strategy for algorithms and machine models is illustrated by the DFT. Several models for the algorithm are discussed. Finally the results of time and hardware complexity with regard to the different graph structures and machine architectures are presented.

Proceedings ArticleDOI
06 May 1980
TL;DR: A test and reconfiguration strategy for fault-tolerant VLSI processor systems that enables each processor to diagnose autonomously its data path structure and its associated local memory and system reliability is considerably improved.
Abstract: The following paper is to present a test and reconfiguration strategy for fault-tolerant VLSI processor systems. This is accomplished with respect to the requirements imposed by the VLSI technology. The proposed concept is exemplified by a model composed of four microprogrammable processors each with a local memory. The test strategy of a gradually expanding hardcore is applied where the central hardcore consists of a small test unit of low complexity. This test unit enables each processor to diagnose autonomously its data path structure and its associated local memory. A particular reconfiguration scheme is proposed for these components. It is implemented at microprogram level. As a result, compared with other fault-tolerance techniques, system reliability is considerably improved.

Proceedings ArticleDOI
18 Sep 1980
TL;DR: FINNET is an approach to computer systems design that utilizes the economy, reliability, and flexibility of small computers functioning in a cohesive fashion to provide large scale computer power at a fraction of the usual cost.
Abstract: FINNET is an approach to computer systems design that utilizes the economy, reliability, and flexibility of small computers functioning in a cohesive fashion to provide large scale computer power at a fraction of the usual cost. This approach is valid over a wide range of equipment configurations and will support system growth ranging from a single computer to a large geographically distributed network of processors, each capable of performing in stand-alone fashion under a variety of operating systems or participating with other processors in the solution of problems too large or complex for a single machine.The basic component of this design approach is NETCOM, a straightforward inter-process communication system that supports local high speed data channels as well as full duplex, multi-line, multi-drop, remote synchronous lines. By providing location independent support for the concept of functional processes, NETCOM allows their distribution among multiple processors, thereby providing not only increased throughput, but also yielding improved reliability and the capability for system expansion or reconfiguration (both hardware and software) without programming modifications.

Journal ArticleDOI
TL;DR: The present generation of special- Purpose computer hardware for power-system trainers consists of a hybrid computer comprised of a general-purpose digital computer and a special-purpose analog computer that provides training experience in performing such procedures and functions as load following, intrapool exchanges of power, reconfiguration of systems for maintenance, voltage control, load shedding, and other emergency procedures.
Abstract: The present generation of special-purpose computer hardware for power-system trainers consists of a hybrid computer comprised of a general-purpose digital computer and a special-purpose analog computer. These hybrid simulators use analog models of generators, transmission lines, loads, etc., and they provide training experience in performing such procedures and functions as load following, intrapool exchanges of power, reconfiguration of systems for maintenance, voltage control, load shedding, and other emergency procedures, economic dispatch, fast generation pickup, and coping with incomplete or distorted information during a simulated blackout episode. The history of simulator use is discussed, along with present day hardware and software and future trends. 5 references, 1 figure, 1 table.