Showing papers on "Control reconfiguration published in 1993"

Processor reconfiguration through instruction-set metamorphosis

Abstract: The processor reconfiguration through instruction-set metamorphosis (PRISM) general-purpose architecture, which speeds up computationally intensive tasks by augmenting the core processor's functionality with new operations, is described. The PRISM approach adapts the configuration and fundamental operations of a core processing system to the computationally intensive portions of a targeted application. PRISM-1, an initial prototype system, is described, and experimental results that demonstrate the benefits of the PRISM concept are presented. >

Artificial neural-network based feeder reconfiguration for loss reduction in distribution systems

Abstract: Strategies are proposed to reconfigure the feeder in distribution systems by using artificial neural networks (ANNs) with mapping ability. ANNs determine the appropriate system topology that reduces the power loss according to the variation of load pattern. The control strategy can be easily obtained on the basis of the system topology which is provided by ANNs. ANNs are designed in two groups. The first group estimates the proper load level from the load data of each zone. The second determines the appropriate system topology from the input load level. Several programs with the training set builder are developed for the design, the training, and the accuracy test of artificial neural networks. The performance of neural networks designed is evaluated on the test distribution system. Neural networks are implemented in FORTRAN language and trained on a 386 PC. >

State estimation for electric power distribution systems in quasi real-time conditions

Abstract: This paper proposes a new method for the state estimation of electric power distribution system conditions oriented towards working with minimum number of remote measurements available in the network. This approach will require information concerning the network reconfiguration, remote measurements of voltages, real and reactive power as well as feeder currents in distribution substations. All kinds of statistical information pertaining to distribution transformer loads are used together with real-time remote measurements. In the proposed method, the existing scheme configuration is examined by a configuration pre-screening process based on the addressed references in an oriented graph. The permissible intervals for remote measurement errors and the reliability of statistical information are discussed. A practical example is presented and the exploitation of results has proved its accuracy and efficiency. >

PRISM-II compiler and architecture

Abstract: This paper discusses the architecture and compiler for a general-purpose metamorphic computing platform called PRISM-II. PRISM-II improves the performance of many computationally-intensive tasks by augmenting the functionality of the core processor with new instructions that match the characteristics of targeted applications. In essence, PRISM (processor reconfiguration through instruction set metamorphosis) is a general purpose hardware platform that behaves like an application-specific platform. Two methods for hardware synthesis, one using VHDL Designer and the other using X-BLOX, are presented and synthesis results are compared. >

Time varying load analysis to reduce distribution losses through reconfiguration

Abstract: An electrical distribution system reconfiguration algorithm for reducing losses is presented. The algorithm calculates switching patterns as a function of time. Either seasonal or daily time studies may be performed. A load estimation algorithm, which provides load information for each time point to be analyzed, can incorporate any or all of the following: spot loads, circuit measurements, and customer time-varying diversified load characteristics. Voltage dependence of loads is considered at the circuit level. It is shown that switching at the system peak can reduce losses, but may cause a marginal increase in system peak. Data structures used to model loads and to store switch configurations as a function of time are described. Example problems are provided to illustrate results. >

Dynamic regrouping in a trunked radio communications systems

Abstract: In a trunked radio frequency communications system, a dynamic regrouping scheme includes an effective user interface, automatic support of multi-site systems, the capability to program individual radio transceivers with multiple new groups dynamically, a fast rate of reconfiguration, instantaneous switch over to prevent radios from residing in immature groups, and a satisfactory mode of operation should the site controller (or site controllers in non-fault tolerant systems) fail. Some of the dynamic regrouping features includes unlimited prestored plans and source and destination groups per plan, regrouping at the plan or destination group level, an advanced user interface, automatic support of multiple sites, fast regrouping at the rate of over 30 radios per second while reducing loading on the system control channel, and fast activation/deactivation. Each plan can be immediately activated or deactivated and users are effectively regrouped together. An alternate control channel is used to regroup transceivers to avoid undue main control channel loading and to increase rate of regrouping.

Distribution network reconfiguration to minimize resistive line losses

Abstract: The objective of the analysis presented is to outline and validate a methodology for the optimization of MV distribution networks operation, so that variable loads are fed under minimum energy losses. Loss minimization is achieved by the installation of shunt capacitors and reconfiguration of the network. The impact of load variation and load modelling on the optimizing decisions is examined. Two different reconfiguration methods are applied and compared. >

Reconfiguration and module replacement in Argus: theory and practice

Abstract: Early work on reconfiguration of distributed applications was carried out as part of the Argus project at MIT. In this paper, we review that work, focusing on correctness conditions and on alternative implementations, and discuss lessons learnt, not only about the reconfiguration system, but also about language design for supporting reconfigurable systems.

Performance and fault-tolerance of neural networks for optimization

Abstract: The fault-tolerance characteristics of time-continuous, recurrent artificial neural networks (ANNs) that can be used to solve optimization problems are investigated. The performance of these networks is illustrated by using well-known model problems like the traveling salesman problem and the assignment problem. The ANNs are then subjected to up to 13 simultaneous stuck-at-1 or stuck-at-0 faults for network sizes of up to 900 neurons. The effect of these faults on the performance is demonstrated, and the cause for the observed fault-tolerance is discussed. An application is presented in which a network performs a critical task for a real-time distributed processing system by generating new task allocations during the reconfiguration of the system. The performance degradation of the ANN under the presence of faults is investigated by large-scale simulations and the potential benefits of delegating a critical task to a fault-tolerant network are discussed. >

Using learning techniques to accommodate unanticipated faults

Abstract: Procedures exist to rapidly accommodate certain types of faults, based on a priori specification of the postfault dynamics. A methodology is presented for accommodating the remaining unanticipated faults. For these two approaches, a tradeoff exists between the time to attain a solution to the reconfiguration problem and the generality of the approach. Unanticipated faults are represented as unmodeled forces and torques. Models of these forces and torques are developed online using a hybrid estimation/learning approach. The hybrid system is designed for fast estimation during the initial transient when a fault occurs, with continually improving performance as postfault information is accumulated by the learning system. Fault accommodation is achieved by a feedforward/feedback control architecture that employs an actuator distribution system to convert desired forces into individual actuator commands. This approach is demonstrated on a simulated autonomous vehicle, where the addition of a hybrid estimation/learning capability is shown to increase performance greatly over time. >

Reconfigurable video game system

Abstract: A reconfigurable video game/simulator system including a personal computer, a video display, a keyboard, and one or more game controllers including a throttle controller. The keyboard is coupled to the throttle controller as are the other game controllers. The throttle controller is coupled to the computer through a keyboard interface port. During a functional mode, the throttle controller receives inputs from the controllers and the keyboard and transmits a corresponding input keycode. During a reconfiguration mode, the user inputs the desired keycodes into the computer, either by inputting them by the keyboard or selecting a preexisting configuration file stored on the computer. The reconfiguration keycodes are then downloaded to the throttle controller over the keyboard interface. The throttle controller receives the reconfiguration keycodes and stores them in a non-volatile memory located within the controller. During a subsequent functional mode, when one of the input devices is actuated, the corresponding reconfiguration keycode is transmitted to the computer.

Dynamic reconfiguration in distributed systems: adapting software modules for replacement

Abstract: Dynamic reconfiguration of a distributed application is the act of changing the configuration of the application as it executes. Examples of configuration changes are replacing a software component (module), moving a module to another machine, and adding or removing a module from the application. The extension to a reconfiguration platform described automatically prepares a module for participation in reconfiguration. A machine-independent method for automatically installing this functionality in the application, given a set of reconfiguration points designated by the programmer, is presented. The focus is on the difficult problem of capturing and restoring the state of a module during a procedure call, when the activation record stack contains crucial parts of the process state. >

Robustness issues in fault-tolerant control

Abstract: Provides a perspective on the state of the art in robust approaches to fault-tolerant control and gives some indication of ways in which the research may best proceed. Key themes are the individual robustness properties of fault detection, fault isolation and controllers used as elements in a fault-tolerant system. Comparisons between active and passive approaches are made and emphasis is placed on the overall robustness properties of the fault-tolerant control system.< >

Dynamic reconfiguration of distributed applications

Abstract: Applications requiring concurrency or access to specialized hardware are naturally written as distributed applications, where each software component (module) can execute on a different machine, and modules interact via bindings. In order to make changes to very long-running applications or those that must be continuously available, we must dynamically change the application. Dynamic reconfiguration of a distributed application is the act of changing the configuration of the application as it executes. Examples of configuration changes are replacing a module, moving a module to another machine, and adding or removing modules from the application. The most challenging aspect of dynamic reconfiguration is that an application in execution has state information, both within the modules and within the communication channels between modules. This state information may need to be transferred from the old configuration to the new in order to reach an application state compatible with the new configuration. Thus, in addition to requiring a mechanism for changing the configuration during execution, dynamic reconfiguration requires that modules be able to divulge and install state information, and requires a mechanism for coordinating the communication during reconfiguration. Prior to this work, all systems supporting some form of dynamic reconfiguration have given the application programmer no support nor even guidelines for capturing and restoring an application's state information. The main focus of this thesis is providing support for module participation during reconfiguration. To this end, we have first defined an approach to capturing and restoring global data that is supported by the reconfiguration primitives, and second, discovered a mechanism for capturing and restoring the activation record stack that is machine-independent. Given reconfiguration points specified by the programmer, we automatically place the capture and restore blocks needed. This new technique has been implemented as part of the general framework we have developed to support dynamic reconfiguration of distributed applications. These reconfiguration capabilities were implemented on top of existing operating systems and compilers, requiring no modifications to either. They support dynamic reconfiguration for applications composed of mixed languages, communicating via message passing, running on heterogeneous distributed platforms.

Load balancing, error recovery, and reconfiguration control in a data movement subsystem with cooperating plural queue processors

Abstract: Provides load balancing, recovery and reconfiguration control for a data move subsystem comprised of a plurality of interconnected and cooperating data move processors (DMPs). Each DMP processor has an associated queue for receiving queue elements (QEs) from central processing units of a data processing system which specify data move requirements of the data processing system. QEs can be transferred between queues of other DMPs or a common queue to achieve load balancing, recovery and reconfiguration control.

Baseline Fault Detection and Exclusion Algorithm

Abstract: This paper provides a status update of the activities of Working Group 5 (WG-S), Fault Detection and Isolation (FDI), of RTCA, Inc. Special Committee 159 (SC-159). SC-159 is in the process of developing Minimum Operational Performance Standards (MOPS) for airborne navigation equipment using the Global Positioning System (GPS) augmented with other systems/equipment/techniques. WG-5 addresses two areas: 1) Navigation requirements; and 2) Development of a baseline FDI algorithm. A brief summary of the navigation requirements is presented, followed by a detailed overview of the baseline algorithm. Rather than providing for fault isolation and reconfiguration, the algorithm uses the fault exclusion principle. The integrated receiver selects any set of six measurements which satisfies the navigation requirements. If the algorithm detects an alarm, the algorithm simply selects another set of six measurements that satisfies the requirements. Test techniques are presented which w-ill allow for statistical testing of the algorithm such that it can be shown that the integrated receiver meets the navigation requirements with a high level of confidence.

Automata networks and methods for obtaining optimized dynamically reconfigurable computational architectures and controls

Abstract: A system for obtaining optimum performance and optimum graceful degradation from Lie algebra descriptions of a spectrum of reconfigurable network architectures, including, neural nets and cellular automata comprised of interconnected nodes. The dynamic performance of the computational process is monitored by continued extraction of Liapounov exponent indicators, reconfiguring said reconfigurable network architecture when said indicators predict non-optimum performance. The reconfigurable networks are reconfigured and compensatory adjustments are made of signal sampling performance and operating system performance of said reconfigurable network architecture, and the operating system architecture is optimized to the computational task by reconfiguration of nodal capabilities and degree of interconnectedness between nodes to obtain any Lie algebra description architectural form between ideal neural net with maximum interconnectedness and ideal cellular automata with maximum nodal capability.

Reconfiguring processor arrays using multiple-track models: the 3-track-1-spare-approach

Abstract: Present new results on systematic procedures for reconfiguring processor arrays in the presence of faulty processors. In particular, the authors consider models that use multiple tracks along every channel and a single spare row (or column) of processing elements (PEs) along each boundary of the array. In the presence of faulty PEs the general methodology for reconfiguration involves replacing every faulty PE logically (rather than physically) by a spare PE through a sequence of logical substitutions; these sequences of substitutions are referred to as compensation paths. The authors show that if there exists a set of compensation paths subjected only to the constraints of continuity and nonintersection, then routing channels with three tracks are enough for the reconfiguration of the array. They refer to the underlying model as a S-track-l-spare model; this is done to distinguish it from other models that not only use multiple tracks but also multiple spare rows (or columns) along each boundary. An efficient algorithm for reconfiguration in our 3-track-1-spare model is presented and its performance evaluated. Experimental results show that the 3-track-1-spare model has much higher reconfiguration probability than other models that use considerably more spare processors. >

Cost and availability tradeoffs in replicated data concurrency control

Abstract: Techniques for optimizing a static voting type algorithm are presented. Our basic optimization models are based on minimizing communications cost subject to given reliability constraints. Two models are presented; in the first model the reliability constraint is failure tolerance, while in the second it is availability. Other simpler models that are special cases of these two basic models and rise from making simplifying assumptions such as equal vote values or constant inter-site communications costs are also discussed. We describe a semi-exhaustive algorithm and efficient heuristics for solving each model. The algorithms utilize a novel signature based method for identifying equivalent vote combinations, and an efficient procedure for computing availability. Computational results for the various algorithms are also given. Finally, the optimized static algorithm was compared against the available copies method, a dynamic algorithm, to understand the relative performance of the two types of algorithms. We found that if realistic reconfiguration times are assumed, then no one type of algorithm is uniformly better. The factors that influence relative performance have been identified. 16 refs., 2 figs., 10 tabs.

Network reconfiguration algorithm for automated distribution systems based on artificial intelligence approach

Abstract: This study develops an expert system to solve the problems of the main transformer (MTr) or feeder overload and the feeder constraint violation in automated distribution systems, where each feeder is subject to the thermal overload and voltage-drop limits. The objective is to perform the network reconfiguration by switching the tie and sectionalizing switches so that the system violation is removed, while achieving load balance of the MTrs and feeders with a fewer number of switching operations. Since the switching operation in a practical system does not cause a large change in the voltage, an approximation method is used in order to check the voltage violation, instead of a full AC load flow solution. To reduce the search space, an expert system based on heuristic rules is presented, and implemented in PROLOG. This system adopts the best first tree search technique. List processing and recursive programming techniques are then utilized to solve the combinatorial type optimization problem. The computational results are also prepared to show the performance of the heuristic algorithms developed. >

Synthesis Methodology for Task Based Reconfiguration of Modular Manipulator Systems

Abstract: In this paper, we deal with two important issues in relation to modular reconfigurable manipulators, namely, the determination of the modular assembly configuration optimally suited to perform a specific task and the synthesis of fault tolerant systems. We present a numerical approach yielding an assembly configuration that satisfies four kinematic task requirements: reachability, joint limits, obstacle avoidance and measure of isotropy. Further, because fault tolerance is a must in critical missions that may involve high costs if the mission were to fail due to a failure in the manipulator system, we address the property of fault tolerance in more detail. Initially, no joint limits are considered, in which case we prove the existence of fault tolerant manipulators and develop an analysis tool to determine the fault tolerant work space. We also derive design templates for spatial fault tolerant manipulators. When joint limits are introduced, analytic solutions become infeasible but instead a numerical solution procedure can be used, as is illustrated through an example.

A functional reconfigurable architecture and compiler for adaptive computing

Abstract: Many computationally intensive tasks spend nearly all of their execution time within a small fraction of the executable code. Substantial gains can be achieved by allowing the configuration and fundamental operations of a processor to adapt to these frequently accessed portions. A method is presented which improves the performance of many computationally intensive tasks by utilizing information extracted at compile-time to synthesize new operations which augment the functionality of a core processor. The newly synthesized operations are targeted for RAM-based field-programmable gate array (FPGA) devices which provide a mechanism for fast processor reconfiguration. A proof-of-concept system called PRISM, consisting of a specialized C configuration compiler and a reconfigurable hardware platform, is presented. Compilation and performance results are provided which confirm the concept viability, and demonstrate significant speed-up over conventional general-purpose architectures. >

Planning of distribution feeder reconfiguration with protective device coordination

Abstract: An algorithm for planning distribution feeder reconfiguration that accounts for protective device coordination is presented. Distribution feeders are normally reconfigured with changing load patterns to achieve load balancing and loss reduction. To ensure that the protective devices are properly coordinated during feeder reconfigurations, the locations of the fuses for the distribution system under study are determined by using the proposed algorithm. A set of switchable regions within which switch operations are allowed for feeder reconfiguration is identified. Once the distribution system has been planned using the developed algorithm, the feeders can be reconfigured in real-time distribution system operation with all protective devices properly coordinated by changing the open/closed states of the switches in the switchable regions. The effectiveness of the approach is demonstrated by conducting feeder reconfiguration planning on a distribution network in the Taiwan power system. >

A clustered failure model for the memory array reconfiguration problem

Abstract: Reconfiguration of memory array using spare rows and spare columns, which has been shown to be a useful technique for yield enhancement of memories, is considered. A clustered failure model that adopts the center-satellite approach of F.J. Meyer and D.K. Pradhan (1989) is proposed and utilized to show that the total number of faulty cells that can be tolerated when clustering occurs is larger than when faults are independent. It is also shown that an optimal solution to the reconfiguration problem can be found in polynomial time for a special case of the clustering model. An efficient approximation algorithm is given for the general case of the probabilistic model assumed. It is shown, through simulation, that the computation time required by this algorithm to repair large arrays containing a significant number of clustered faults is small. >

Fault tolerant VLSI systems

Abstract: A wide variety of fault tolerance techniques for VLSI technology are examined. Device-, gate-, and function-levels fault models are described. The basic methods available to the designer of fault tolerance measures are introduced by surveying redundancy techniques. Techniques of fault detection that use space, time, and information redundancies, algorithm-based fault tolerance, in VLSI components, large-scale processor-level implementations of fault detection, fault tolerance in automated VLSI production systems are discussed. Reconfiguration of the system and recovery of system operation are described. Issues relating to the reconfiguration after discovery of a fault in fabrication or in operation are discussed. Recovery capabilities of a VLSI microprocessor are reviewed. >