Showing papers on "Control reconfiguration published in 1997"

Multivariable adaptive algorithms for reconfigurable flight control

Abstract: The application of multivariable adaptive control techniques to flight control reconfiguration is considered. The objective is to redesign automatically flight control laws to compensate for actuator failures or surface damage. Three adaptive algorithms for multivariable model reference control are compared. The availability of state measurements in this application leads to relatively simple algorithms. The respective advantages and disadvantages of the adaptive algorithms are discussed, considering their complexity and the assumptions that they require. An equation-error based algorithm is found to be preferable. Simulations obtained using a full nonlinear model of a twin-engine jet aircraft are presented. The results demonstrate the ability of the adaptive algorithms to maintain trim after a failure, to restore tracking of the pilot commands despite the loss of actuator effectiveness, and to coordinate the use of the remaining active control surfaces in order to guarantee the decoupling of the rotational axes. A new adaptive algorithm with a variable forgetting feature is also used and is found to yield a useful alternative to covariance resetting as a solution to covariance wind-up in least-squares algorithms.

The Chimaera reconfigurable functional unit

Abstract: By strictly separating reconfigurable logic from their host processor, current custom computing systems suffer from a significant communication bottleneck. In this paper we describe Chimaera, a system that overcomes this bottleneck by integrating reconfigurable logic into the host processor itself with direct access to the host processor's register file, the system enables the creation of multi-operand instruction and a speculative execution model key to high performance, general-purpose reconfigurable computing. It also supports multi-output functions, and utilizes partial run-time reconfiguration to reduce reconfiguration time. Combined, this system can provide speedups of a factor of two or more for general-purpose computing, and speedups of 160 or more are possible for hand-mapped applications.

Useful metrics for modular robot motion planning

Abstract: In this paper the problem of dynamic self-reconfiguration of a class of modular robotic systems referred to as metamorphic systems is examined. A metamorphic robotic system is a collection of mechatronic modules, each of which has the ability to connect, disconnect, and climb over adjacent modules. We examine the near-optimal reconfiguration of a metamorphic robot from an arbitrary initial configuration to a desired final configuration. Concepts of distance between metamorphic robot configurations are defined, and shown to satisfy the formal properties of a metric. These metrics, called configuration metrics, are then applied to the automatic self-reconfiguration of metamorphic systems in the case when one module is allowed to move at a time. There is no simple method for computing the optimal sequence of moves required to reconfigure. As a result, heuristics which can give a near optimal solution must be used. We use the technique of simulated annealing to drive the reconfiguration process with configuration metrics as cost functions. The relative performance of simulated annealing with different cost functions is compared and the usefulness of the metrics developed in this paper is demonstrated.

System and method for modifying membership in a clustered distributed computer system and updating system configuration

Abstract: Multiple nodes can concurrently gain membership in a cluster of nodes of a distributed computer system by broadcasting reconfiguration messages to all nodes of the distributed computer system. In response to a reconfiguration request resulting from a node petitioning to join a cluster or a node leaving the cluster, each node determines to which nodes of the distributed computer system the node is connected, i.e., which are sending reconfiguration messages which the node receives. In addition, if multiple nodes fail substantially simultaneously, each node which continues to operate does not receive a reconfiguration message from each of the failed nodes and the failed nodes are omitted from the proposed new cluster. Thus, multiple simultaneous failures are processed in a single reconfiguration. Each of the member nodes of the proposed cluster determine the membership of the proposed cluster and broadcast a reconfiguration message to all proposed member nodes and collects similar messages. If all reconfiguration messages agree, the proposed cluster is accepted. In the case in which one or more nodes leave the cluster, quorum is established in the new cluster relative to the old cluster.

Distribution feeder reconfiguration for service restoration and load balancing

Abstract: This paper describes two feeder reconfiguration algorithms for the purpose of service restoration and load balancing in a real-time operation environment. The developed methodologies combine optimization techniques with heuristic rules and fuzzy logic for efficiency and robust performance. Many of practical operating concerns of feeder reconfiguration and the coordination with other distribution automation applications are also addressed. The developed algorithms have been implemented as a production grade software. Test results on PG&E distribution feeders show that the performance is efficient and robust.

Incremental reconfiguration for pipelined applications

Abstract: This paper examines the implementation of pipelined applications using run-time reconfiguration. Throughput and latency of pipelined applications can be significantly improved when reconfiguration is performed at the level of individual pipeline stages, as opposed to configuration of the entire FPGA. If reconfiguration and execution can be performed simultaneously, the performance of a pipelined application approaches its theoretical maximum. This paper proposes a new FPGA configuration mechanism, called striping, that supports pipeline stage reconfiguration and simultaneous configuration and execution. Additionally, the use of the pipeline stage as the atomic unit of reconfiguration introduces a design abstraction that enables the development families of upwardly-compatible FPGAs and virtual hardware design.

Distribution network reconfiguration for energy loss reduction

Abstract: A new method for energy loss reduction in distribution networks is presented It is based on known techniques and algorithms for radial network analysis-oriented element ordering, power summation method for power flow, statistical representation of load variations and a recently developed energy summation method for the computation of energy losses These methods, combined with the heuristic rules developed to lead the iterative process, make the energy loss minimization method effective, robust and fast It presents an alternative to the power minimization methods for operation and planning purposes

A dynamic reconfiguration run-time system

Abstract: The feasibility of run-time reconfiguration of FPGAs has been established by a large number of case studies. However, these systems have typically involved an ad hoc combination of hardware and software. The software that manages the dynamic reconfiguration is typically specialised to one application and one hardware configuration. We present three different applications of dynamic reconfiguration, based on research activities at Glasgow University, and extract a set of common requirements. We present the design of an extensible run-time system for managing the dynamic reconfiguration of FPGAs, motivated by these requirements. The system is called RAGE, and incorporates operating-system style services that permit sophisticated and high level operations on circuits.

Reconfigurable processing: the solution to low-power programmable DSP

Abstract: One of the most compelling issues in the design of wireless communication components is to keep power dissipation between bounds. While low-power solutions are readily achieved in an application-specific approach, doing so in a programmable environment is a substantially harder problem. This paper presents an approach to low-power programmable DSP that is based on the dynamic reconfiguration of hardware modules. This technique has shown to yield at least an order of magnitude of power reduction compared to traditional instruction-based engines for problems in the area of wireless communication.

Distribution network reconfiguration for loss reduction using fuzzy controlled evolutionary programming

Abstract: Network reconfiguration for loss reduction in distribution systems is a very important way to save energy. However, due to its nature it is an inherently difficult optimisation problem. A new type of evolutionary search technique, evolutionary programming (EP), has been adopted and improved for this particular application. To improve the performance of EP, a fuzzy controlled EP (FCEP), based on heuristic information, is first proposed. The mutation fuzzy controller adaptively adjusts the mutation rate during the simulated evolutionary process. The status of each switch in distribution systems is naturally represented by a binary control parameter 0 or 1. The length of string is much shorter than those proposed by others. A chain-table and combined depth-first and breadth-first search strategy is employed to further speed up the optimisation process. The equality and inequality constraints are imbedded into the fitness function by penalty factors which guarantee the optimal solutions searched by the FCEP are feasible. The implementation of the proposed FCEP for feeder reconfiguration is described in detail. Numerical results are presented to illustrate the feasibility of the proposed FCEP.

Design of integrated systems for the control and detection of actuator/sensor faults

Abstract: Considers control systems operating under potentially faulty conditions. Discusses the problem of designing a single unit which not only handles the required control action but also identifies faults occurring in actuators and sensors. In common practice, units for control and for diagnosis are designed separately. Attempts to identify situations in which this is a reasonable approach and cases in which the design of each unit should take the other into consideration. Presents a complete characterization for each case and gives systematic design procedures for both the integrated and non‐integrated design of control and diagnosis units. Shows how a combined module for control and diagnosis can be designed which is able to follow references and reject disturbances robustly, control the system so that undetected faults do not have disastrous effects, reduce the number of false alarms and identify which faults have occurred.

An autonomous spacecraft agent prototype

Abstract: This paper describes the New Millennium Remote Agent (NMRA) architecture for autonomous spacecraft control systems The architecture supports challenging requirements of the autonomous spacecraft domain not usually addressed in mobile robot architectures, including highly reliable autonomous operations over extended time periods in the presence of tight resource constraints, hard deadlines, limited observability, and concurrent activity A hybrid architecture, NMRA integrates traditional real-time monitoring and control with heterogeneous components for constraint-based planning and scheduling, robust multi-threaded execution, and model-based diagnosis and reconfiguration Novel features of this integrated architecture include support for robust closed-loop generation and execution of concurrent temporal plans and a hybrid procedural/deductive executive

A new matrix model for discrete event systems: application to simulation

Abstract: Simulation schemes for discrete event (DE) systems based on a new DE matrix formulation are presented. This new formulation is a hybrid system with logical and algebraic components that allows fast, direct design and reconfiguration of rule-based controllers for manufacturing systems. It applies to general DE systems that include shared resources, dispatching, circular waits, and variable part routing. A certain DE matrix state equation together with the familiar Petri net marking transition equation yield a complete dynamical description of a DE system. Our goal in this article is to show that this provides a simplified computer tool that allows efficient simulation and modeling for DE systems.

Reconfigurable video game controller

Abstract: A reconfigurable video game controller for use with a video game program running on a personal computer platform, wherein the controller may be reconfigured or reprogrammed directly by the user so that user-defined keycodes are obtained from a local memory and transmitted to the computer while playing the video game. The controller is reconfigured by selecting desired input switches and then entering keycodes via an attached computer keyboard while in a setup mode, and the keycodes and selected input switch codes are transmitted to the computer for display to the user under the supervision of a reconfiguration window program. The controller is also capable of storing local codes for use in controlling operation of the controller during the video game play mode. One type of local code is a delay code useful in controlling delay of individual keycode transmissions in a multi-keycode playback sequence. Another type of local code is a force-feedback code, which is useful in controlling force-feedback control circuitry associated with the input switches such that the user can program which types of force-feedback effects are to be implemented by the controller during game play.

Software organization for dynamic and adaptable wearable systems

Abstract: There is a growing interest in a class of systems having dynamic and adaptable properties. In this paper we discuss our work on one subclass of such systems, that of wearable computers. In particular, our interest is in the software organization necessary to build wearable computing systems. We will examine some of the key properties of such a software organization such as the ability to rapidly and dynamically reconfigure software to meet both physical changes and information changes of the wearable system. This has lead us to study a middleware layer for a wearable system that supports dynamic reconfiguration. The middleware approach is studied in the context of the NETMAN-a network maintenance assistant. Current results from the system evaluations and the final system requirements and open issues are presented.

Reconfigurability consideration design of components and manufacturing systems

Abstract: A manufacturing system should be able to produce a variety of components at a low cost and in a short period of time. In this paper, manufacturing system reconfigurability in agile manufacturing is discussed. The reconfiguration of a manufacturing system is analysed based on the relationship of component routes, material handling costs, reconfiguration cost, and so on. Components with similar routes are selected in an early design stage in order to minimise the number of machines to be relocated. The variety of resources required is reduced by a proper selection of components and manufacturing processes for system reconfiguration. An algorithm for selection of components and manufacturing resources is developed.

Wavelength-routed optical-networks: linear formulation, resource budgeting tradeoffs, and a reconfiguration study

Abstract: We consider a wavelength-routed optical network operated as a lightpath-based virtual topology. We present an exact linear programming formulation for the complete virtual topology design, including choice of constituent lightpaths, routes for these lightpaths, and intensity of packet flows through these lightpaths. By making a shift in the objective function to minimal hop distance and by relaxing the wavelength-continuity constraints (i.e., assuming wavelength converters at all nodes), we demonstrate that the entire optical network design problem can be linearized and hence solved optimally. The linear formulation can be used to design a balanced network, such that the utilizations of both transceivers and wavelengths are high, i.e., neither of these expensive resources are under-utilized. We also use the linear formulation to provide a reconfiguration methodology in order to adapt the virtual topology to changing traffic conditions.

Run-time reconfiguration method for programmable units

Abstract: A method of run-time reconfiguration of a programmable unit is provided, the programmable unit including a plurality of reconfigurable function cells in a multidimensional arrangement. An event is detected. The source of the detected event is determined, and an address of an entry in a jump table is calculated as a function of the source of the event, the entry storing a memory address of a configuration for a reconfigurable function cell. The entry is retrieved and a state of a corresponding reconfigurable cell is determined. If the reconfigurable cell is in a reconfiguration state, the reconfigurable cell is reconfigured as a function of the configuration data. If the reconfigurable cell is not in a reconfiguration state, the configuration data is stored in a FIFO.

Improving functional density through run-time constant propagation

Abstract: Circuit specialization techniques such as constant propagation are commonly used to reduce both the hardware resources and cycle time of digital circuits. When reconfigurable FPGAs are used, these advantages can be extended by dynamically specializing circuits using run-time reconfiguration (RTR). For systems exploiting constant propagation, hardware resources can be reduced by folding constants within the circuit and dynamically changing the constants using circuit reconfiguration. To measure the benefits of circuit specialization, a functional density metric is presented. This metric allows the analysis of both static and run-time reconfigured circuits by including the cost of circuit reconfiguration. This metric will be used to justify runtime constant propagation as well as analyze the effects of reconfiguration time on run-time reconfigured systems.

Distribution feeder reconfiguration for operation cost reduction

Abstract: This paper describes a new feeder reconfiguration algorithm for the purpose of reducing the distribution network operating cost in a real-time operation environment. The methodology developed is a heuristic-based approach which emphasizes minimizing the cost of operation over a specified time period rather than a fixed operating point. The practical operating concerns of feeder reconfiguration and the coordination with other distribution automation applications are also addressed. The developed algorithm has been implemented as a production grade software. Test results on PG&E distribution feeders show that the performance of this software is efficient and robust.

Wormhole run-time reconfiguration

Abstract: Configurable Computing Machines (CCMs) are an emerging class of computing platform which provide the computational performance benefits of ASICs, yet retain the flexibility and rapid reconfigurability of general purpose microprocessors. In these platforms, computational "hardware" is essentially swapped in and out of the platform as needed, much like paging in virtual memory systems. For an efficient platform, the swapping of the computational hardware (referred to as Run-Time Reconfiguration, or RTR) must be rapid. Thus far, the means of altering the configuration of CCMs has relied on global control strategies that present a fundamental bottleneck to the potential bandwidth of configuration information flowing into the CCM. Wormhole Run-time Reconfiguration is presented as a distributed control methodology that is applicable not only to the problem of device-level CCM reconfiguration, but to system-wide concurrent computing as a whole. The Virginia Tech Colt/Stallion integrated circuits are computational FPGAs incorporating Wormhole RTR concepts, and are discussed as a case study.

Method and system for configuring an array of logic devices

Abstract: A system and method for partial reconfiguration of a gate array includes generating a design database (314) by placement and routing (312) of a logic circuit. The design database is accessed to modify (322) logic cell configurations created by the place and route operation. Based on the modifications, a partial configuration bitstream containing only bitstrings which implement the modified logic cells is created (324). The partial configuration bitstream is downloaded (326) to the gate array, thereby effectuating a partial reconfiguration of the gate array. In an alternate embodiment, a system in accordance with the present invention includes software utilities (604) which allow an application program (602) executing in a system containing a programmable gate array to reconfigure the array on-the-fly. The utilities include routines for modifying the design in response to external conditions detected during run-time. This approach obviates the need for providing a set of predetermined alternate designs, allowing the application to make that determination on its own.

Software reconfiguration engine

Abstract: Single users or workgroups interact with the reconfiguration engine through the software reconfiguration workbench. The target source code is reconfigured through a collection of semi-automated and fully automated processes in a step-by-step iterative technique. The system maintains a repository of data corresponding to the software entities being reconfigured. Several modules within the reconfiguration engine access this repository allowing the modules to perform a rigorous reconfiguration through a series of iterative refinements. The target source code is analyzed based on a user-configurable lexicon of keywords and also based on attribute tables maintained in the repository. Software entities undergoing change are tagged using a tagging system that denotes the type of change operation to be performed and the degree of certainty that the tag has been properly assigned. Impact analysis across the entire software system detects entities subject to change by monitoring data flow between software systems. Impact analysis thus identifies software entities that might otherwise have been overlooked. Source code changes are applied using code master templates selected based on the tags. New programs can also be generated using code master templates selected based on the tags which can be used to convert the data files in the system to correspond to the changed application code.

Networked sensor system

Abstract: A networked sensor system that simultaneously acquires, processes, and transmits sensor data under the control of a central processing unit. The system includes sensors connected to sensor processing modules. The sensor processing modules are serially coupled together and to the central processing unit by a fiber optic network. The central processing unit can change the sensor sampling rate by changing a global clock rate, can describe the number and layout of sensor processing modules and their associated sensors allowing for reconfiguration in accordance with a desired application, and can download code to the sensor processing modules for modifying processing functions for a given application. The global clock also allows for synchronous sampling throughout the network. Sensor gain in the sensor processing modules is dynamically programmed by the central processing unit.

On the reconfiguration of degradable VLSI/WSI arrays

Abstract: This paper consider the problem of reconfiguring two dimensional very large scale integration (VLSI/WSI) arrays via the degradation approach. In this approach, all elements are treated uniformly and no elements are dedicated as spares. The goal is to derive a fault-free subarray T from the defective host array such that the dimensions of T are larger than some specified minimum. This problem has been shown to be NP-complete under various switching and routing constraints. However, we show that a special case of the reconfiguration problem with row bypass and column rerouting capabilities is optimally solvable in linear time. Using this result, a new fast and efficient reconfiguration algorithm is proposed. Empirical study shows that the new algorithm indeed produces good results in terms of the percentages of harvest and degradation of VLSI/WSI arrays.