Showing papers on "Control reconfiguration published in 1999"

A control-based middleware framework for quality-of-service adaptations

Abstract: In heterogeneous environments with performance variations present, multiple applications compete for and share a limited amount of system resources and suffer from variations in resource availability. These complex applications are desired to adapt themselves and to adjust their resource demands dynamically. On one hand, current adaptation mechanisms built within an application cannot preserve global properties such as fairness; on the other hand, adaptive resource management mechanisms built within the operating system are not aware of data semantics in the application. In this paper, we present a novel middleware control framework to enhance the effectiveness of quality-of-service (QoS) adaptation decisions by dynamic control and reconfiguration of internal parameters and functionalities of a distributed multimedia application. Our objective is to satisfy both system-wide properties (such as fairness among concurrent applications) and application-specific requirements (such as preserving the critical performance criteria). The framework is modeled by the task control model and the fuzzy control model, based on rigorous results from the control theory, and verified by the controllability and adaptivity of a distributed visual tracking application. The results show validation of the framework, i.e., critical application quality parameters can be preserved via controlled adaptation.

A heuristic nonlinear constructive method for distribution system reconfiguration

Abstract: This reconfiguration algorithm starts with all operable switches open, and at each step, closes the switch that results in the least increase in the objective function. The objective function is defined as incremental losses divided by incremental load served. A simplified loss formula is used to screen candidate switches, but a full load flow after each actual switch closing maintains accurate loss and constraint information. A backtracking option mitigates the algorithm's greedy search. This algorithm takes more computer time than other methods, but it models constraints and control action more accurately. A network load flow is used to provide a lower bound on the losses. The paper includes results on several test systems used by other authors.

Overload management in real-time control applications using (m, k)-firm guarantee

Abstract: Tasks in a real-time control application are usually periodic and they have deadline constraints by which each instance of a task is expected to complete its computation, even in the adverse circumstances caused by component failures. Techniques to recover from processor failures often involve a reconfiguration in which all tasks are assigned to fault-free processors. This reconfiguration may result in processor overload where it is no longer possible to meet the deadlines of all tasks. In this paper, we discuss an overload management technique which discards selected task instances in such a way that the performance of the control loops in the system remain satisfactory even after a failure. The technique is based on the rationale that real-time control applications can tolerate occasional misses of the control law updates, especially if the control law is modified to account for these missed updates. The paper devises a scheduling policy which deterministically guarantees when and where the misses will occur. The paper also proposes a methodology for modifying the control law to minimize the deterioration in the control system behavior as a result of these missed control law updates.

Reconfigurable display architecture with spontaneous reconfiguration

Abstract: A control panel/display subsystem acts as a device portal for interacting with multiple devices interconnected via a dynamic local network. Display content and the human-machine interface (HMI) implemented using the display subsystem automatically reconfigures itself when new devices are added to the vehicle network. An interface specifier enabling each new device to work with the device portal is obtained either from a local archive or a remote archive via connection with a remote network.

A study of the use of corrective switching in transmission systems

Abstract: This paper reviews several publications on the use of switching operations as a control means to relieve overload in transmission lines/transformers or to solve voltage problems. Previous research efforts dealing with the subject are analysed in relation to the objective of the manoeuvre, priority of this kind of action in relation to the others available and the search procedure employed, besides other implementation details. Some practical issues related to switching as a control option are also addressed in this paper. The purpose is to investigate the reasons why such procedures are adopted only in a few systems, and in most of them rarely employed. Distribution feeder reconfiguration for loss reduction or load balancing is not dealt here, neither are switching sequences for network restorative control.

Practical study on wireless transmission of power and information for autonomous decentralized manufacturing system

Abstract: In previous papers, the authors have already introduced the idea of an autonomous decentralized manufacturing system (ADMS), in which machines receive electrical energy through wireless power transmission and also are decentrally controlled through wireless transmission of the control and feedback data. With this idea, the degree of freedom in motion control is enlarged, and the system has the capability of adaptive reconfiguration to product variation as a result. In this paper, the practical problems for realization of wireless transmission of power and information (WTPI) needed for the proposed ADMS are clarified, and the practical solutions to these problems are presented. Several industrial applications of the WTPI are also introduced.

Network reconfiguration for load balancing in distribution networks

Abstract: Network reconfiguration of a power distribution system is an operation to alter the topological structure of distribution feeders by changing open/closed status of sectionalising and tie switches. By transferring loads from the heavily loaded feeders to the lightly loaded ones, network reconfiguration can balance feeder loads and alleviate overload conditions of a network. A general formulation of the network reconfiguration for load balancing is given for the optimal balancing of loads in distribution network and a solution approach is presented. The solution employs a search over different radial configurations, created by considering branch-exchange type switches. The proposed algorithm, called distance measurement technique (DMT) has been developed based on the two-stage solution methodology. The first stage finds a loop, which gives the maximum improvement in load balancing in the network. In the second stage, a switching option is determined in that loop to obtain maximum improvement in load balancing. The DMT employs a graphical method in which different circles are drawn and the distances of various points from the centre of the loop circle are computed to achieve the optimal or near optimal configuration for load balancing. The solution algorithm of the proposed method can identify the most effective branch-exchange operations for load balancing with minimum computational effort. The algorithm has been tested with promising results on a 69-bus radial distribution system.

Optical memory for computing and information processing

Abstract: The high data transfer rate achievable in page-oriented optical memories demands for parallel interfaces to logic circuits able to process efficiently the data. The Optically Programmable Gate Array, an enhanced version of a conventional FPGA, utilizes a holographic memory accessed by an array of VCSELs to program its logic. Combining spatial and shift multiplexing to store the configuration pages in the memory, the OPGA module is very compact and has extremely short configuration time allowing for dynamic reconfiguration. The reconfiguration capability of the OPGA can be applied to solve more efficiently problems in pattern recognition and digit classification.

Control theory-based foundations of self-controlling software

Abstract: The authors' control theory based paradigm gives a framework for specifying and designing software that controls itself as it operates. Based on this paradigm, their self controlling software model supports three levels of control: feedback, adaptation, and reconfiguration. We believe this model can lead to software systems with an impressive capability for responding, adapting, and reconfiguring. Of course, self-controllability does not come for free. The application's functionality must be supplemented with some redundancy to implement the mechanisms of self-adaptability: evaluation, model estimation, adaptation, and reconfiguration. However, we can reduce this overhead and improve overall system performance by: evaluating the behavior based on a sample of feedback iterations rather than on every iteration; generating more efficient interfaces between components at runtime; and constructing more efficient component organizations, scheduling algorithms, and evaluation algorithms at runtime.

Fault-tolerant fiber-optical beam control modules

Abstract: Fiber-optic beam routing and amplitude control modules based on a unique fault-tolerant scheme using a macro-pixel to control an optical beam are proposed. The unique macro-pixel method involving multiple device pixels per beam inherently provides a robust digital technique for module control while adding to the optical beam alignment tolerance and resistance to catastropic failure for the overall module. The macropixel approach solves the speed versus alignment and failure sensitivity dilemma present in single pixel element based optical micromechanical systems (MEMS). Specifically proposed are fault tolerant fiber-optic attenuators and switches using several microactuated micromirrors per optical beam. Transmissive and reflective module geometries are proposed using small tilt and small distance piston-action micromirrors, leading to fast module reconfiguration speed fiber optic signal controls. The macro-pixel design approach is extended to other pixel technologies such as polarization rotating pixels. The proposed fiber-optic attenuator and switch designs can be extended to realize a complex network of multiple attenuators and switches that can be applied to N-wavelength multiplexed fiber-optic networks.

Architectures for communication networks

Abstract: In a communications network comprising a plurality of interconnected nodes, each node comprises at least one network device requiring allocated transmission channels, a switch connected to the network device for configuring transmission channels connected to other nodes, and a configuration controller connected to the network device and to the switch for controlling configuration of the transmission channels. The configuration controller receives signals from the network device indicative of traffic load on the network device, processes the received signals to determine that reconfiguration of the transmission channels is favoured and determines a favoured reconfiguration of the transmission channels. The configuration controller also communicates with configuration controllers at other nodes to determine paths between nodes for reconfiguration of the transmission channels, and communicates with the switch, configuration controllers at other nodes and the network device to implement reconfiguration of the transmission channels. The network devices may be routers, data switches, servers or combinations thereof.

Self-reconfiguration planning for a class of modular robots

Abstract: Modular self-reconfigurable robots consist of large numbers of identical modules that possess the ability to reconfigure into different shapes as required by the task at hand. For example, such a robot could start out as a snake to traverse a narrow pipe, then re-assemble itself into a six-legged spider to move over uneven terrain, growing a pair of arms to pick up and manipulate an object at the same time. This paper examines the self-reconfigurable problem and present a divide-and-conquer strategy to solve reconfiguration for a class of problems referred to as closed-chain reconfiguration. This class includes reconfigurable robots whose topologies are described by 1D combinatorial topology. A robot topology is first decomposed into a hierarchy of small 'substrates' belonging to a finite set. Basic reconfiguration operations between the substructures in the set are precomputed, optimized and stored in a lookup table. The entire reconfiguration then consists of an ordered series of simple, precomputed sub-reconfigurations happening locally among the substructures.© (1999) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Pipeline vectorization for reconfigurable systems

Abstract: This paper presents pipeline vectorization, a method for synthesizing hardware pipelines in reconfigurable systems based on software vectorizing compilers. The method improves efficiency and ease of development of reconfigurable designs, particularly for users with little electronics design experience. We propose several loop transformations to customize pipelines to meet hardware resource constraints, while maximising available parallelism. For ran-time reconfigurable systems, we apply hardware specialization to increase circuit utilization. Our approach is especially effective for highly repetitive computations in DSP and multimedia applications. Case studies using FPGA-based platforms are presented to demonstrate the benefits of our approach and to evaluate trade-offs between alternative implementations. The loop tiling transformation, for instance, has been found to improve performance by 30 to 40 times above a PC-based software implementation, depending on whether run-time reconfiguration is used.

Method and apparatus for providing multiple electronic design solutions

Abstract: An electronic computer aided design system provides for automated operation of a plurality of design tools to produce multiply design solutions to an initial circuit layout Through the user entry of relative weights for: power, timing and area, different solutions to an initial layout can be generated exhibiting the requested balance of improvements over the original layout A novel parts placement process is disclosed which prioritizes the reconfiguration of the initial design in a manner which assures that the multiple solutions will be generated which exhibit improved performance over the original layout in accordance with the priorities established by the user

Fault emulation: A new methodology for fault grading

Abstract: In this paper, we introduce a method that uses the field programmable gate array (FPGA)-based emulation system for fault grading. The real-time simulation capability of a hardware emulator could significantly improve the performance of fault grading, which is one of the most time consuming tasks in the circuit design and test process. We employ a serial fault emulation algorithm enhanced by two speed-up techniques. First, a set of independent faults can be injected and emulated at the same time. Second, multiple dependent faults can be simultaneously injected within a single FPGA-configuration by adding extra circuitry. Because the reconfiguration time of mapping the numerous faulty circuits into the FPGA's is pure overhead and could be the bottleneck of the entire process, using extra circuitry for injecting a large number of faults can reduce the number of FPGA-reconfigurations and, thus, improving the performance significantly. In addition, we address the issue of handling potentially detected faults in this hardware emulation environment by using the dual-railed logic. The performance estimation shows that this approach could be several orders of magnitude faster than the existing software approaches for large sequential designs.

Configurable logic for digital communications: some signal processing perspectives

Abstract: For the past two decades software programmable digital signal processors and ASICs have provided hardware solutions for signal processing system designers A new option has become available: field programmable gate arrays FPGA-based DSP platforms allow the designer to realize a data path that exactly matches the required processing, while at the same time maintaining the flexibility of a software approach This article presents an overview of some FPGA DSP applications Several filter designs are presented, and the use of CORDIC arithmetic for constructing an FPGA carrier recovery loop is outlined In addition to presenting design examples that can be realized using present-generation devices and tools, we take a brief look at how the dynamic reconfiguration aspect of certain FPGAs could be exploited in future-generation communication technologies

Optically reconfigurable processors

Abstract: Reconfigurable processors bring a new computational paradigm where the processor modifies its structure to suit a given application, rather than having to modify the application to fit the device. The Optically Programmable Gate Array, an enhanced version of a conventional FPGA, utilizes a holographic memory accessed by an array of VCSELs to program its logic. Combining spatial and shift multipexing to store the configuration pages in the memory, the OPGA module is very compact and has extremely short configuration time allowing for dynamic reconfiguration. The reconfiguration capability of the OPGA can be applied to solve more efficiently problems in pattern recognition and digit classification.

X-33 Ascent Flight Controller Design by Trajectory Linearization: A Singular Perturbational Approach

Abstract: The flight control of X-33 poses a challenge to conventional gain-scheduled flight controllers due to its large attitude maneuvers from liftoff to orbit and reentry. In addition, a wide range of uncertainties in vehicle handling qualities and disturbances must be accommodated by the attitude control system. Nonlinear tracking and decoupling control by trajectory linearization can be viewed as the ideal gain-scheduling controller designed at every point on the flight trajectory. Therefore it provides robust stability and performance at all stages of flight without interpolation of controller gains, and eliminates costly controller redesigns due to minor airframe alteration or mission reconfiguration. A prototype trajectory linearization design for X-33 ascent flight controller was designed and tested with 3-DOF and 6-DOF simulations during the 10 weeks SFFP. It is noted that the 6-DOF results were obtained from the 3-DOF design with only a few hours of tuning, which demonstrates the inherent robustness of the design technique. It is this "plug-and-play" feature that is much needed by NASA for the development, test and routine operations of the RLVs. Plans for further research are also presented.

Simple motion planning strategies for spherobot: a spherical mobile robot

Abstract: Mobile robots have been traditionally designed with wheels and few have explored designs with spherical exo-skeletons. A spherical mobile robot that offers to have a number of advantages, is proposed in the paper. The success of our design is contingent upon development of control strategies for reconfiguration of the sphere. We address the open-loop control problem and present two strategies for reconfiguration. The first strategy uses spherical triangles to bring the sphere to a desired position with a desired orientation. The second strategy uses a specific kinematic model and generates a trajectory comprising straight lines and circular arc segments. As compared to existing motion planners, our strategies require less computation and provide scope for easy implementation.

I(CES)-Cubes: A Modular Self-Reconfigurable Bipartite Robotic System

Abstract: In this manuscript, we introduce I(CES)-Cubes, a class of 3D modular robotic system that is capable of reconfiguring itself in order to adapt to its environment. This is a bipartite system, i.e. a collection of (i) active elements capable of actuation, and (ii) passive elements acting as connectors between actuated elements. Active elements, called links, are 3-DOF manipulators that are capable of attaching/detaching themselves to/from the passive elements. The cubes can then be positioned and oriented using links, which are independent mechatronic elements. Self- reconfiguration property enables the system to performed locomotion tasks over difficult terrain. For example, the system would be capable of moving over obstacles and climbing stairs. These task are performed by positing and orienting cubes and links to form a 3D network with required shape and position. This paper describes the design of the passive and active elements, the attachment mechanics, and several reconfiguration scenarios. Specifics of the hardware implementation and result of experiments with current prototypes are also given.© (1999) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

Planning quasi-static fingertip manipulations for reconfiguring objects

Abstract: We address the global motion planning aspects of dexterous manipulation by a multifingered robotic hand. The specific task we address is: starting from a given initial grasp of a three-dimensional (3-D) object O, find feasible quasistatic trajectories (rolling/sliding motions and forces) for the fingertips to move O to a desired final configuration. We call this the reconfiguration problem. Our planner is based on a two-level algorithm combining a graph search on the configuration space of the object and a local planner that solves for instantaneous quasistatic motions of the entire manipulation system. The planner is used for simulating several complex reconfiguration tasks for smooth objects demonstrating the promise of our approach.

Dynamic reconfiguration to support concurrent applications

Abstract: This paper describes the development of a dynamically reconfigurable system that can support multiple applications running concurrently. A dynamically reconfigurable system allows hardware reconfiguration while part of the reconfigurable hardware is busy computing. An FPGA resource manager (RM) is developed to allocate and de-allocate FPGA resources and to preload FPGA configuration files. For each individual application, different tasks that require FPGA resources are represented as a flow graph which is made available to the RM so as to enable efficient resource management and preloading. The performance of using the RM to support several applications is summarized. The impact of supporting concurrency and preloading in reducing application execution time is demonstrated.

A dynamically reconfigurable logic engine with a multi-context/multi-mode unified-cell architecture

Abstract: Reconfigurable logic LSIs, such as FPGAs, have been perceived as devices for prototyping and emulation. As the size and speed of FPGAs rapidly increase, however, they have begun to be used in /spl mu/P-based systems as reconfigurable accelerators. The idea is to achieve both hardware efficiency and software programmability by dynamically reconfiguring FPGAs. This idea, reconfigurable computing, provides an attractive solution especially for media/network-centric applications. Various types of reconfiguration scenarios in such applications, however, require logic LSIs to significantly enhance reconfigurability in three respects: (1) agility-reconfiguration may need to take place in very short intervals, say within a hundred /spl mu/P instructions; (2) controllability-reconfiguration may be controlled from an external /spl mu/P or by itself; (3) flexibility-reconfiguration target may be arbitrarily positioned and irregularly shaped. The dynamically reconfigurable logic engine (DRLE) prototype described meets this challenge.

Method for dynamic performance optimization in a data-over-cable system

Abstract: A method and system for optimizing performance in a data-over-cable system. The method includes determining parameters for data transmission on an upstream channel of the data-over-cable system, and negotiating use of the parameters. A measurement is made of a signal-to-noise ratio (“SNR”) on the upstream channel. Associated with the SNR and a target packet-error-ratio (“PER”) are parameters that provide optimal data throughput. The parameters, such as symbol rate, type of modulation, or amount of error correction, are used to construct a message that is sent to the cable modems. The message instructs the cable modems to reconfigure themselves to transmit according to the parameters. The reconfiguration helps ensure optimal performance.

Static and dynamic configurable systems

Abstract: Field-programmable gate arrays (FPGAs) are large, fast integrated circuits-that can be modified, or configured, almost at any point by the end user. Within the domain of configurable computing, we distinguish between two modes of configurability: static-where the configurable processor's configuration string is loaded once at the outset, after which it does not change during execution of the task at hand, and dynamic-where the processor's configuration may change at any moment. This paper describes four applications in the domain of configurable computing, considering both static and dynamic systems, including: SPYDER (a reconfigurable processor development system), RENCO (a reconfigurable network computer), Firefly (an evolving machine), and the BioWatch (a self-repairing watch). While static configurability mainly aims at attaining the classical computing goal of improving performance, dynamic configurability might bring about an entirely new breed of hardware devices-ones that are able to adapt within dynamic environments.

Robot modularity for self-reconfiguration

Abstract: Metamorphic robots are an emerging field in which robotics can dynamically reconfigure shape and size not only for individual roots but also for complex structures that are formed by multiple robots. Such capability is highly in tasks such as fire fighting, earthquake rescue, and battlefield scouting, where robots must go through unexpected situations and obstacles and perform tasks that are difficult for fixed-shape robots. This research direction present a number of technical research challenges. Specifically, metamorphic robots must be able to decompose and reassemble at will from a set of basic connectable modules. Such modules must be small, self-sufficient and relatively homogeneous. In this paper, we present our approach to address these issue and describe the design of the CONRO modules. These modules are equipped with a low power micro-processor, memory chips, sensors, actuators, power supplies, and miniature mechanical connectors used for communication and power sharing. We will also describe a set of control mechanisms for controlling gaits and reconfigurations. We conclude the paper with a status report of the CONRO project and a list of the future work needed to fully realize the construction of the CONRO metamorphic robots.© (1999) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.