Control reconfiguration

About: Control reconfiguration is a research topic. Over the lifetime, 22423 publications have been published within this topic receiving 334217 citations.

Diagnostic testing of embedded memories using BIST

Abstract: The increasing use of large embedded memories in systems-on-chips requires automatic memory reconfiguration to avoid the need for external accessibility. In this work, effective diagnostic memory tests of linear order O(N) are proposed that enable memory reconfiguration, and their diagnostic capabilities are analyzed. In particular, these tests allow single-cell faults to be distinguished from multiple-cell faults, such as coupling faults. In contrast to conventional O(N) tests, all cells involved in a fault are detected and localized, which allows complete reconfiguration using minimal-area BIST hardware that compares favorably with other BIST designs.

Linear Current Flow Equations With Application to Distribution Systems Reconfiguration

Abstract: Conventionally, power flow equations are used for distribution systems (DS) analysis to find the nodal voltages. For the particular form of the DS reconfiguration problem, however, a direct formulation in terms of branch flows allows a substantial increase in solution efficiency from an optimization point of view. In this paper, a set of linear current flow (LCF) equations are derived for DS. This formulation is then used within the network reconfiguration problem for loss minimization. A mixed-integer quadratically constrained programming (MIQCP) formulation, together with a mixed-integer linear programming (MILP) formulation, are proposed in this paper and assessed through simulations. In these comparisons, the MILP formulation shows computational advantages over the MIQCP version and the preceding literature. The proposed methods are evaluated on several test systems.

Adapting to intermittent faults in multicore systems

Abstract: Future multicore processors will be more susceptible to a variety of hardware failures. In particular, intermittent faults, caused in part by manufacturing, thermal, and voltage variations, can cause bursts of frequent faults that last from several cycles to several seconds or more. Due to practical limitations of circuit techniques, cost-effective reliability will likely require the ability to temporarily suspend execution on a core during periods of intermittent faults.We investigate three of the most obvious techniques for adapting to the dynamically changing resource availability caused by intermittent faults, and demonstrate their different system-level implications. We show that system software reconfiguration has very high overhead, that temporarily pausing execution on a faulty core can lead to cascading livelock, and that using spare cores has high fault-free cost. To remedy these and other drawbacks of the three baseline techniques, we propose using a thin hardware/firmware layer to manage an overcommitted system -- one where the OS is configured to use more virtual processors than the number of currently available physical cores. We show that this proposed technique can gracefully degrade performance during intermittent faults of various duration with low overhead, without involving system software, and without requiring spare cores.

Adaptive fault tolerant control using integral sliding mode strategy with application to flexible spacecraft

Abstract: Adaptive-based integral sliding mode control scheme is developed to solve the actuator fault-tolerant compensation problem for linear time-invariant system in the presence of unknown actuator faults and external disturbances. A nonlinear integral-type sliding manifold is first presented that incorporates a virtual nominal control to achieve prescribed specifications of the perturbed system, and an adaptive sliding mode controller is constructed to automatically compensate for external disturbances and unknown time-invariant faults. It is shown that the proposed controller has the capability to guarantee that the resulting closed-loop system is asymptotically stable. Control design methodology is then extended to tackle with the unknown time-varying actuator faults. It is proved that any given level of gain attenuation from external disturbance/parametric estimation error to system output is achieved with the developed control law. The closed-loop performance of the new control solution derived here is evaluated extensively through numerical simulations in which the flexible spacecraft attitude control under both the external disturbances and actuator faults are considered.

System design consideration for digital wheelchair controller

Abstract: The design and implementation of a digital wheelchair controller system is presented in this paper. This novel model depicts an information flow between the driving commands and wheel speed. A command interpreter and two speed processing datapaths are proposed as functionally independent blocks for the controller. The control process consists of the following steps: command decoding, speed estimation, and speed serving. Through proper partitioning to concurrent blocks, the design complexity is reduced significantly. Block reconfiguration for field-programmable gate array rapid prototyping is also employed in this paper, and system fidelity and development efficiency are revealed through the experimental results.