Control reconfiguration

About: Control reconfiguration is a research topic. Over the lifetime, 22423 publications have been published within this topic receiving 334217 citations.

4-D Arrays as Enabling Technology for Cognitive Radio Systems

Abstract: Time-modulation (TM) in four-dimensional (4-D) arrays is implemented by using a set of radio-frequency switches in the beam forming network to modulate, by means of periodic pulse sequences, the static excitations and thus control the antenna radiation features. The on-off reconfiguration of the switches, that can be easily implemented via software, unavoidably generates harmonic radiations that can be suitably exploited for multiple channel communication purposes. As a matter of fact, harmonic beams can be synthesized having different spatial distribution and shapes in order to receive signals arriving on the antenna from different directions. Similarly, the capability to generate a field having different frequency and spatial distribution implies that the signal transmitted by time-modulated 4-D arrays is direction-dependent. Accordingly, such a feature is also exploited to implement a secure communication scheme directly at the physical layer. Thanks to the easy software-based reconfigurability, the multiple harmonic beamforming, and the security capability, 4-D arrays can be considered as an enabling technology for future cognitive radio systems. In this paper, these potentialities of time-modulated 4-D arrays are presented and their effectiveness is supported by a set of representative numerical simulation results.

Spin transfer torque (STT)-MRAM--based runtime reconfiguration FPGA circuit

Abstract: As the minimum fabrication technology of CMOS transistor shrink down to 90nm or below, the high standby power has become one of the major critical issues for the SRAM-based FPGA circuit due to the increasing leakage currents in the configuration memory. The integration of MRAM in FPGA instead of SRAM is one of the most promising solutions to overcome this issue, because its nonvolatility and high write/read speed allow to power down completely the logic blocks in “idle” states in the FPGA circuit. MRAM-based FPGA promises as well as some advanced reconfiguration methods such as runtime reconfiguration and multicontext configuration. However, the conventional MRAM technology based on field-induced magnetic switching (FIMS) writing approach consumes very high power, large circuit surface and produces high disturbance between memory cells. These drawbacks prevent FIMS-MRAM's further development in memory and logic circuit. Spin transfer torque (STT)-based MRAM is then evaluated to address these issues, some design techniques and novel computing architecture for FPGA logic circuits based on STT-MRAM technology are presented in this article. By using STMicroelectronics CMOS 90nm technology and a STT-MTJ spice model, some chip characteristic results as the programming latency and power have been calculated and simulated to demonstrate the expected performance of STT-MRAM based FPGA logic circuits.

Real-Time Optimal Trajectory Generation for Constrained Dynamical Systems

Abstract: With the advent of powerful computing and efficient computational algorithms, real-time solutions to constrained optimal control problems are nearing a reality. In this thesis, we develop a computationally efficient Nonlinear Trajectory Generation (NTG) algorithm and describe its software implementation to solve, in real-time, nonlinear optimal trajectory generation problems for constrained systems. NTG is a nonlinear trajectory generation software package that combines nonlinear control theory, B-spline basis functions, and nonlinear programming. We compare NTG with other numerical optimal control problem solution techniques, such as direct collocation, shooting, adjoints, and differential inclusions. We demonstrate the performance of NTG on the Caltech Ducted Fan testbed. Aggressive, constrained optimal control problems are solved in real-time for hover-to-hover, forward flight, and terrain avoidance test cases. Real-time trajectory generation results are shown for both the two-degree of freedom and receding horizon control designs. Further experimental demonstration is provided with the station-keeping, reconfiguration, and deconfiguration of micro-satellite formation with complex nonlinear constraints. Successful application of NTG in these cases demonstrates reliable real-time trajectory generation, even for highly nonlinear and non-convex systems. The results are among the first to apply receding horizon control techniques for agile flight in an experimental setting, using representative dynamics and computation.

On-Demand Reconfiguration of Nanomaterials: When Electronics Meets Ionics

Abstract: Rapid advances in the semiconductor industry, driven largely by device scaling, are now approaching fundamental physical limits and face severe power, performance, and cost constraints. Multifunctional materials and devices may lead to a paradigm shift toward new, intelligent, and efficient computing systems, and are being extensively studied. Herein examines how, by controlling the internal ion distribution in a solid-state film, a material's chemical composition and physical properties can be reversibly reconfigured using an applied electric field, at room temperature and after device fabrication. Reconfigurability is observed in a wide range of materials, including commonly used dielectric films, and has led to the development of new device concepts such as resistive random-access memory. Physical reconfigurability further allows memory and logic operations to be merged in the same device for efficient in-memory computing and neuromorphic computing systems. By directly changing the chemical composition of the material, coupled electrical, optical, and magnetic effects can also be obtained. A survey of recent fundamental material and device studies that reveal the dynamic ionic processes is included, along with discussions on systematic modeling efforts, device and material challenges, and future research directions.

Dynamic fault tolerance in FPGAs via partial reconfiguration

Abstract: In this paper we present an on-line, multi-level fault tolerant (FT) technique for system functions and applications mapped to partially and dynamically reconfigurable FPGAs. Our method is based on the roving self testing areas (STARs) fault detection/location strategy presented in Abramovici et al. (1999). In STARs, the area under test uses partial reconfiguration properties to modify the configuration of the area under test without affecting the configuration of the system function and dynamic reconfiguration properties to allow uninterrupted execution of the system function while reconfiguration takes place. In this paper we take this one step further. Once a fault (or multiple faults) is detected we dynamically reconfigure the working area application around the fault with no additional system function interruption (other than the interruption when a STAR moves to a new location). We also apply the concept of partially usable blocks to increase fault tolerance. Our method has been successfully implemented and demonstrated on the ORCA 2CA series FPGAs from Lucent Technologies.