Topic

# Current divider

About: Current divider is a research topic. Over the lifetime, 3509 publications have been published within this topic receiving 33961 citations. The topic is also known as: current divider rule.

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TL;DR: In this article, a modular and power-scalable architecture for low-power programmable frequency dividers is presented, which consists of a 17-bit UHF divider, an 18-bit L-band divider and a 12-bit reference divider.

Abstract: A truly modular and power-scalable architecture for low-power programmable frequency dividers is presented. The architecture was used in the realization of a family of low-power fully programmable divider circuits, which consists of a 17-bit UHF divider, an 18-bit L-band divider, and a 12-bit reference divider. Key circuits of the architecture are 2/3 divider cells, which share the same logic and the same circuit implementation. The current consumption of each cell can be determined with a simple power optimization procedure. The implementation of the 2/3 divider cells is presented, the power optimization procedure is described, and the input amplifiers are briefly discussed. The circuits were processed in a standard 0.35 /spl mu/m bulk CMOS technology, and work with a nominal supply voltage of 2.2 V. The power efficiency of the UHF divider is 0.77 GHz/mW, and of the L-band divider, 0.57 GHz/mW. The measured input sensitivity is >10 mV rms for the UHF divider, and >20 mV rms for the L-band divider.

408 citations

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TL;DR: The examined class of circuits includes voltage multipliers, current multiplier circuits, linear V-I convertors, linear I-V convertor circuits, current squaring circuits, and current divider circuits.

Abstract: The examined class of circuits includes voltage multipliers, current multipliers, linear V-I convertors, linear I-V convertors, current squaring circuits, and current divider circuits. Typical for these circuits is an independent control of the sum as well as the difference between two gate-source voltages. As direct use is made of the basic device characteristics, only a small number of transistors is required in the presented circuits.

380 citations

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Philips

^{1}TL;DR: In this paper, a technique that uses the same MOS transistors for both division and switching functions, eliminating resistors or capacitors, was presented, and it was shown that the current division is inherently linear.

Abstract: A technique is presented that uses the same MOS transistors for both division and switching functions, eliminating resistors or capacitors. Although an MOS-transistor exhibits a nonlinear relation between the current and voltage (even in the linear region), it is shown that the current division is inherently linear. The most important measurement results are shown. The dynamic range in the audio-band (0-20 kHz) is 103 dB with respect to a maximum input signal of 1 V/sub rms/. At 1 V/sub rms/, THD is below -80 dB over the audio band and below -85 dB under 3 kHz. As the unity-gain frequency of the opamps is 4.5 MHz, the bandwidth of the circuit is limited to 1.5 MHz. Attenuation accuracy is better than 0.15 dB up to -48 dB and better than 0.4 dB over the entire attenuation range. >

312 citations

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TL;DR: In this paper, a Wilkinson power divider operating at two arbitrary different frequencies is presented, and the structure of this power dividers and the formulas used to determine the design parameters have been given.

Abstract: In this paper, a Wilkinson power divider operating at two arbitrary different frequencies is presented. The structure of this power divider and the formulas used to determine the design parameters have been given. Experimental results show that all the features of a conventional Wilkinson power divider, such as an equal power split, impedance matching at all ports, and a good isolation between the two output ports can be fulfilled at two arbitrary given frequencies simultaneously

307 citations

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Hewlett-Packard

^{1}TL;DR: In this article, a phase-locked loop (PLL) was used for fractional-N frequency synthesis using oversampling A/D conversion technology, allowing the spectrum of error energy to be shaped so that fractional synthesis error energy is pushed away from the carrier.

Abstract: Fractional-N frequency synthesis using a phase locked loop (PLL) is considered. Advances in oversampling A/D conversion technology are incorporated into fractional-N synthesis, allowing the spectrum of error energy to be shaped so that fractional synthesis error energy is pushed away from the carrier. Based on this new technology, a CMOS integrated fractional-N divider was successfully developed. A complete fractional-N PLL was constructed utilizing only a CMOS divider, a dual modulus prescaler, a simple loop filter, and a voltage controlled oscillator (VCO). The resulting PLL exhibits no fractional spurs. >

243 citations