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Showing papers on "Data transmission published in 1975"


Journal ArticleDOI
Y. Sato1
TL;DR: A self-recovering equalization algorithm, which is employed in multilevel amplitude-modulated data transmission, is presented and the convergence processes of the present self-reaching equalizer are shown by computer simulation.
Abstract: A self-recovering equalization algorithm, which is employed in multilevel amplitude-modulated data transmission, is presented. Such a self-recovering equalizer has been required when time-division multiplexed (TDM) voice or picturephone PCM signals must be transmitted over the existing frequency-division multiplexed (FDM) transmission channel. The present self-recovering equalizer is quite simple, as is a conventional binary equalizer. The convergence processes of the present self-recovering equalizer are shown by computer simulation. Some theoretical considerations on this convergence process are also added.

909 citations


Book
01 Jan 1975
TL;DR: Information and Detection Theory Appendix: Circuit and System Noise.
Abstract: 1 Introduction 2 Signals and Spectra 3 Signal Transmission and Filtering 4 Linear CW Modulation 5 Exponential CW Modulation 6 Sampling and Pulse Modulation 7 Analog Communication Systems 8 Probability and Random Variables 9 Random Signals and Noise 10 Noise in Analog Modulation Systems 11 Baseband Digital Transmission 12 Digitization Techniques for Analog Messages and Computer Networks 13 Channel Coding and Encryption 14 Bandpass Digital Transmission 15 Spread Spectrum Systems 16 Information and Detection Theory Appendix: Circuit and System Noise

457 citations


Patent
31 Mar 1975
TL;DR: In this article, a transceiver is connected to an associated interface stage, which includes a gate which compares the data from the interface stage with the data on the cable and indicates whether such are equal.
Abstract: Apparatus for enabling communications between two or more data processing stations comprising a communication cable arranged in branched segments including taps distributed thereover. Tied to each tap is a transceiver which on the other side connects to an associated interface stage. Each transceiver includes, in addition to the usual transmitter and receiver sections, a gate which compares the data from the interface stage with the data on the cable and indicates whether such are equal. Should such be unequal, an interference between the transceiver and the cable is indicated, disabling the associated transmitter section. Each interface stage tied to such transceiver also includes an input and an output buffer on the other end thereof interfacing with a using device, such input and output buffers storing both the incoming and outgoing data. The output buffer is connected to a clock-driven shift register which converts the buffered data to a serial stream, feeds such data to a phase encoder, which then connects to the transmitter or driver section of the transceiver. The input buffer is loaded by an input shift register which derives its clock from a phase decoder, the shift register and the phase decoder both connecting to the receiver section. When the station is to start transmitting, the phase decoder detects the presence of other transmissions on the cable and detains the output shift register until no other transmissions are sensed. Once a transmission has begun, if interference is detected and the transmitter section is disabled, a random number generator is used to select an interval of time at the completion of which the next attempted transmission will take place. Concurrently, a counter counts the number of interferences, or collisions, which recur in the attempted transmissions of one data packet and weights the mean of the random number generator accordingly. The input shift register is also connected to an address decoder which enables data transfer to the input buffer only during those times when the data is preceded by an appropriate address.

324 citations


Proceedings ArticleDOI
19 May 1975
TL;DR: There is an increasing demand for access to data processing and storage facilities from interactive terminals, point-of-sales terminals, real-time monitoring terminals, hand-held personal terminals, etc.
Abstract: Terminal access to computer systems has long been and continues to be a problem of major significance. We foresee an increasing demand for access to data processing and storage facilities from interactive terminals, point-of-sales terminals, real-time monitoring terminals, hand-held personal terminals, etc. What is it that distinguishes this problem from other data communication problems? It is simply that these terminals tend to generate demands at a very low duty cycle and are basically bursty sources of data; in addition, these terminals are often geographically distributed. In the computer-to-computer data transmission case, one often sees high utilization of the communication channels; this is just not the case with terminal traffic. Consequently, the cost of providing a dedicated channel to each terminal is often prohibitive. Instead, one seeks ways to merge the traffic from many terminal sources in a way which allows them to share the capacity of one or a few channels, thereby reducing the total cost. This cost savings comes about for two reasons: first, because of the economies of scale present in the communications tariff structure; and secondly, because of the averaging effect of large populations which permit one to provide a channel whose capacity is approximately equal to the sum of the average demands of the population, rather than equal to the sum of the peak demands (i.e., the law of large numbers). This merging of traffic and sharing of capacity has been accomplished in various ways such as: polling techniques, contention systems, multiplexing, concentrating, etc. Many of these are only weak solutions to the problem of gathering low data rate traffic from sources which are geographically dispersed.

108 citations


Patent
Mueller Kurt Hugo1
28 Nov 1975
TL;DR: In this paper, an adaptive echo cancellation scheme for digital data transmission systems was proposed, which enables full duplex operation at full bandwidth over two-wire transmission facilities, and can cancel unwanted leakage through hybrid junctions directly from the digital data input symbols rather than from the analog transmitter output.
Abstract: An adaptive echo canceller for digital data transmission systems permits full duplex, i.e., simultaneous bidirectional transmission, operation at full bandwidth over two-wire transmission facilities. A transversal filter arrangement digitally synthesizes a cancellation signal for unwanted leakage, i.e., echoes, through hybrid junctions directly from the digital data input symbols, rather than from the analog transmitter output. An error control signal for correlation with tap signals on the transversal filter is derived from the output of the receiver, instead of its input.

99 citations



Patent
23 Jul 1975
TL;DR: In this paper, an early segment of each burst of signals is used to adapt the equalizer in a decision-directed mode, and when the adaptation is completed the system switches to its normal higher rate of data transmission.
Abstract: Initial Adjustment of a receiver having an automatic adaptive equalizer in a modem communication system is accomplished by employing a data transmission rate lower than normal for an early segment of each burst of signals. At this lower rate, accurate reception is possible without complete adaptation of the equalizer. These same (early segment) signals are used to adapt the equalizer in a decision-directed mode. When the adaptation is completed the system switches to its normal higher rate of data transmission.

59 citations


Patent
13 Feb 1975
TL;DR: In this paper, a data-driven network of uniform processing or function modules and local storage units is proposed, which network may be readily partitioned to accommodate various concurrent operations or tasks.
Abstract: This disclosure is directed toward a data driven network of uniform processing or function modules and local storage units which network may be readily partitioned to accommodate various concurrent operations or tasks. Data transfer is serial in nature so that data segments can be of any length. Execution by each function module is initiated by arrival of all of the required data structures, one of which contains an operator and may be stored in the associated local storage unit. The other data structure may contain operands and modifiers. Thus, a series of such operators may be distributed throughout the network to increase processing performance and throughput. A particular character set and data structure format is also disclosed.

51 citations


Patent
28 Oct 1975
TL;DR: A switch controller in a multi-computer processing system functions to establish a data path between any two computers in the system and maintain that data path, without interference, while establishing other independent unidirectional data paths with other pairs of computers as discussed by the authors.
Abstract: A switch controller in a multi-computer processing system functions to establish a data path between any two computers in the system and maintain that data path, without interference, while establishing other independent unidirectional data paths with other pairs of computers. All computers in the system are continuously and rapidly scanned for a request-to-send signal. Those computers that are already engaged in data transmission are leap-frogged by the scanning mechanism. When a request-to-send signal is detected by a particular scanning mechanism, that scanning mechanism stops at the computer generating the request, to provide for an interconnection between the requesting sender and the intended receiver. If during this interconnection phase, it is determined that the intended receiver is occupied, the interconnection is prevented from being completed and the scanning mechanism is instructed to resume scanning of the computers for another request-to-send signal.

36 citations


Journal ArticleDOI
Y. Sato1
TL;DR: The zero-forcing automatic equalization technique is extended to equalization in quadrature amplitude modulation data transmission and TV transmission systems and the zero- forcing equalizability condition is solved.
Abstract: The zero-forcing automatic equalization technique is extended to equalization in quadrature amplitude modulation data transmission and TV transmission systems. A general cost function, whose minimization problem can be applied to the automatic equalization in the above two systems, is first presented. Based on this cost function, the zero-forcing equalizability condition is solved. Under this condition, simple algorithms, namely unit-increment or amplitude-dependent tap adjusting schemes, can be applied.

25 citations


Journal ArticleDOI
Jr. F. Magee1
TL;DR: This paper investigates the performance of compromise Viterbi algorithm (VA) and standard equalization techniques by computation and simulation over band-limited channels using fourlevel vestigial sideband (VSB) modulation and found that at this data rate, receivers based on linear equalization are very sensitive to timing and carrier phase over some channels.
Abstract: This paper investigates the performance of compromise Viterbi algorithm (VA) and standard equalization techniques by computation and simulation over band-limited channels using fourlevel vestigial sideband (VSB) modulation. Linear channel characteristics from the published telephone channel survey were used as examples of band-limited data transmission channels. One of the principal conclusions drawn from the study is that at data rates of 9600 bits/s and less, the linear characteristics of these channels do not limit performance even with linear equalization. It was found that at this data rate, receivers based on linear equalization are very sensitive to timing and carrier phase over some channels. Thus at 9600 bits/s the decision feedback equalizer was found to be a better choice because it is relatively insensitive to carrier phase and timing considerations. Moreover, at 9600 bits/s no problem with error propagation was encountered with the decision feedback equalizer. As the data rate was increased beyond 9600 bits/s the decision feedback tap gains became large enough to cause severe error propagation. The compromise VA receiver structure was effective at higher data rates and was almost unaffected by channel bandwidth up to 12 000 bits/s.

Patent
27 Jan 1975
TL;DR: In this paper, an in-band signalling system for the transmission of both data and control signals through a common communications channel is disclosed, which includes the steps of translating the data bits into a different code set than the original, examining it for control words and if any are present, modifying or corrupting the data and thereafter combining on a time division basis the translated and/or modified data and controlling words over a transmission channel.
Abstract: An in-band signalling system for the transmission of both data and control signals through a common communications channel is disclosed. Unique means of distinguishing data bits from control bits is employed without the use of additional bandwidth over that which would be required for the data alone. A novel method for signalling includes the steps of translating the data bits into a different code set than the original, examining it for control words and if any are present, modifying or corrupting the data and thereafter combining on a time division basis the translated and/or modified data and control words over a transmission channel. To receive, data is inversely modified and control words detected. Error detection of control words is achieved by translating control words followed by their complements.

ReportDOI
01 May 1975
TL;DR: In this article, the authors choose an error detecting code for use in general purpose digital communication networks which employ automatic repeat request (AR) and characterize the channels used by the communication network.
Abstract: : The objective of this study is to choose an error detecting code for use in general purpose digital communication networks which employ automatic repeat request. To choose a code it is necessary to characterize the channels used by the communication network.

Journal ArticleDOI
TL;DR: This concise paper describes experiments with a television source encoder which consists of a differential PCM encoder followed by entropy coding and has the desirable property that it produces low noise in quiet areas of the picture and higher noise in busy areas ofThe picture.
Abstract: This concise paper describes experiments with a television source encoder which consists of a differential PCM encoder followed by entropy coding. This encoder converts analog television signals into a digital bit stream for digital transmission or storage. When optimized, this type of system is known to perform very close to the rate distortion bound. The differential PCM encoder has a 16-level quantizer during low entropy areas of the picture (quiet areas) but switches to a 6-level quantizer in high entropy (busy) areas of the picture which tend to fill up the buffer. This strategy avoids buffer overflow and has the desirable property that it produces low noise in quiet areas of the picture and higher noise in busy areas of the picture.

Patent
15 Sep 1975
TL;DR: In this paper, the clock signals from the local data set are synchronized with the data signals as they are stored in the receiving register, the data signal being transferred from the transmitting register to the local dataset under the control of the logic circuits in synchronism with the clock signal from the data set.
Abstract: Method and apparatus for synchronizing data signals with clock pulses in a data transmission computer system having a computer for generating data signals and a local data set for transmitting the data signals to a remotely located data set, includes a receiving register for storing the data signals and a transmitting register coupled to the output of the receiving register for receiving and storing data signals from the receiving register. Logic circuits respond to clock signals from the local data set to cause the data signals to be transferred from the receiving register to the transmitting register and from there to the local data set. The clock pulses from the local data set are synchronized with the data signals as they are stored in the receiving register, the data signals being transferred from the transmitting register to the local data set under the control of the logic circuits in synchronism with the clock signals from the local data set.

Patent
Bernard K. Betz1
04 Apr 1975
TL;DR: In this article, the non-repeat characters between successive groups or lines are transmitted along with a "map" indicative of the format of the present group, or line, so as to enable a receiving station to reassemble the compressed data.
Abstract: Characters which repeat between successive groups or lines on a page, are, except for an initial transmission, not transmitted, thereby decreasing the time for data transmission. Only the non-repeat characters between the successive groups or lines are transmitted along with a "map" (i.e. a sequence of numbers) indicative of the format of the repeat and non-repeat characters of the present group, or line, so as to enable a receiving station to reassemble the compressed data. A new map need not be sent, thereby further decreasing transmission time, if the transmission using an old map which has been previously transmitted compares favorably with the transmission using the new one.

Patent
14 May 1975
TL;DR: In this article, the Disclosure Apparatus under microprocessor control for use in communicating over a serial communication loop with a remote attached control unit is described. But it is not shown how to use it for data transfer.
Abstract: APPARATUS FOR CONTROL AND DATA TRANSFER BETWEEN A SERIAL DATA TRANSMISSION MEDIUM AND A PLURALITY OF DEVICES Abstract of the Disclosure Apparatus under microprocessor control for use in communicating over a serial communication loop with a remote attached control unit. It is capable of establishing frame synchronization, interpreting commands, assembling data and transmitting bits on the loop. The apparatus also communicates with I/O devices over a demand/response interface.A microprocessor interface with the loop includes loop sync control which establishes bit synchronization and generates a restart pulse at bit receive time and bit send time. The execution of instructions by the micro-processor is stopped and the microprocessor enters a wait state when it has finished all previous work and is ready to receive a loop bit. When it is time to receive the loop bit the microprocessor is restarted in response to the restart pulse from the loop synchronization.or output operations to a device, the microprocessor loads the device address and a device command or data into shift registers and ini-tiates the transfer by setting a latch. When the transfer to the device is completed, this latch is reset in response to a signal from the device.



Patent
14 Aug 1975
TL;DR: In this article, a system for digitizing and interfacing analog data from a plurality of amplitude modulated periodic signals with a computer was proposed, in which an alternating reference signal is identified and sampled input data to be digitized is synchronized at the same time reference point of the waveform of the reference signal.
Abstract: A system for digitizing and interfacing analog data from a plurality of amplitude modulated periodic signals with a computer in which an alternating reference signal is identified and sampled input data to be digitized is synchronized at the same time reference point of the waveform of the reference signal. Pulses from a real time clock are counted and synchronized with the reference signal and this synchronized signal is delayed and fed to a timing circuit which starts the multiplexing of the input signals and also activates an address counter to initialize the address locations in the computer. The analog data from the multiplexer is converted to digital values by an analog-to-digital converter and fed to the computer at the given address.

Patent
01 Aug 1975
TL;DR: In this article, a bipolar electrical signal of the type transmitted in the T1 digital transmission system is converted into an optical binary signal having pulses and spaces by translating each positive digital "1" in the bipolar signal into two digital pulses, each negative digital 1 in the binary signals into two spaces, and the digital 0 in binary signal into optical pulse followed by a space.
Abstract: A bipolar electrical signal of the type transmitted in the T1 digital transmission system is converted into an optical binary signal having pulses and spaces by translating each positive digital "1" in the bipolar signal into two digital pulses, each negative digital 1 in the bipolar signal into two spaces, and the digital 0 in the binary signal into an optical pulse followed by a space. The nonpermitted code of a space followed by an optical pulse is utilized at the receiving location for instantaneous framing. As a result of this particular code conversion, the balanced property of the bipolar input signal is maintained in the optical signal thereby preventing an offset bias from developing at the receiving location in the photodetector. In addition, the bipolar information is maintained in transmission, thus making the optical system "transparent" to bipolar signals.


Patent
07 Oct 1975
TL;DR: In this article, an adjustable digital filter combines the functions of a conventional digital filter and a conventional equalizer and permits elimination of the additional delay stages conventionally required for the equalizer.
Abstract: An adjustable digital filter combines the functions of a conventional digital filter and a conventional equalizer and permits elimination of the additional delay stages conventionally required for the equalizer. Reduced complexity and expense are attained, along with improved performance, since the elimination of "delay-and-add" stages required by prior art equalizers permits detection and correction of error with less delay than the prior art. Hence, improved performance is realized along with reduced cost.


Patent
08 Jan 1975
TL;DR: In this article, an adaptive equalizer for modulated carrier transmission systems is proposed, in which a received signal is subjected to a Hilbert transformation to obtain a second signal having a 90° phase shift for all components.
Abstract: The feature of the invention is an adaptive equalizer for modulated carrier transmission systems in which a received signal is subjected to a Hilbert transformation to obtain a second signal having a 90° phase shift for all components. The two signals are then passed through a pair of filters each and the outputs are cross-combined to generate the cartesian coordinate signals of an equalized signal. The coordinate signals are combined in a polar converter and are then decoded to detect the amplitude and phase data components of the received signal. The equalizers are made adaptive by determining at each sampling time, the phase and amplitude errors in the signal and using these errors to modify the coefficients of the equalizing filters. The phase and amplitude errors are recoded into Cartesian coordinates and multiplied by the values of the samples at each tap of the filters to generate four error signals for each tap. A cross combination of these signals is time averaged and used to adjust the corresponding coefficients at the associated taps of the equalizer.

Patent
30 May 1975
TL;DR: In this article, a multi-computer system having input/output devices for common use, protection is made for the devices upon transferring of the input and output data by comparing a device identifying number or address signal and a number signal identifying a central processor unit which demands the transfer of data.
Abstract: In a multi-computer system having input/output devices for common use, protection is made for the devices upon transferring of the input/output data by comparing a device identifying number or address signal and a number signal identifying a central processor unit which demands the transfer of data, thereby to determine on the basis of the result of the comparison whether the data transfer between the device and the central processor unit is allowable. When the transfer is not admitted, the input/output operation of the device is inhibited.

P. McLane1
01 May 1975
TL;DR: The novelty of the paper is in the generality of the results and in obtaining a simple error bound for transmission in the presence of cochannel interference and carrier phase jitter.
Abstract: This paper presents simple and general lower bounds for error rates in digital communication systems. The information bearing signal is taken to be impaired by additive interference and carrier phase jitter. The former is taken to be composed of two components; one component is peak-limited while the other is not. Intersymbol and cochannel interference are examples of peak-limited interference while additive thermal noise is an example of a nonpeak-limited interference. The novelty of the paper is in the generality of the results and in obtaining a simple error bound for transmission in the presence of cochannel interference and carrier phase jitter.

Patent
Bijker A J1, Riemens K1
10 Jul 1975
TL;DR: In this article, a uniform delta modulator is provided with an input circuit which changes the shape of the speech signal so that the input signal to the delta modulators has a constant slope.
Abstract: In a digital transmission for low bit rate transfer of speech signals, the frequency information content of the speech signal is transferred via a first transmitter channel and the amplitude information content is transferred via a second transmitter channel. A particularly low bit rate of 4.8 to 7 kbits/second is made possible in that the transmission device in the first transmitter channel is in the form of a uniform delta modulator which is provided with an input circuit which so changes the shape of the speech signal that the input signal to the delta modulator has a constant slope.

Journal ArticleDOI
S. Fitch1, L. Kurz
TL;DR: A design procedure for the receiver of a pulse amplitude modulation system is developed for data transmission in the presence of intersymbol interference and noise and the recursive equalizer is shown to exhibit superior-performance.
Abstract: A design procedure for the receiver of a pulse amplitude modulation system is developed for data transmission in the presence of intersymbol interference and noise. In the receiver, an estimate of each source symbol is made based on the WienerKolmogorov theory of minimum variance estimation for stationary time series. The resulting structure is called a recursive equalizer and its taps are obtained by taking the canonical factorization of the spectral density function followed by the operations of polynomial multiplication and division. The performance of the system is evaluated by calculating the probability of error versus signal-signal-to-noise ratio and Comparing it to the performance of a conventional tapped delay line equalizer. The specific example presented uses raised-cosine signaling through a channel with slope-attenuation distortion and a zero phase characteristic. For this example, the recursive equalizer is shown to exhibit superior-performance.

Journal ArticleDOI
TL;DR: The signal design problem associated with a multiple access communication channel in which several binary digital links are operated simultaneously over a common channel is examined and optimal channel signal selection is shown to be related to minimal hamming distance mappings.
Abstract: In this concise paper we examine the signal design problem associated with a multiple access communication channel in which several binary digital links are operated simultaneously over a common channel Receiver noise is neglected but the channel is confined in dimension, so that signal crosstalk is the only source of bit errors An encoder is assumed to exist prior to channel transmission for converting the bit waveforms from all transmitters into a common channel signal available to all receivers The encoder selects the channel signal during each bit so as to maximize the average detection probability per bit, where the average is taken over all links and all possible bit patterns Two classes of receivers are considered In the first the receivers are confined to only signal correlations with the corresponding transmitter signals In the second the encoder and receivers are matched to arbitrary signal sets For both type receivers, optimal channel signal selection is shown to be related to minimal hamming distance mappings Values and bounds for the resulting detection probabilities in terms of numbers of transmitters and channel dimension are reported