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Showing papers on "Data transmission published in 1981"


Journal ArticleDOI
01 Mar 1981
TL;DR: A large variety of algorithms for image data compression are considered, starting with simple techniques of sampling and pulse code modulation (PCM) and state of the art algorithms for two-dimensional data transmission are reviewed.
Abstract: With the continuing growth of modern communications technology, demand for image transmission and storage is increasing rapidly. Advances in computer technology for mass storage and digital processing have paved the way for implementing advanced data compression techniques to improve the efficiency of transmission and storage of images. In this paper a large variety of algorithms for image data compression are considered. Starting with simple techniques of sampling and pulse code modulation (PCM), state of the art algorithms for two-dimensional data transmission are reviewed. Topics covered include differential PCM (DPCM) and predictive coding, transform coding, hybrid coding, interframe coding, adaptive techniques, and applications. Effects of channel errors and other miscellaneous related topics are also considered. While most of the examples and image models have been specialized for visual images, the techniques discussed here could be easily adapted more generally for multidimensional data compression. Our emphasis here is on fundamentals of the various techniques. A comprehensive bibliography with comments is included for a reader interested in further details of the theoretical and experimental results discussed here.

810 citations


Journal ArticleDOI
B. Hirosaki1
TL;DR: This paper provides a novel digital signal processing method based on an N /2-point DFT processing in the O-QAM system that is more economical than the digitally implemented conventional single-channel data transmission system.
Abstract: An orthogonally multiplexed QAM (O-QAM) system is a multichannel system with a baud rate spacing between adjacent carrier frequencies; this property is desirable to digitally implement the system using the discrete Fourier transformation (DFT). This paper provides a novel digital signal processing method based on an N /2-point DFT processing in the O-QAM system. A complexity comparison between a digital O-QAM system and a digital singlechannel QAM system shows that the digital O-QAM system using the new method is more economical than the digitally implemented conventional single-channel data transmission system.

544 citations


Patent
31 Mar 1981
TL;DR: In this paper, an intelligent converter at each remote user location uses the data signals to control access to the system on the basis of channel, tier of service, special event and program subject matter.
Abstract: An addressable cable television control system controls television program and data signal transmission from a central station to a plurality of user stations. The data signals include both control and text signals in video line format which are inserted on the vertical interval of the television signals, thereby freeing all channels for transmission of both television and data signals. Moreover, full-channel teletext data in video line format may be transmitted on dedicated text channels with the modification of only head end processors. An intelligent converter at each remote user location uses the data signals to control access to the system on the basis of channel, tier of service, special event and program subject matter. The converter uses a graphics display generator to generate display signals for the presentation of the text data on the television receiver and for the generation of predetermined messages for the viewer concerning access, emergencies and other functions. The converter processes vertical interval text data and selected full-channel text data, both transmitted in video line format. The keyboard of the subscriber provides a number of different functional inputs for the subscriber to interface with the system. The converter also includes apparatus for interfacing with two-way interactive data acquisition and control systems.

440 citations


Patent
Robert D. Howson1
13 Oct 1981
TL;DR: In this paper, a cyclical-redundancy-check (CRC) code word is generated from a block of bits (ESF) of a presently transmitted time division muliplexed (XTDM) signal.
Abstract: Errors in digital transmission are monitored by employing a cyclical-redundancy-check (CRC). A CRC code word having a predetermined number of bits is generated (via 310) from a block of bits (ESF) of a presently transmitted time division muliplexed (XTDM) signal. The code word bits are then inserted (via 304, 305, 306) into predetermined bit positions of the next subsequent block of bits (ESF) of the XTDM signal. In a receiver (FIG. 7), bits of a presently received time division multiplexed (RTDM) signal are compared (801, 802) to bits of a CRC code word generated from the last previously received block of bits to indicate errors in transmission. In a specific example, a 6-bit CRC code word is employed and the code word bits are inserted into predetermined framing bit positions.

151 citations


Patent
01 Oct 1981
TL;DR: In this paper, a station for a data transmission network is adapted to operate in a cyclic mode for contending for access to the network channel along with other stations of the network.
Abstract: This disclosure relates to a station for a data transmission network which is adapted to operate in a cyclic mode for contending for access to the network channel along with other stations of the network. The three states of the cycle are the idle state, the packet-being-transmitted state and the acknowlegement period state. Each station will not begin transmission until it determines that the channel is in an idle state. Once the station has determined that the channel is idle, it will then delay for a period of time that is randomly chosen and, if the channel is still idle, will then begin transmission. In this way, contention conflicts between stations is minimized without unduly restricting communication between stations. Following transmission, the channel will again be quiescent a short period of time before the acknowledgement signal is transmitted from the receiver. Each packet of data to be transmitted is of a fixed length so as to provide for synchronization between various stations contending for access to the channel.

120 citations


Journal ArticleDOI
TL;DR: The constraints on the design of twowire repeaterless digital subscriber loop (DSL) systems are explored, related to compatibility with other systems sharing the same cable, and immunity to central office noise.
Abstract: This paper explores the constraints on the design of twowire repeaterless digital subscriber loop (DSL) systems. Broadly categorized, the design depends on the technical feasibility of the approach used to achieve two-wire transmission, constraints related to compatibility with other systems sharing the same cable, and immunity to central office noise. Each of these varies With the choice of system parameters including the transmission rate, transmit power, choice of line codes, etc. Technical feasibility is evaluated by computer simulation studies. Compatibility with other systems is explored by crosstalk calculations. Noise immunity considerations, as they translate into digital line power levels, are also explored.

93 citations


Journal ArticleDOI
TL;DR: A new type of digital echo canceler for two-wire digital transmission is presented, which involves very simple signal processing and is thus an interesting alternative for digital transmission on subscriber lines.
Abstract: A new type of digital echo canceler for two-wire digital transmission is presented. The new principle involves very simple signal processing and is thus an interesting alternative for digital transmission on subscriber lines. The principle is compared with other echo cancellation techniques, and it is shown how choice of line code, equalization, and carrier recovery are affected by the new echo canceler. A theoretical analysis of the principle is given, taking into account finite accuracy, jitter, noise, and correlated data streams. The echo canceler can be used for line attenuation up to 40 dB. At 80 kbits/s this corresponds to at least 7 km 0.6 mm cable and is sufficient to cover more than 99 percent of the existing Norwegian subscriber lines.

91 citations


Patent
16 Nov 1981
TL;DR: In this paper, an image acquisition subsystem, electronic processing subsystem and workstation subsystem produce information management networks that are almost unlimited in size and scope in integrating data and information stored in both digital form and in human readable form.
Abstract: An image acquisition subsystem, electronic processing subsystem and workstation subsystem produce information management networks that are almost unlimited in size and scope in integrating data and information stored in both digital form and in human readable form. Integration is by on-demand conversion in a scanner/digitizer of data and information to a transmittable, compatible electric signal which is encoded and converted into human readable form at the workstation of an information requester. The scanner rejects improperly oriented microfiche and recognizes microfilm data in a right reading or reversing orientation. An electronic circuit presents the data to the system's buffer in the right reading orientation regardless of a right or reverse reading input from microfiche. The scanner/digitizer regulates scanning speed in conformity with the data rate and capability of the transmission line to absorb the data. A microprocessor master module performs various functions with only minor hardware changes.

81 citations


Patent
13 Oct 1981
TL;DR: In this paper, a service integrated transmission system for transmitting over a light transmission path, digital signals having a transmission band whose upper limit frequency corresponds to the maximum bit rate of the signals to be transmitted, the transmission being effected by simultaneously transmitting over the transmission path.
Abstract: A service integrated transmission system for transmitting, over a light transmission path, digital signals having a transmission band whose upper limit frequency corresponds to the maximum bit rate of the signals to be transmitted, the transmission being effected by simultaneously transmitting, over the transmission path, digital signals having a high bit rate only in an upper part of the transmission band and digital signals having a low bit rate only in a lower part of the transmission band. The system includes a transmitter at one end of the path which separately multiplexes low bit rate signals into a narrowband signal and high bit rate signals into a broadband signal, combines those multiplexed signals, and modulates a light source with the combined signal. A receiver at the other end of the path converts the modulated light signal into a demodulated electrical signal, separates the two multiplexed signals, and then demultiplexes each of the latter signals.

60 citations


Patent
12 Nov 1981
TL;DR: In this paper, an error correcting encoding and decoding system for transmission and reception of digital data is arranged for high error correcting ability of both burst errors and random errors, where the words are interleaved into a different arranging order and are subjected to different relative amounts of delay.
Abstract: An error correcting encoding and decoding system for transmission and reception of digital data is arranged for high error-correcting ability of both burst errors and random errors. In encoding apparatus a digital signal is processed as a plurality of word sequences. The words are interleaved into a different arranging order and are subjected to different relative amounts of delay. Then, first check words are generated to satisfy a parity detection matrix, such as a Reed-Solomon code matrix. After this, the resulting data words and first check words are again interleaved and are provided with respective different amounts of delay. Then, second check words are generated to satisfy a similar matrix. Finally, the first and second check words and the data words are interleaved prior to transmission. In complementary decoding apparatus, the cross-interleaved received signal is de-interleaved in a fashion complementary to the interleaving performed during transmission and the data words are delayed a complementary amount. The received data words are decoded by providing syndromes generated according to the parity detection matrix and burst or random errors are corrected by the check words.

60 citations


Journal ArticleDOI
S. Calo1, M. Easton
TL;DR: A retransmission Protocol for a broadcast connection (point-to-multipoint) is proposed and its performance characteristics are considered and upper and lower bounds are derived and are shown to be virtually indistinguishable for many practical sets of system parameters.
Abstract: A retransmission Protocol for a broadcast connection (point-to-multipoint) is proposed and its performance characteristics are considered. The protocol is designed for transfers of large files Over a satellite channel that is time-shared to carry both the data from the broadcasting transmitter and the set of acknowledgments from the multiple receiver sites. A mathematical model of the transmission system that includes separate error processes for uplink and downlink errors on data transmissions, and similar processes for errors on the acknowledgment frames as well, is used to analyze the performance of the scheme. Exact analytical expressions for the relative throughput of the channel are obtained for two special cases: 1) the uplink is error-free; and 2) the acknowledgments are error-free. For the general case, upper and lower bounds are derived and are shown to be virtually indistinguishable for many practical sets of system parameters. The results demonstrate that the broadcasting of large files to multiple receivers can be done both efficiently and reliably.

Patent
22 Sep 1981
TL;DR: In this paper, the authors proposed a contention bus for full-duplex data transfer between any two network interface units on a one-to-all-others contention bus.
Abstract: A communications network for providing full-duplex data transfer between any two network interface units on a one-to-all-others contention bus. Network interface units (NIUs) send and receive data signals on outgoing and incoming links, respectively, which are connected to junction boxes which couple the incoming link connected to one network interface unit to the outgoing links of only the other NIUs. The data signals have source address codes and destination address codes applied thereto, which codes are examined by each NIU receiving a data signal to determine (1) if the NIU will accept the data signal for processing and (2) if full duplex data transfer is occurring. Transmission of all data signals in the network is temporarily aborted when any two NIUs are transmitting data signals and at least the signal transmitted by one of the NIUs is not addressed to the other NIU.

Patent
21 Sep 1981
TL;DR: In this paper, a multiplicity of elemental computers are joined in a parallel architecture through a master computer and shared memory system, and real-time operation of the elemental computers and master computer are time interleaved without overlap.
Abstract: A parallel digital computer with which real-time simulations can be performed. A multiplicity of elemental computers are joined in a parallel architecture through a master computer and shared memory system. Real-time operation of the elemental computers and master computer are time interleaved without overlap. Input data entering each elemental computer is processed according to the designated function during one time segment, succeeded by a master computer operating time segment during which the resultant elemental computer data is selectively transferred to the appropriate elemental computers for the next processing sequence. A real-time clock synchronizes the alternating time segments, allocating sufficient time for the processing performed by the elemental computer and the subsequent data transfer steps. Integration, unlike addition, subtraction and the numerous other arithmetic and logic functions, is performed only once per frame time. To maintain simulation accuracy, the frame time is defined to be short in comparison to the period of the highest frequency present in the real-time simulation. On the other hand, the frame time must be sufficiently long to satisfy the time demands of the intra-frame time cycling between elemental and master computers which is bounded by the elemental computer processing rate and the number of non-integrator elemental computer functions between successive elemental computers operating as integrators.

Patent
16 Oct 1981
TL;DR: In this paper, a ternary carrier frequency shift keying (TCSK) signal is applied to a utility load control by transmission of a subcarrier of an FM broadcast channel, which is decoded by a receiver, SCA decoder, TCSK filter and a two level or binary converter.
Abstract: A data communication system for general purposes having a new ternary carrier frequency shift keying (TCSK) signal The system is applied to a utility load control by transmission of a sub-carrier of an FM broadcast channel It is decoded by a receiver, SCA decoder, TCSK filter and a two level or binary converter and used to communicate to a pre-programmed microprocessor which enables various load control functions to be performed The general system also is given for a QPSK (quadraphase shift keying) operating system A data transmission filter is split between the transmitter and receiver and is operated in cascade to give individual interference filtering at each end of the transmission while also providing combined action and wave shaping A high accuracy FM decoder using zero crossing detection enables data recovery with simple circuits A novel random time load restoration circuit for ramp-up is disclosed A fail safe relay operator is also disclosed The TCSK employs a novel 19 character hex code format which is 8 bit microprocessor compatible and directly usable for other purposes such as ASCII message transmission Both QPSK and TCSK systems offer command structures of variable length so as to permit truncation of message and reduce total message transmit time

Patent
Edward P. Daniels1
17 Feb 1981
TL;DR: In this paper, an automated mailing system includes a postage value determining system processor, a scale for providing weight indicative signals, a keyboard for operator entry of information relating to a determination of postage, and a plurality of peripheral devices.
Abstract: An automated mailing system includes a postage value determining system processor, a scale for providing weight indicative signals, a keyboard for operator entry of information relating to a determination of postage, and a plurality of peripheral devices. A peripheral controller interface establishes communications links with the peripheral devices. An incompatible systems interface interconnects a serial communications bus of the system processor and the peripheral controller interface. The incompatible systems interface includes a processor programmed to receive, decode and transmit information from or to the system processor along the serial bus and load or receive information from or to the peripheral controller interface along parallel lines. The communication timing constraints of the serial communications bus for receipt of data signals by the system processor do not permit monitoring of the data transmission by the incompatible systems processor. To accommodate for such timing constraints, system clock pulses of the serial bus are employed at a flip-flop to disable the incompatible systems processor.

Patent
22 May 1981
TL;DR: In this article, a forward error correcting digital transmission system with two separate transmission channels carrying redundant information is considered, where the first channel is encoded by combining each present bit with itself delayed m bits in time.
Abstract: A forward error correcting digital transmission system having two separate transmission channels carrying redundant information. The signal on the first channel is encoded by combining each present bit with itself delayed m bits in time. The signal on the second channel may be encoded in the same manner only with a delay of n bits in time, or left without coding, i.e., n=0, in any case m and n are unequal integers. Both first and second channels are transmitted over separate transmission paths to the receiving terminal where each is independently decoded to obtain the original binary information from each received encoded signal. If an error is introduced into one of the channels during transmission, the encoded information necessarily contains an error in the present bit and its associated m or n delayed bit. Upon detection of an error by simple bit comparisons between the two decoded channels, the present decoded bit and its associated delayed decoded bit, if any, are changed in the apropriate channel in order to correct for the error.

Journal ArticleDOI
M. R. DeSousa1
TL;DR: This paper describes an architectural approach that provides information interchange across a broad spectrum of user applications and office automation offerings and utilizes SNA for data transmission and communications control facilities.
Abstract: This paper describes an architectural approach that provides information interchange across a broad spectrum of user applications and office automation offerings. Some of the architectures described herein are currently implemented in existing IBM products. These and other architectures will provide the basis for document interchange capability between products such as the IBM 5520 Administrative System, the IBM System/370 Distributed Ofice Support System (DISOSS), and the IBM Displaywriter System. Specifically described is a document distribution architecture and its associated data streams. Transforms can be utilized to interchange between these data streams and others. A general overview of the architectures as opposed to a detailed technical description is provided. The architectures described are protocols for interchange between application processes; they do not address the specific user interface. The document distribution architectures utilize SNA for data transmission and communications control facilities.

Journal ArticleDOI
A. Brosio1, U. de Julio, V. Lazzari, R. Ravaglia, A. Tofanelli 
TL;DR: The main characteristics and the performance of two systems implemented for two wire digital transmission on subscriber lines are presented and one system employing WAL2 as the line code exhibits extreme circuitry simplicity and low power consumption.
Abstract: In this paper the main characteristics and the performance of two systems implemented for two wire digital transmission on subscriber lines are presented. Both systems utilize different time intervals to transmit bursts of bits in the two directions with an information bit rate of 80 kbits/s and a line bit rate in the bursts of 256 kbits/s. One system employing WAL2 as the line code exhibits extreme circuitry simplicity and low power consumption. The other system, which employs CMI as the line code, shows better performance in the presence of line disturbances.

Patent
Hikmet Sari1
14 May 1981
TL;DR: In this paper, an adaptive system in a digital data receiver providing compensation for amplitude and phase distortions introduced by the data transmission channel having, at the output of the transmission channel which supplies a signal vector Xk, a transversal filter having N weighting coefficients, followed by a decision circuit and further a summing circuit and a multiplying circuit.
Abstract: An adaptive system in a digital data receiver providing compensation for amplitude and phase distortions introduced by the data transmission channel having, at the output of the transmission channel which supplies a signal vector Xk, a transversal filter having N weighting coefficients, followed by a decision circuit and further a summing circuit and a multiplying circuit. To determine the N coefficients iteratively the system comprises a circuit for determining an estimated matrix Ak of the autocorrelation matrix A of the signal vectors Xk, a circuit for approximating Ak by a circulant matrix Rk, a circuit for calculating the diagonal matrix Gk whose diagonal elements are the eigenvalues of Rk, a number of calculating circuits and a circuit for up-dating the vector Ck which represents the N weighting coefficients of the filter at the instant to +kT.



Patent
29 Apr 1981
TL;DR: In this article, the authors proposed a wire data transmission system which transmits data from a master station (1) to a number of slave stations (2-1 to 2-n) or vice versa through a pair of signal wires (3, 4) connected in parallel with each other.
Abstract: In a wire data transmission system which transmits data from a master station (1) to a number of slave stations (2-1 to 2-n) or vice versa through a pair of signal wires (3, 4) connected in parallel with each other, only the master station (1) need be provided with a data transmission power supply (Vs). Signal lines (3, 4) receiving DC voltage from the power supply (Vs) through a resistor (Ro) are periodically shorted within the master station (1), thereby to transmit "1", "0" encoded data according to the duration of the shorting time of the signal lines (3, 4) along with an identification code which specifies a slave station. The data is transmitted from the slave station to the master station (1) similarly by shorting the signal lines (3, 4). When a fault occurs in the lines to be shorted in the slave station, the slave station in which the fault occurs is isolated from the signal lines (3, 4) to assure their operability. The slave stations (2-1 to 2-n) are connected through a balancing bridge circuit to the signal lines (3, 4) to achieve non-polarization, thereby solving a signal line polarity problem at the time of the wiring operation. Further, a train of clock pulses from the master station (1) is rectified and smoothed to supplement the DC power supply of the slave stations (2-1 to 2-n) and to be used as a reference voltage for the identification of the signal level. According to a wire data transmission system of the foregoing arrangement, the exchange of data between the reception desk and guest rooms in a hotel can be greatly facilitated and reliably performed.

Proceedings ArticleDOI
01 Jan 1981
TL;DR: The DATS system has been developed to characterize and test the data transmission properties of underwater channels using the capabilities made available by advances in solid state technology.
Abstract: High data rate acoustic telemetry for underwater communications is limited by both the available bandwidth imposed by high frequency absorption and the range and Doppler spreading of the underwater channel. These limitations can be combatted by the use of spread channel communication techniques. Application of these techniques, however, has been limited by the space and power limitations required to implement the appropriate coding, waveform synthesis and modulation that are encountered in underwater environments. The availability of microprocessors and low power LSI circuits has changed the situation significantly so that now an extensive amount of signal processing can be packaged on remote underwater vehicles and sensors. During the last two years, M.I.T. and W.H.O.I. have jointly developed a digital acoustic telemetry system, DATS. The DATS system has been developed to characterize and test the data transmission properties of underwater channels using the capabilities made available by advances in solid state technology. The design of the DATS and its use is described in the paper.

Journal ArticleDOI
TL;DR: An experimental system of an integrated communication network built with components representing the state-of-the-art in the area of optical fiber transmission and large-scale integration of logic functions is reported on.
Abstract: This paper reports on an experimental system of an integrated communication network built with components representing the state-of-the-art in the area of optical fiber transmission and large-scale integration of logic functions. These components make it possible to apply new concepts for signal processing, transmission, and switching in the experimental system. The large bandwidth of optical channels allows the transmission of all kinds of communication services including data, audio, and video, while semiconductor technology offers low cost realization and mass production of complex signal processing and switching functions to handle all these services within one network. The concept of the system is presented and results on system components and subsystems are given.

Patent
16 Apr 1981
TL;DR: In this article, the data transmission rate of a digital data transmission system is automatically varied to maintain the measured error rate within predetermined limits to achieve the highest transmission rate consistent with predetermined error rate limits.
Abstract: The data transmission rate of a digital data transmission system is automatically varied to maintain the measured error rate within predetermined limits to achieve the highest transmission rate consistent with predetermined error rate limits. The initial data transmission rate is determined by varying the data transmission rate until the measured error rate reaches the upper limit thereof and then transmitting at slightly reduced data transmission rate.

Journal ArticleDOI
TL;DR: The Fast Digital Data Acquisition System links a Vacuum Generator’s HB5 Scanning Transmission Electron Microscope and a PDP‐11/34 minicomputer, to enable high‐speed collection and storage of digitized images for analysis, processing, and display, either in real time (using hardware) or later (via software).
Abstract: The Fast Digital Data Acquisition System (FDDAS) links a Vacuum Generator’s HB5 Scanning Transmission Electron Microscope and a PDP‐11/34 minicomputer, to enable high‐speed collection and storage of digitized images for analysis, processing, and display, either in real time (using hardware) or later (via software). The FDDAS hardware consists of a digital scan generator, a programmable quad scaler with quad discriminator, an on‐line processor with digital gray level generator, an analog to digital converter, and a joystick. These devices are interconnected as addressable locations on the FDDAS bus line, the ’’System Bus,’’ on which they can act as data sources or sinks. The FDDAS also contains the circuitry for interfacing the system bus to the PDP‐11 UNIBUS, allowing it to read or write image data into the computer at memory cycle speeds. The FDDAS software consists of data transfer, data reformatting, and test pattern generation modules which are linked in an overlay structure and designed to execute under Digital Equipment Corporation’s RT11 operating system.

Journal ArticleDOI
TL;DR: This paper presents a technique for optimizing the baseband pulse shapes in digital angle modulated signals to minimize the fraction of out-of-band power for a given channel bandwidth.
Abstract: This paper presents a technique for optimizing the baseband pulse shapes in digital angle modulated signals to minimize the fraction of out-of-band power for a given channel bandwidth. As examples of practical interest, the optimization is carried out for channel bandwidths up to three times the bit rate and for the range of modulation indices usually encountered in digital transmission. Results for MSK-type signals appear as a special case.

Journal ArticleDOI
TL;DR: Theoretical analysis shows that adaptive equalization and adaptive phase tracking can be achieved with similar quality as in the familiar digital-only modem.
Abstract: The general problem of equalization for data transmission where one of the two data sources produces continuous amplitude data samples is studied. There are various ways to configure a modem for such a transmission scheme, and we describe how a standard quadrature amplitude modulation structure can be modified to operate in this mode. This solution can be specialized to include various linear modulation schemes, such as single sideband and vestigial sideband. Theoretical analysis shows that adaptive equalization and adaptive phase tracking can be achieved with similar quality as in the familiar digital-only modem. We provide extensive computer simulation results which confirm the validity of our theory.

Journal ArticleDOI
TL;DR: An efficient Automatic-Repeat-Request (ARQ) logic, for use in systems with high error rate two-frequeney-simplex data channels, is proposed, and a significant improvement is shown to be available.
Abstract: An efficient Automatic-Repeat-Request (ARQ) logic, for use in systems with high error rate two-frequeney-simplex data channels, is proposed. The throughput efficiency provided by this logic is compared with that of conventional "stop-and-wait" ARQ, and a significant improvement is shown to be available. Particular emphasis is placed on the use of this logic for data transmission to mobile land vehicles.

Patent
16 Mar 1981
TL;DR: In this article, a multiplex security system provides two-way data communications between a local panel and multiple microprocessor-based remote panels interconnected over a common data transmission line, where the remote panels are assigned priorities by setting different switch numbers in each panel.
Abstract: A multiplex security system provides two-way data communications between a local panel and multiple microprocessor-based remote panels interconnected over a common data transmission line. A second line provides two-way voice communications between the local and remote panels with automatic forwarding by an audio/data control selector to a central control unit via a single telephone line. Two additional lines provide a common ground and transmit DC power from the local to the remote panels. The remote panels include bus drivers connected to the communications line for transmitting both ASCII digital data messages and a higher voltage request or SRQ signal to the local panel when the remote panel has a message to transmit. The local panel includes two separate receivers for distinguishing the request signal from digital data and a bus driver for transmitting data. The local panel transmits a grant message which is superimposed over the request signal, reducing its voltage level to zero. The remote panel has a receiver for receiving ASCII data from the local panel and for sensing the reduced voltage level to turn off the request signal. The remote panels are assigned priorities by setting different switch numbers in each panel. The switch numbers correspond to unique brief time slots in which each of the remote panels can commence transmitting. Following a grant command, the remote panels count time slots. None can respond until the count equals its respective switch number, and then only if another panel has not already commenced transmitting.